2 * Copyright 2012-14 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
31 #include "grph_object_defs.h"
33 enum dc_link_fec_state
{
34 dc_link_fec_not_ready
,
38 struct dc_link_status
{
40 struct dpcd_caps
*dpcd_caps
;
43 /* DP MST stream allocation (payload bandwidth number) */
44 struct link_mst_stream_allocation
{
46 const struct stream_encoder
*stream_enc
;
47 /* associate DRM payload table with DC stream encoder */
49 /* number of slots required for the DP stream in transport packet */
53 /* DP MST stream allocation table */
54 struct link_mst_stream_allocation_table
{
55 /* number of DP video streams */
57 /* array of stream allocations */
58 struct link_mst_stream_allocation stream_allocations
[MAX_CONTROLLER_NUM
];
62 uint64_t edp_poweroff
;
67 struct time_stamp time_stamp
;
70 /* PSR feature flags */
72 bool psr_feature_enabled
; // PSR is supported by sink
73 bool psr_allow_active
; // PSR is currently active
74 enum dc_psr_version psr_version
; // Internal PSR version, determined based on DPCD
76 /* These parameters are calculated in Driver,
77 * based on display timing and Sink capabilities.
78 * If VBLANK region is too small and Sink takes a long time
79 * to set up RFB, it may take an extra frame to enter PSR state.
81 bool psr_frame_capture_indication_req
;
82 unsigned int psr_sdp_transmit_line_num_deadline
;
86 * A link contains one or more sinks and their connected status.
87 * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
90 struct dc_sink
*remote_sinks
[MAX_SINKS_PER_LINK
];
91 unsigned int sink_count
;
92 struct dc_sink
*local_sink
;
93 unsigned int link_index
;
94 enum dc_connection_type type
;
95 enum signal_type connector_signal
;
96 enum dc_irq_source irq_source_hpd
;
97 enum dc_irq_source irq_source_hpd_rx
;/* aka DP Short Pulse */
98 bool is_hpd_filter_disabled
;
100 bool link_state_valid
;
101 bool aux_access_disabled
;
102 bool sync_lt_in_progress
;
103 bool lttpr_non_transparent_mode
;
104 bool is_internal_display
;
106 /* caps is the same as reported_link_cap. link_traing use
107 * reported_link_cap. Will clean up. TODO
109 struct dc_link_settings reported_link_cap
;
110 struct dc_link_settings verified_link_cap
;
111 struct dc_link_settings cur_link_settings
;
112 struct dc_lane_settings cur_lane_setting
;
113 struct dc_link_settings preferred_link_setting
;
114 struct dc_link_training_overrides preferred_training_settings
;
115 struct dp_audio_test_data audio_test_data
;
121 uint8_t link_enc_hw_inst
;
123 bool test_pattern_enabled
;
124 union compliance_test_state compliance_test_state
;
128 struct ddc_service
*ddc
;
132 /* Private to DC core */
136 struct dc_context
*ctx
;
138 struct panel_cntl
*panel_cntl
;
139 struct link_encoder
*link_enc
;
140 struct graphics_object_id link_id
;
141 union ddi_channel_mapping ddi_channel_mapping
;
142 struct connector_device_tag_info device_tag
;
143 struct dpcd_caps dpcd_caps
;
144 uint32_t dongle_max_pix_clk
;
145 unsigned short chip_caps
;
146 unsigned int dpcd_sink_count
;
147 #if defined(CONFIG_DRM_AMD_DC_HDCP)
148 struct hdcp_caps hdcp_caps
;
150 enum edp_revision edp_revision
;
151 union dpcd_sink_ext_caps dpcd_sink_ext_caps
;
153 struct psr_settings psr_settings
;
155 /* MST record stream using this link */
157 bool dp_keep_receiver_powered
;
159 bool dp_skip_reset_segment
;
161 struct link_mst_stream_allocation_table mst_stream_alloc_table
;
163 struct dc_link_status link_status
;
165 struct link_trace link_trace
;
166 struct gpio
*hpd_gpio
;
167 enum dc_link_fec_state fec_state
;
170 const struct dc_link_status
*dc_link_get_status(const struct dc_link
*dc_link
);
173 * dc_get_link_at_index() - Return an enumerated dc_link.
175 * dc_link order is constant and determined at
176 * boot time. They cannot be created or destroyed.
177 * Use dc_get_caps() to get number of links.
179 static inline struct dc_link
*dc_get_link_at_index(struct dc
*dc
, uint32_t link_index
)
181 return dc
->links
[link_index
];
184 static inline struct dc_link
*get_edp_link(const struct dc
*dc
)
188 // report any eDP links, even unconnected DDI's
189 for (i
= 0; i
< dc
->link_count
; i
++) {
190 if (dc
->links
[i
]->connector_signal
== SIGNAL_TYPE_EDP
)
196 /* Set backlight level of an embedded panel (eDP, LVDS).
197 * backlight_pwm_u16_16 is unsigned 32 bit with 16 bit integer
198 * and 16 bit fractional, where 1.0 is max backlight value.
200 bool dc_link_set_backlight_level(const struct dc_link
*dc_link
,
201 uint32_t backlight_pwm_u16_16
,
202 uint32_t frame_ramp
);
204 /* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
205 bool dc_link_set_backlight_level_nits(struct dc_link
*link
,
207 uint32_t backlight_millinits
,
208 uint32_t transition_time_in_ms
);
210 bool dc_link_get_backlight_level_nits(struct dc_link
*link
,
211 uint32_t *backlight_millinits
,
212 uint32_t *backlight_millinits_peak
);
214 bool dc_link_backlight_enable_aux(struct dc_link
*link
, bool enable
);
216 bool dc_link_read_default_bl_aux(struct dc_link
*link
, uint32_t *backlight_millinits
);
217 bool dc_link_set_default_brightness_aux(struct dc_link
*link
);
219 int dc_link_get_backlight_level(const struct dc_link
*dc_link
);
221 int dc_link_get_target_backlight_pwm(const struct dc_link
*link
);
223 bool dc_link_set_psr_allow_active(struct dc_link
*dc_link
, bool enable
,
224 bool wait
, bool force_static
);
226 bool dc_link_get_psr_state(const struct dc_link
*dc_link
, enum dc_psr_state
*state
);
228 bool dc_link_setup_psr(struct dc_link
*dc_link
,
229 const struct dc_stream_state
*stream
, struct psr_config
*psr_config
,
230 struct psr_context
*psr_context
);
232 void dc_link_get_psr_residency(const struct dc_link
*link
, uint32_t *residency
);
234 /* Request DC to detect if there is a Panel connected.
235 * boot - If this call is during initial boot.
236 * Return false for any type of detection failure or MST detection
237 * true otherwise. True meaning further action is required (status update
238 * and OS notification).
240 enum dc_detect_reason
{
244 DETECT_REASON_FALLBACK
,
245 DETECT_REASON_RETRAIN
248 bool dc_link_detect(struct dc_link
*dc_link
, enum dc_detect_reason reason
);
249 bool dc_link_get_hpd_state(struct dc_link
*dc_link
);
250 enum dc_status
dc_link_allocate_mst_payload(struct pipe_ctx
*pipe_ctx
);
251 enum dc_status
dc_link_reallocate_mst_payload(struct dc_link
*link
);
253 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
255 * true - Downstream port status changed. DM should call DC to do the
257 * false - no change in Downstream port status. No further action required
259 bool dc_link_handle_hpd_rx_irq(struct dc_link
*dc_link
,
260 union hpd_irq_data
*hpd_irq_dpcd_data
, bool *out_link_loss
);
262 enum dc_status
read_hpd_rx_irq_data(
263 struct dc_link
*link
,
264 union hpd_irq_data
*irq_data
);
266 struct dc_sink_init_data
;
268 struct dc_sink
*dc_link_add_remote_sink(
269 struct dc_link
*dc_link
,
272 struct dc_sink_init_data
*init_data
);
274 void dc_link_remove_remote_sink(
275 struct dc_link
*link
,
276 struct dc_sink
*sink
);
278 /* Used by diagnostics for virtual link at the moment */
280 void dc_link_dp_set_drive_settings(
281 struct dc_link
*link
,
282 struct link_training_settings
*lt_settings
);
284 bool dc_link_dp_perform_link_training_skip_aux(
285 struct dc_link
*link
,
286 const struct dc_link_settings
*link_setting
);
288 enum link_training_result
dc_link_dp_perform_link_training(
289 struct dc_link
*link
,
290 const struct dc_link_settings
*link_setting
,
291 bool skip_video_pattern
);
293 bool dc_link_dp_sync_lt_begin(struct dc_link
*link
);
295 enum link_training_result
dc_link_dp_sync_lt_attempt(
296 struct dc_link
*link
,
297 struct dc_link_settings
*link_setting
,
298 struct dc_link_training_overrides
*lt_settings
);
300 bool dc_link_dp_sync_lt_end(struct dc_link
*link
, bool link_down
);
302 void dc_link_dp_enable_hpd(const struct dc_link
*link
);
304 void dc_link_dp_disable_hpd(const struct dc_link
*link
);
306 bool dc_link_dp_set_test_pattern(
307 struct dc_link
*link
,
308 enum dp_test_pattern test_pattern
,
309 enum dp_test_pattern_color_space test_pattern_color_space
,
310 const struct link_training_settings
*p_link_settings
,
311 const unsigned char *p_custom_pattern
,
312 unsigned int cust_pattern_size
);
314 void dc_link_enable_hpd_filter(struct dc_link
*link
, bool enable
);
316 bool dc_link_is_dp_sink_present(struct dc_link
*link
);
318 bool dc_link_detect_sink(struct dc_link
*link
, enum dc_connection_type
*type
);
320 * DPCD access interfaces
323 #ifdef CONFIG_DRM_AMD_DC_HDCP
324 bool dc_link_is_hdcp14(struct dc_link
*link
, enum signal_type signal
);
325 bool dc_link_is_hdcp22(struct dc_link
*link
, enum signal_type signal
);
327 void dc_link_set_drive_settings(struct dc
*dc
,
328 struct link_training_settings
*lt_settings
,
329 const struct dc_link
*link
);
330 void dc_link_perform_link_training(struct dc
*dc
,
331 struct dc_link_settings
*link_setting
,
332 bool skip_video_pattern
);
333 void dc_link_set_preferred_link_settings(struct dc
*dc
,
334 struct dc_link_settings
*link_setting
,
335 struct dc_link
*link
);
336 void dc_link_set_preferred_training_settings(struct dc
*dc
,
337 struct dc_link_settings
*link_setting
,
338 struct dc_link_training_overrides
*lt_overrides
,
339 struct dc_link
*link
,
340 bool skip_immediate_retrain
);
341 void dc_link_enable_hpd(const struct dc_link
*link
);
342 void dc_link_disable_hpd(const struct dc_link
*link
);
343 void dc_link_set_test_pattern(struct dc_link
*link
,
344 enum dp_test_pattern test_pattern
,
345 enum dp_test_pattern_color_space test_pattern_color_space
,
346 const struct link_training_settings
*p_link_settings
,
347 const unsigned char *p_custom_pattern
,
348 unsigned int cust_pattern_size
);
349 uint32_t dc_link_bandwidth_kbps(
350 const struct dc_link
*link
,
351 const struct dc_link_settings
*link_setting
);
353 const struct dc_link_settings
*dc_link_get_link_cap(
354 const struct dc_link
*link
);
356 void dc_link_overwrite_extended_receiver_cap(
357 struct dc_link
*link
);
362 struct i2c_command
*cmd
);
364 bool dc_submit_i2c_oem(
366 struct i2c_command
*cmd
);
368 uint32_t dc_bandwidth_in_kbps_from_timing(
369 const struct dc_crtc_timing
*timing
);
371 bool dc_link_is_fec_supported(const struct dc_link
*link
);
373 #endif /* DC_LINK_H_ */