WIP FPC-III support
[linux/fpc-iii.git] / drivers / gpu / drm / amd / display / dc / dcn10 / dcn10_hubbub.h
blob343a537172c75e4ac3aa199fda0e87e20be7c384
1 /*
2 * Copyright 2016 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: AMD
26 #ifndef __DC_HUBBUB_DCN10_H__
27 #define __DC_HUBBUB_DCN10_H__
29 #include "core_types.h"
30 #include "dchubbub.h"
32 #define TO_DCN10_HUBBUB(hubbub)\
33 container_of(hubbub, struct dcn10_hubbub, base)
35 #define HUBBUB_REG_LIST_DCN_COMMON()\
36 SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A),\
37 SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A),\
38 SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B),\
39 SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B),\
40 SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C),\
41 SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C),\
42 SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D),\
43 SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D),\
44 SR(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL),\
45 SR(DCHUBBUB_ARB_DRAM_STATE_CNTL),\
46 SR(DCHUBBUB_ARB_SAT_LEVEL),\
47 SR(DCHUBBUB_ARB_DF_REQ_OUTSTAND),\
48 SR(DCHUBBUB_GLOBAL_TIMER_CNTL), \
49 SR(DCHUBBUB_TEST_DEBUG_INDEX), \
50 SR(DCHUBBUB_TEST_DEBUG_DATA),\
51 SR(DCHUBBUB_SOFT_RESET)
53 #define HUBBUB_VM_REG_LIST() \
54 SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A),\
55 SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B),\
56 SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C),\
57 SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D)
59 #define HUBBUB_SR_WATERMARK_REG_LIST()\
60 SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A),\
61 SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A),\
62 SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B),\
63 SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B),\
64 SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C),\
65 SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C),\
66 SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D),\
67 SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D)
69 #define HUBBUB_REG_LIST_DCN10(id)\
70 HUBBUB_REG_LIST_DCN_COMMON(), \
71 HUBBUB_VM_REG_LIST(), \
72 HUBBUB_SR_WATERMARK_REG_LIST(), \
73 SR(DCHUBBUB_SDPIF_FB_TOP),\
74 SR(DCHUBBUB_SDPIF_FB_BASE),\
75 SR(DCHUBBUB_SDPIF_FB_OFFSET),\
76 SR(DCHUBBUB_SDPIF_AGP_BASE),\
77 SR(DCHUBBUB_SDPIF_AGP_BOT),\
78 SR(DCHUBBUB_SDPIF_AGP_TOP)
80 struct dcn_hubbub_registers {
81 uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A;
82 uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A;
83 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A;
84 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A;
85 uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A;
86 uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B;
87 uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B;
88 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B;
89 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B;
90 uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B;
91 uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C;
92 uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C;
93 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C;
94 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C;
95 uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C;
96 uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D;
97 uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D;
98 uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D;
99 uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D;
100 uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D;
101 uint32_t DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL;
102 uint32_t DCHUBBUB_ARB_SAT_LEVEL;
103 uint32_t DCHUBBUB_ARB_DF_REQ_OUTSTAND;
104 uint32_t DCHUBBUB_GLOBAL_TIMER_CNTL;
105 uint32_t DCHUBBUB_ARB_DRAM_STATE_CNTL;
106 uint32_t DCHUBBUB_TEST_DEBUG_INDEX;
107 uint32_t DCHUBBUB_TEST_DEBUG_DATA;
108 uint32_t DCHUBBUB_SDPIF_FB_TOP;
109 uint32_t DCHUBBUB_SDPIF_FB_BASE;
110 uint32_t DCHUBBUB_SDPIF_FB_OFFSET;
111 uint32_t DCHUBBUB_SDPIF_AGP_BASE;
112 uint32_t DCHUBBUB_SDPIF_AGP_BOT;
113 uint32_t DCHUBBUB_SDPIF_AGP_TOP;
114 uint32_t DCHUBBUB_CRC_CTRL;
115 uint32_t DCHUBBUB_SOFT_RESET;
116 uint32_t DCN_VM_FB_LOCATION_BASE;
117 uint32_t DCN_VM_FB_LOCATION_TOP;
118 uint32_t DCN_VM_FB_OFFSET;
119 uint32_t DCN_VM_AGP_BOT;
120 uint32_t DCN_VM_AGP_TOP;
121 uint32_t DCN_VM_AGP_BASE;
122 uint32_t DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB;
123 uint32_t DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB;
124 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_A;
125 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_B;
126 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_C;
127 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_D;
128 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_A;
129 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_B;
130 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_C;
131 uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_D;
132 uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A;
133 uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B;
134 uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C;
135 uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D;
136 uint32_t DCHUBBUB_ARB_HOSTVM_CNTL;
137 uint32_t DCHVM_CTRL0;
138 uint32_t DCHVM_MEM_CTRL;
139 uint32_t DCHVM_CLK_CTRL;
140 uint32_t DCHVM_RIOMMU_CTRL0;
141 uint32_t DCHVM_RIOMMU_STAT0;
144 /* set field name */
145 #define HUBBUB_SF(reg_name, field_name, post_fix)\
146 .field_name = reg_name ## __ ## field_name ## post_fix
148 #define HUBBUB_MASK_SH_LIST_DCN_COMMON(mask_sh)\
149 HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, mask_sh), \
150 HUBBUB_SF(DCHUBBUB_SOFT_RESET, DCHUBBUB_GLOBAL_SOFT_RESET, mask_sh), \
151 HUBBUB_SF(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL, DCHUBBUB_ARB_WATERMARK_CHANGE_REQUEST, mask_sh), \
152 HUBBUB_SF(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL, DCHUBBUB_ARB_WATERMARK_CHANGE_DONE_INTERRUPT_DISABLE, mask_sh), \
153 HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_VALUE, mask_sh), \
154 HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_ENABLE, mask_sh), \
155 HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_VALUE, mask_sh), \
156 HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_ENABLE, mask_sh), \
157 HUBBUB_SF(DCHUBBUB_ARB_SAT_LEVEL, DCHUBBUB_ARB_SAT_LEVEL, mask_sh), \
158 HUBBUB_SF(DCHUBBUB_ARB_DF_REQ_OUTSTAND, DCHUBBUB_ARB_MIN_REQ_OUTSTAND, mask_sh), \
159 HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, mask_sh), \
160 HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B, mask_sh), \
161 HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C, mask_sh), \
162 HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D, mask_sh), \
163 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A, mask_sh), \
164 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B, mask_sh), \
165 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C, mask_sh), \
166 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D, mask_sh)
168 #define HUBBUB_MASK_SH_LIST_STUTTER(mask_sh) \
169 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A, mask_sh), \
170 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B, mask_sh), \
171 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C, mask_sh), \
172 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D, mask_sh), \
173 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A, mask_sh), \
174 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B, mask_sh), \
175 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C, mask_sh), \
176 HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D, mask_sh)
178 #define HUBBUB_MASK_SH_LIST_DCN10(mask_sh)\
179 HUBBUB_MASK_SH_LIST_DCN_COMMON(mask_sh), \
180 HUBBUB_MASK_SH_LIST_STUTTER(mask_sh), \
181 HUBBUB_SF(DCHUBBUB_SDPIF_FB_TOP, SDPIF_FB_TOP, mask_sh), \
182 HUBBUB_SF(DCHUBBUB_SDPIF_FB_BASE, SDPIF_FB_BASE, mask_sh), \
183 HUBBUB_SF(DCHUBBUB_SDPIF_FB_OFFSET, SDPIF_FB_OFFSET, mask_sh), \
184 HUBBUB_SF(DCHUBBUB_SDPIF_AGP_BASE, SDPIF_AGP_BASE, mask_sh), \
185 HUBBUB_SF(DCHUBBUB_SDPIF_AGP_BOT, SDPIF_AGP_BOT, mask_sh), \
186 HUBBUB_SF(DCHUBBUB_SDPIF_AGP_TOP, SDPIF_AGP_TOP, mask_sh)
188 #define DCN_HUBBUB_REG_FIELD_LIST(type) \
189 type DCHUBBUB_GLOBAL_TIMER_ENABLE; \
190 type DCHUBBUB_ARB_WATERMARK_CHANGE_REQUEST;\
191 type DCHUBBUB_ARB_WATERMARK_CHANGE_DONE_INTERRUPT_DISABLE;\
192 type DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_VALUE;\
193 type DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_ENABLE;\
194 type DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_VALUE;\
195 type DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_ENABLE;\
196 type DCHUBBUB_ARB_SAT_LEVEL;\
197 type DCHUBBUB_ARB_MIN_REQ_OUTSTAND;\
198 type DCHUBBUB_GLOBAL_TIMER_REFDIV;\
199 type DCHUBBUB_GLOBAL_SOFT_RESET; \
200 type SDPIF_FB_TOP;\
201 type SDPIF_FB_BASE;\
202 type SDPIF_FB_OFFSET;\
203 type SDPIF_AGP_BASE;\
204 type SDPIF_AGP_BOT;\
205 type SDPIF_AGP_TOP;\
206 type FB_BASE;\
207 type FB_TOP;\
208 type FB_OFFSET;\
209 type AGP_BOT;\
210 type AGP_TOP;\
211 type AGP_BASE;\
212 type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A;\
213 type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B;\
214 type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C;\
215 type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D;\
216 type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A;\
217 type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B;\
218 type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C;\
219 type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D;\
220 type DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB;\
221 type DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB
223 #define HUBBUB_STUTTER_REG_FIELD_LIST(type) \
224 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A;\
225 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B;\
226 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C;\
227 type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D;\
228 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A;\
229 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B;\
230 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C;\
231 type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D
233 #define HUBBUB_HVM_REG_FIELD_LIST(type) \
234 type DCHUBBUB_ARB_MIN_REQ_OUTSTAND_COMMIT_THRESHOLD;\
235 type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_A;\
236 type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_B;\
237 type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_C;\
238 type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_D;\
239 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_A;\
240 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_B;\
241 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_C;\
242 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_D;\
243 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_A;\
244 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_B;\
245 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_C;\
246 type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_D;\
247 type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A;\
248 type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B;\
249 type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C;\
250 type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D;\
251 type DCHUBBUB_ARB_FRAC_URG_BW_NOM_A;\
252 type DCHUBBUB_ARB_FRAC_URG_BW_NOM_B;\
253 type DCHUBBUB_ARB_FRAC_URG_BW_NOM_C;\
254 type DCHUBBUB_ARB_FRAC_URG_BW_NOM_D;\
255 type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_A;\
256 type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_B;\
257 type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_C;\
258 type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_D;\
259 type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A;\
260 type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B;\
261 type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C;\
262 type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D;\
263 type DCHUBBUB_ARB_MAX_QOS_COMMIT_THRESHOLD;\
264 type HOSTVM_INIT_REQ; \
265 type HVM_GPUVMRET_PWR_REQ_DIS; \
266 type HVM_GPUVMRET_FORCE_REQ; \
267 type HVM_GPUVMRET_POWER_STATUS; \
268 type HVM_DISPCLK_R_GATE_DIS; \
269 type HVM_DISPCLK_G_GATE_DIS; \
270 type HVM_DCFCLK_R_GATE_DIS; \
271 type HVM_DCFCLK_G_GATE_DIS; \
272 type TR_REQ_REQCLKREQ_MODE; \
273 type TW_RSP_COMPCLKREQ_MODE; \
274 type HOSTVM_PREFETCH_REQ; \
275 type HOSTVM_POWERSTATUS; \
276 type RIOMMU_ACTIVE; \
277 type HOSTVM_PREFETCH_DONE
279 struct dcn_hubbub_shift {
280 DCN_HUBBUB_REG_FIELD_LIST(uint8_t);
281 HUBBUB_STUTTER_REG_FIELD_LIST(uint8_t);
282 HUBBUB_HVM_REG_FIELD_LIST(uint8_t);
285 struct dcn_hubbub_mask {
286 DCN_HUBBUB_REG_FIELD_LIST(uint32_t);
287 HUBBUB_STUTTER_REG_FIELD_LIST(uint32_t);
288 HUBBUB_HVM_REG_FIELD_LIST(uint32_t);
291 struct dc;
293 struct dcn10_hubbub {
294 struct hubbub base;
295 const struct dcn_hubbub_registers *regs;
296 const struct dcn_hubbub_shift *shifts;
297 const struct dcn_hubbub_mask *masks;
298 unsigned int debug_test_index_pstate;
299 struct dcn_watermark_set watermarks;
302 void hubbub1_update_dchub(
303 struct hubbub *hubbub,
304 struct dchub_init_data *dh_data);
306 bool hubbub1_verify_allow_pstate_change_high(
307 struct hubbub *hubbub);
309 void hubbub1_wm_change_req_wa(struct hubbub *hubbub);
311 bool hubbub1_program_watermarks(
312 struct hubbub *hubbub,
313 struct dcn_watermark_set *watermarks,
314 unsigned int refclk_mhz,
315 bool safe_to_lower);
317 void hubbub1_allow_self_refresh_control(struct hubbub *hubbub, bool allow);
319 bool hubbub1_is_allow_self_refresh_enabled(struct hubbub *hubub);
321 void hubbub1_toggle_watermark_change_req(
322 struct hubbub *hubbub);
324 void hubbub1_wm_read_state(struct hubbub *hubbub,
325 struct dcn_hubbub_wm *wm);
327 void hubbub1_soft_reset(struct hubbub *hubbub, bool reset);
328 void hubbub1_construct(struct hubbub *hubbub,
329 struct dc_context *ctx,
330 const struct dcn_hubbub_registers *hubbub_regs,
331 const struct dcn_hubbub_shift *hubbub_shift,
332 const struct dcn_hubbub_mask *hubbub_mask);
334 bool hubbub1_program_urgent_watermarks(
335 struct hubbub *hubbub,
336 struct dcn_watermark_set *watermarks,
337 unsigned int refclk_mhz,
338 bool safe_to_lower);
339 bool hubbub1_program_stutter_watermarks(
340 struct hubbub *hubbub,
341 struct dcn_watermark_set *watermarks,
342 unsigned int refclk_mhz,
343 bool safe_to_lower);
344 bool hubbub1_program_pstate_watermarks(
345 struct hubbub *hubbub,
346 struct dcn_watermark_set *watermarks,
347 unsigned int refclk_mhz,
348 bool safe_to_lower);
350 #endif