WIP FPC-III support
[linux/fpc-iii.git] / drivers / gpu / drm / amd / display / dc / dcn21 / dcn21_dccg.h
blobe44a37491c1e94b3c91aca3feaeb3ea41f60e537
1 /*
2 * Copyright 2018 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: AMD
26 #ifndef __DCN21_DCCG_H__
27 #define __DCN21_DCCG_H__
29 struct dccg *dccg21_create(
30 struct dc_context *ctx,
31 const struct dccg_registers *regs,
32 const struct dccg_shift *dccg_shift,
33 const struct dccg_mask *dccg_mask);
35 void dccg21_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk);
37 #endif /* __DCN21_DCCG_H__ */