WIP FPC-III support
[linux/fpc-iii.git] / drivers / gpu / drm / amd / display / dc / gpio / hw_factory.c
blobda73bfb3cacd04dce9528125750f20e793fb5b7a
1 /*
2 * Copyright 2012-15 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: AMD
26 #include <linux/slab.h>
28 #include "dm_services.h"
31 * Pre-requisites: headers required by header of this unit
33 #include "include/gpio_types.h"
36 * Header of this unit
39 #include "hw_factory.h"
42 * Post-requisites: headers required by this unit
45 #if defined(CONFIG_DRM_AMD_DC_SI)
46 #include "dce60/hw_factory_dce60.h"
47 #endif
48 #include "dce80/hw_factory_dce80.h"
49 #include "dce110/hw_factory_dce110.h"
50 #include "dce120/hw_factory_dce120.h"
51 #if defined(CONFIG_DRM_AMD_DC_DCN)
52 #include "dcn10/hw_factory_dcn10.h"
53 #include "dcn20/hw_factory_dcn20.h"
54 #include "dcn21/hw_factory_dcn21.h"
55 #include "dcn30/hw_factory_dcn30.h"
56 #endif
58 #include "diagnostics/hw_factory_diag.h"
61 * This unit
64 bool dal_hw_factory_init(
65 struct hw_factory *factory,
66 enum dce_version dce_version,
67 enum dce_environment dce_environment)
69 if (IS_FPGA_MAXIMUS_DC(dce_environment)) {
70 dal_hw_factory_diag_fpga_init(factory);
71 return true;
74 switch (dce_version) {
75 #if defined(CONFIG_DRM_AMD_DC_SI)
76 case DCE_VERSION_6_0:
77 case DCE_VERSION_6_1:
78 case DCE_VERSION_6_4:
79 dal_hw_factory_dce60_init(factory);
80 return true;
81 #endif
82 case DCE_VERSION_8_0:
83 case DCE_VERSION_8_1:
84 case DCE_VERSION_8_3:
85 dal_hw_factory_dce80_init(factory);
86 return true;
88 case DCE_VERSION_10_0:
89 dal_hw_factory_dce110_init(factory);
90 return true;
91 case DCE_VERSION_11_0:
92 case DCE_VERSION_11_2:
93 case DCE_VERSION_11_22:
94 dal_hw_factory_dce110_init(factory);
95 return true;
96 case DCE_VERSION_12_0:
97 case DCE_VERSION_12_1:
98 dal_hw_factory_dce120_init(factory);
99 return true;
100 #if defined(CONFIG_DRM_AMD_DC_DCN)
101 case DCN_VERSION_1_0:
102 case DCN_VERSION_1_01:
103 dal_hw_factory_dcn10_init(factory);
104 return true;
105 case DCN_VERSION_2_0:
106 dal_hw_factory_dcn20_init(factory);
107 return true;
108 case DCN_VERSION_2_1:
109 dal_hw_factory_dcn21_init(factory);
110 return true;
111 case DCN_VERSION_3_0:
112 case DCN_VERSION_3_01:
113 case DCN_VERSION_3_02:
114 dal_hw_factory_dcn30_init(factory);
115 return true;
116 #endif
117 default:
118 ASSERT_CRITICAL(false);
119 return false;
123 void dal_hw_factory_destroy(
124 struct dc_context *ctx,
125 struct hw_factory **factory)
127 if (!factory || !*factory) {
128 BREAK_TO_DEBUGGER();
129 return;
132 kfree(*factory);
134 *factory = NULL;