WIP FPC-III support
[linux/fpc-iii.git] / drivers / gpu / drm / amd / display / dc / gpio / hw_hpd.c
blob692f29de779701dfac545fe37ead3663de59172f
1 /*
2 * Copyright 2012-15 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: AMD
26 #include <linux/slab.h>
28 #include "dm_services.h"
30 #include "include/gpio_interface.h"
31 #include "include/gpio_types.h"
32 #include "hw_gpio.h"
33 #include "hw_hpd.h"
35 #include "reg_helper.h"
36 #include "hpd_regs.h"
38 #undef FN
39 #define FN(reg_name, field_name) \
40 hpd->shifts->field_name, hpd->masks->field_name
42 #define CTX \
43 hpd->base.base.ctx
44 #define REG(reg)\
45 (hpd->regs->reg)
47 struct gpio;
49 static void dal_hw_hpd_destruct(
50 struct hw_hpd *pin)
52 dal_hw_gpio_destruct(&pin->base);
55 static void dal_hw_hpd_destroy(
56 struct hw_gpio_pin **ptr)
58 struct hw_hpd *hpd = HW_HPD_FROM_BASE(*ptr);
60 dal_hw_hpd_destruct(hpd);
62 kfree(hpd);
64 *ptr = NULL;
67 static enum gpio_result get_value(
68 const struct hw_gpio_pin *ptr,
69 uint32_t *value)
71 struct hw_hpd *hpd = HW_HPD_FROM_BASE(ptr);
72 uint32_t hpd_delayed = 0;
74 /* in Interrupt mode we ask for SENSE bit */
76 if (ptr->mode == GPIO_MODE_INTERRUPT) {
78 REG_GET(int_status,
79 DC_HPD_SENSE_DELAYED, &hpd_delayed);
81 *value = hpd_delayed;
82 return GPIO_RESULT_OK;
85 /* in any other modes, operate as normal GPIO */
87 return dal_hw_gpio_get_value(ptr, value);
90 static enum gpio_result set_config(
91 struct hw_gpio_pin *ptr,
92 const struct gpio_config_data *config_data)
94 struct hw_hpd *hpd = HW_HPD_FROM_BASE(ptr);
96 if (!config_data)
97 return GPIO_RESULT_INVALID_DATA;
99 REG_UPDATE_2(toggle_filt_cntl,
100 DC_HPD_CONNECT_INT_DELAY, config_data->config.hpd.delay_on_connect / 10,
101 DC_HPD_DISCONNECT_INT_DELAY, config_data->config.hpd.delay_on_disconnect / 10);
103 return GPIO_RESULT_OK;
106 static const struct hw_gpio_pin_funcs funcs = {
107 .destroy = dal_hw_hpd_destroy,
108 .open = dal_hw_gpio_open,
109 .get_value = get_value,
110 .set_value = dal_hw_gpio_set_value,
111 .set_config = set_config,
112 .change_mode = dal_hw_gpio_change_mode,
113 .close = dal_hw_gpio_close,
116 static void dal_hw_hpd_construct(
117 struct hw_hpd *pin,
118 enum gpio_id id,
119 uint32_t en,
120 struct dc_context *ctx)
122 dal_hw_gpio_construct(&pin->base, id, en, ctx);
123 pin->base.base.funcs = &funcs;
126 void dal_hw_hpd_init(
127 struct hw_hpd **hw_hpd,
128 struct dc_context *ctx,
129 enum gpio_id id,
130 uint32_t en)
132 if ((en < GPIO_DDC_LINE_MIN) || (en > GPIO_DDC_LINE_MAX)) {
133 ASSERT_CRITICAL(false);
134 *hw_hpd = NULL;
137 *hw_hpd = kzalloc(sizeof(struct hw_hpd), GFP_KERNEL);
138 if (!*hw_hpd) {
139 ASSERT_CRITICAL(false);
140 return;
143 dal_hw_hpd_construct(*hw_hpd, id, en, ctx);
146 struct hw_gpio_pin *dal_hw_hpd_get_pin(struct gpio *gpio)
148 struct hw_hpd *hw_hpd = dal_gpio_get_hpd(gpio);
150 return &hw_hpd->base.base;