drivers/gpu/drm/amd/display/dc/inc/link_hwss.h

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef __DC_LINK_HWSS_H__
  27 #define __DC_LINK_HWSS_H__
  28
  29 #include "inc/core_status.h"
  30
  31 enum dc_status core_link_read_dpcd(
  32         struct dc_link *link,
  33         uint32_t address,
  34         uint8_t *data,
  35         uint32_t size);
  36
  37 enum dc_status core_link_write_dpcd(
  38         struct dc_link *link,
  39         uint32_t address,
  40         const uint8_t *data,
  41         uint32_t size);
  42
  43 struct gpio *get_hpd_gpio(struct dc_bios *dcb,
  44                 struct graphics_object_id link_id,
  45                 struct gpio_service *gpio_service);
  46
  47 void dp_enable_link_phy(
  48         struct dc_link *link,
  49         enum signal_type signal,
  50         enum clock_source_id clock_source,
  51         const struct dc_link_settings *link_settings);
  52
  53 void dp_receiver_power_ctrl(struct dc_link *link, bool on);
  54 void edp_add_delay_for_T9(struct dc_link *link);
  55 bool edp_receiver_ready_T9(struct dc_link *link);
  56 bool edp_receiver_ready_T7(struct dc_link *link);
  57
  58 void dp_disable_link_phy(struct dc_link *link, enum signal_type signal);
  59
  60 void dp_disable_link_phy_mst(struct dc_link *link, enum signal_type signal);
  61
  62 bool dp_set_hw_training_pattern(
  63         struct dc_link *link,
  64         enum dc_dp_training_pattern pattern,
  65         uint32_t offset);
  66
  67 void dp_set_hw_lane_settings(
  68         struct dc_link *link,
  69         const struct link_training_settings *link_settings,
  70         uint32_t offset);
  71
  72 void dp_set_hw_test_pattern(
  73         struct dc_link *link,
  74         enum dp_test_pattern test_pattern,
  75         uint8_t *custom_pattern,
  76         uint32_t custom_pattern_size);
  77
  78 void dp_retrain_link_dp_test(struct dc_link *link,
  79                 struct dc_link_settings *link_setting,
  80                 bool skip_video_pattern);
  81
  82 #endif /* __DC_LINK_HWSS_H__ */