1 // SPDX-License-Identifier: GPL-2.0-only
3 * Parade PS8622 eDP/LVDS bridge driver
5 * Copyright (C) 2014 Google, Inc.
8 #include <linux/backlight.h>
9 #include <linux/delay.h>
10 #include <linux/err.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/i2c.h>
13 #include <linux/module.h>
15 #include <linux/of_device.h>
17 #include <linux/regulator/consumer.h>
19 #include <drm/drm_atomic_helper.h>
20 #include <drm/drm_bridge.h>
21 #include <drm/drm_crtc.h>
22 #include <drm/drm_of.h>
23 #include <drm/drm_panel.h>
24 #include <drm/drm_print.h>
25 #include <drm/drm_probe_helper.h>
27 /* Brightness scale on the Parade chip */
28 #define PS8622_MAX_BRIGHTNESS 0xff
30 /* Timings taken from the version 1.7 datasheet for the PS8622/PS8625 */
31 #define PS8622_POWER_RISE_T1_MIN_US 10
32 #define PS8622_POWER_RISE_T1_MAX_US 10000
33 #define PS8622_RST_HIGH_T2_MIN_US 3000
34 #define PS8622_RST_HIGH_T2_MAX_US 30000
35 #define PS8622_PWMO_END_T12_MS 200
36 #define PS8622_POWER_FALL_T16_MAX_US 10000
37 #define PS8622_POWER_OFF_T17_MS 500
39 #if ((PS8622_RST_HIGH_T2_MIN_US + PS8622_POWER_RISE_T1_MAX_US) > \
40 (PS8622_RST_HIGH_T2_MAX_US + PS8622_POWER_RISE_T1_MIN_US))
41 #error "T2.min + T1.max must be less than T2.max + T1.min"
44 struct ps8622_bridge
{
45 struct i2c_client
*client
;
46 struct drm_bridge bridge
;
47 struct drm_bridge
*panel_bridge
;
48 struct regulator
*v12
;
49 struct backlight_device
*bl
;
51 struct gpio_desc
*gpio_slp
;
52 struct gpio_desc
*gpio_rst
;
60 static inline struct ps8622_bridge
*
61 bridge_to_ps8622(struct drm_bridge
*bridge
)
63 return container_of(bridge
, struct ps8622_bridge
, bridge
);
66 static int ps8622_set(struct i2c_client
*client
, u8 page
, u8 reg
, u8 val
)
69 struct i2c_adapter
*adap
= client
->adapter
;
71 u8 data
[] = {reg
, val
};
73 msg
.addr
= client
->addr
+ page
;
75 msg
.len
= sizeof(data
);
78 ret
= i2c_transfer(adap
, &msg
, 1);
80 pr_warn("PS8622 I2C write (0x%02x,0x%02x,0x%02x) failed: %d\n",
81 client
->addr
+ page
, reg
, val
, ret
);
85 static int ps8622_send_config(struct ps8622_bridge
*ps8622
)
87 struct i2c_client
*cl
= ps8622
->client
;
91 err
= ps8622_set(cl
, 0x02, 0xa1, 0x01);
95 /* SW setting: [1:0] SW output 1.2V voltage is lower to 96% */
96 err
= ps8622_set(cl
, 0x04, 0x14, 0x01);
100 /* RCO SS setting: [5:4] = b01 0.5%, b10 1%, b11 1.5% */
101 err
= ps8622_set(cl
, 0x04, 0xe3, 0x20);
105 /* [7] RCO SS enable */
106 err
= ps8622_set(cl
, 0x04, 0xe2, 0x80);
111 * [3:2] CDR tune wait cycle before measure for fine tune
112 * b00: 1us b01: 0.5us b10:2us, b11: 4us
114 err
= ps8622_set(cl
, 0x04, 0x8a, 0x0c);
118 /* [3] RFD always on */
119 err
= ps8622_set(cl
, 0x04, 0x89, 0x08);
123 /* CTN lock in/out: 20000ppm/80000ppm. Lock out 2 times. */
124 err
= ps8622_set(cl
, 0x04, 0x71, 0x2d);
128 /* 2.7G CDR settings: NOF=40LSB for HBR CDR setting */
129 err
= ps8622_set(cl
, 0x04, 0x7d, 0x07);
133 /* [1:0] Fmin=+4bands */
134 err
= ps8622_set(cl
, 0x04, 0x7b, 0x00);
138 /* [7:5] DCO_FTRNG=+-40% */
139 err
= ps8622_set(cl
, 0x04, 0x7a, 0xfd);
143 /* 1.62G CDR settings: [5:2]NOF=64LSB [1:0]DCO scale is 2/5 */
144 err
= ps8622_set(cl
, 0x04, 0xc0, 0x12);
149 err
= ps8622_set(cl
, 0x04, 0xc1, 0x92);
154 err
= ps8622_set(cl
, 0x04, 0xc2, 0x1c);
158 /* [7] LOS signal disable */
159 err
= ps8622_set(cl
, 0x04, 0x32, 0x80);
163 /* RPIO Setting: [7:4] LVDS driver bias current : 75% (250mV swing) */
164 err
= ps8622_set(cl
, 0x04, 0x00, 0xb0);
168 /* [7:6] Right-bar GPIO output strength is 8mA */
169 err
= ps8622_set(cl
, 0x04, 0x15, 0x40);
173 /* EQ Training State Machine Setting, RCO calibration start */
174 err
= ps8622_set(cl
, 0x04, 0x54, 0x10);
178 /* Logic, needs more than 10 I2C command */
179 /* [4:0] MAX_LANE_COUNT set to max supported lanes */
180 err
= ps8622_set(cl
, 0x01, 0x02, 0x80 | ps8622
->max_lane_count
);
184 /* [4:0] LANE_COUNT_SET set to chosen lane count */
185 err
= ps8622_set(cl
, 0x01, 0x21, 0x80 | ps8622
->lane_count
);
189 err
= ps8622_set(cl
, 0x00, 0x52, 0x20);
193 /* HPD CP toggle enable */
194 err
= ps8622_set(cl
, 0x00, 0xf1, 0x03);
198 err
= ps8622_set(cl
, 0x00, 0x62, 0x41);
202 /* Counter number, add 1ms counter delay */
203 err
= ps8622_set(cl
, 0x00, 0xf6, 0x01);
207 /* [6]PWM function control by DPCD0040f[7], default is PWM block */
208 err
= ps8622_set(cl
, 0x00, 0x77, 0x06);
212 /* 04h Adjust VTotal toleranceto fix the 30Hz no display issue */
213 err
= ps8622_set(cl
, 0x00, 0x4c, 0x04);
217 /* DPCD00400='h00, Parade OUI ='h001cf8 */
218 err
= ps8622_set(cl
, 0x01, 0xc0, 0x00);
223 err
= ps8622_set(cl
, 0x01, 0xc1, 0x1c);
228 err
= ps8622_set(cl
, 0x01, 0xc2, 0xf8);
232 /* DPCD403~408 = ASCII code, D2SLV5='h4432534c5635 */
233 err
= ps8622_set(cl
, 0x01, 0xc3, 0x44);
238 err
= ps8622_set(cl
, 0x01, 0xc4, 0x32);
243 err
= ps8622_set(cl
, 0x01, 0xc5, 0x53);
248 err
= ps8622_set(cl
, 0x01, 0xc6, 0x4c);
253 err
= ps8622_set(cl
, 0x01, 0xc7, 0x56);
258 err
= ps8622_set(cl
, 0x01, 0xc8, 0x35);
262 /* DPCD40A, Initial Code major revision '01' */
263 err
= ps8622_set(cl
, 0x01, 0xca, 0x01);
267 /* DPCD40B, Initial Code minor revision '05' */
268 err
= ps8622_set(cl
, 0x01, 0xcb, 0x05);
274 /* DPCD720, internal PWM */
275 err
= ps8622_set(cl
, 0x01, 0xa5, 0xa0);
279 /* FFh for 100% brightness, 0h for 0% brightness */
280 err
= ps8622_set(cl
, 0x01, 0xa7,
281 ps8622
->bl
->props
.brightness
);
285 /* DPCD720, external PWM */
286 err
= ps8622_set(cl
, 0x01, 0xa5, 0x80);
291 /* Set LVDS output as 6bit-VESA mapping, single LVDS channel */
292 err
= ps8622_set(cl
, 0x01, 0xcc, 0x13);
296 /* Enable SSC set by register */
297 err
= ps8622_set(cl
, 0x02, 0xb1, 0x20);
301 /* Set SSC enabled and +/-1% central spreading */
302 err
= ps8622_set(cl
, 0x04, 0x10, 0x16);
307 /* MPU Clock source: LC => RCO */
308 err
= ps8622_set(cl
, 0x04, 0x59, 0x60);
313 err
= ps8622_set(cl
, 0x04, 0x54, 0x14);
318 err
= ps8622_set(cl
, 0x02, 0xa1, 0x91);
321 return err
? -EIO
: 0;
324 static int ps8622_backlight_update(struct backlight_device
*bl
)
326 struct ps8622_bridge
*ps8622
= dev_get_drvdata(&bl
->dev
);
327 int ret
, brightness
= bl
->props
.brightness
;
329 if (bl
->props
.power
!= FB_BLANK_UNBLANK
||
330 bl
->props
.state
& (BL_CORE_SUSPENDED
| BL_CORE_FBBLANK
))
333 if (!ps8622
->enabled
)
336 ret
= ps8622_set(ps8622
->client
, 0x01, 0xa7, brightness
);
341 static const struct backlight_ops ps8622_backlight_ops
= {
342 .update_status
= ps8622_backlight_update
,
345 static void ps8622_pre_enable(struct drm_bridge
*bridge
)
347 struct ps8622_bridge
*ps8622
= bridge_to_ps8622(bridge
);
353 gpiod_set_value(ps8622
->gpio_rst
, 0);
356 ret
= regulator_enable(ps8622
->v12
);
358 DRM_ERROR("fails to enable ps8622->v12");
361 gpiod_set_value(ps8622
->gpio_slp
, 1);
364 * T1 is the range of time that it takes for the power to rise after we
365 * enable the lcd/ps8622 fet. T2 is the range of time in which the
366 * data sheet specifies we should deassert the reset pin.
368 * If it takes T1.max for the power to rise, we need to wait atleast
369 * T2.min before deasserting the reset pin. If it takes T1.min for the
370 * power to rise, we need to wait at most T2.max before deasserting the
373 usleep_range(PS8622_RST_HIGH_T2_MIN_US
+ PS8622_POWER_RISE_T1_MAX_US
,
374 PS8622_RST_HIGH_T2_MAX_US
+ PS8622_POWER_RISE_T1_MIN_US
);
376 gpiod_set_value(ps8622
->gpio_rst
, 1);
378 /* wait 20ms after RST high */
379 usleep_range(20000, 30000);
381 ret
= ps8622_send_config(ps8622
);
383 DRM_ERROR("Failed to send config to bridge (%d)\n", ret
);
387 ps8622
->enabled
= true;
390 static void ps8622_disable(struct drm_bridge
*bridge
)
392 /* Delay after panel is disabled */
393 msleep(PS8622_PWMO_END_T12_MS
);
396 static void ps8622_post_disable(struct drm_bridge
*bridge
)
398 struct ps8622_bridge
*ps8622
= bridge_to_ps8622(bridge
);
400 if (!ps8622
->enabled
)
403 ps8622
->enabled
= false;
406 * This doesn't matter if the regulators are turned off, but something
407 * else might keep them on. In that case, we want to assert the slp gpio
410 gpiod_set_value(ps8622
->gpio_slp
, 0);
413 regulator_disable(ps8622
->v12
);
416 * Sleep for at least the amount of time that it takes the power rail to
417 * fall to prevent asserting the rst gpio from doing anything.
419 usleep_range(PS8622_POWER_FALL_T16_MAX_US
,
420 2 * PS8622_POWER_FALL_T16_MAX_US
);
421 gpiod_set_value(ps8622
->gpio_rst
, 0);
423 msleep(PS8622_POWER_OFF_T17_MS
);
426 static int ps8622_attach(struct drm_bridge
*bridge
,
427 enum drm_bridge_attach_flags flags
)
429 struct ps8622_bridge
*ps8622
= bridge_to_ps8622(bridge
);
431 return drm_bridge_attach(ps8622
->bridge
.encoder
, ps8622
->panel_bridge
,
432 &ps8622
->bridge
, flags
);
435 static const struct drm_bridge_funcs ps8622_bridge_funcs
= {
436 .pre_enable
= ps8622_pre_enable
,
437 .disable
= ps8622_disable
,
438 .post_disable
= ps8622_post_disable
,
439 .attach
= ps8622_attach
,
442 static const struct of_device_id ps8622_devices
[] = {
443 {.compatible
= "parade,ps8622",},
444 {.compatible
= "parade,ps8625",},
447 MODULE_DEVICE_TABLE(of
, ps8622_devices
);
449 static int ps8622_probe(struct i2c_client
*client
,
450 const struct i2c_device_id
*id
)
452 struct device
*dev
= &client
->dev
;
453 struct ps8622_bridge
*ps8622
;
454 struct drm_bridge
*panel_bridge
;
455 struct drm_panel
*panel
;
458 ps8622
= devm_kzalloc(dev
, sizeof(*ps8622
), GFP_KERNEL
);
462 ret
= drm_of_find_panel_or_bridge(dev
->of_node
, 0, 0, &panel
, NULL
);
466 panel_bridge
= devm_drm_panel_bridge_add(dev
, panel
);
467 if (IS_ERR(panel_bridge
))
468 return PTR_ERR(panel_bridge
);
470 ps8622
->panel_bridge
= panel_bridge
;
471 ps8622
->client
= client
;
473 ps8622
->v12
= devm_regulator_get(dev
, "vdd12");
474 if (IS_ERR(ps8622
->v12
)) {
475 dev_info(dev
, "no 1.2v regulator found for PS8622\n");
479 ps8622
->gpio_slp
= devm_gpiod_get(dev
, "sleep", GPIOD_OUT_HIGH
);
480 if (IS_ERR(ps8622
->gpio_slp
)) {
481 ret
= PTR_ERR(ps8622
->gpio_slp
);
482 dev_err(dev
, "cannot get gpio_slp %d\n", ret
);
487 * Assert the reset pin high to avoid the bridge being
488 * initialized prematurely
490 ps8622
->gpio_rst
= devm_gpiod_get(dev
, "reset", GPIOD_OUT_HIGH
);
491 if (IS_ERR(ps8622
->gpio_rst
)) {
492 ret
= PTR_ERR(ps8622
->gpio_rst
);
493 dev_err(dev
, "cannot get gpio_rst %d\n", ret
);
497 ps8622
->max_lane_count
= id
->driver_data
;
499 if (of_property_read_u32(dev
->of_node
, "lane-count",
500 &ps8622
->lane_count
)) {
501 ps8622
->lane_count
= ps8622
->max_lane_count
;
502 } else if (ps8622
->lane_count
> ps8622
->max_lane_count
) {
503 dev_info(dev
, "lane-count property is too high,"
504 "using max_lane_count\n");
505 ps8622
->lane_count
= ps8622
->max_lane_count
;
508 if (!of_find_property(dev
->of_node
, "use-external-pwm", NULL
)) {
509 ps8622
->bl
= backlight_device_register("ps8622-backlight",
510 dev
, ps8622
, &ps8622_backlight_ops
,
512 if (IS_ERR(ps8622
->bl
)) {
513 DRM_ERROR("failed to register backlight\n");
514 ret
= PTR_ERR(ps8622
->bl
);
518 ps8622
->bl
->props
.max_brightness
= PS8622_MAX_BRIGHTNESS
;
519 ps8622
->bl
->props
.brightness
= PS8622_MAX_BRIGHTNESS
;
522 ps8622
->bridge
.funcs
= &ps8622_bridge_funcs
;
523 ps8622
->bridge
.type
= DRM_MODE_CONNECTOR_LVDS
;
524 ps8622
->bridge
.of_node
= dev
->of_node
;
525 drm_bridge_add(&ps8622
->bridge
);
527 i2c_set_clientdata(client
, ps8622
);
532 static int ps8622_remove(struct i2c_client
*client
)
534 struct ps8622_bridge
*ps8622
= i2c_get_clientdata(client
);
536 backlight_device_unregister(ps8622
->bl
);
537 drm_bridge_remove(&ps8622
->bridge
);
542 static const struct i2c_device_id ps8622_i2c_table
[] = {
543 /* Device type, max_lane_count */
548 MODULE_DEVICE_TABLE(i2c
, ps8622_i2c_table
);
550 static struct i2c_driver ps8622_driver
= {
551 .id_table
= ps8622_i2c_table
,
552 .probe
= ps8622_probe
,
553 .remove
= ps8622_remove
,
556 .of_match_table
= ps8622_devices
,
559 module_i2c_driver(ps8622_driver
);
561 MODULE_AUTHOR("Vincent Palatin <vpalatin@chromium.org>");
562 MODULE_DESCRIPTION("Parade ps8622/ps8625 eDP-LVDS converter driver");
563 MODULE_LICENSE("GPL v2");