1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020 Marek Vasut <marex@denx.de>
5 * Based on tc358764.c by
6 * Andrzej Hajda <a.hajda@samsung.com>
7 * Maciej Purski <m.purski@samsung.com>
9 * Based on rpi_touchscreen.c by
10 * Eric Anholt <eric@anholt.net>
13 #include <linux/delay.h>
14 #include <linux/module.h>
15 #include <linux/of_graph.h>
16 #include <linux/regulator/consumer.h>
18 #include <video/mipi_display.h>
20 #include <drm/drm_atomic_helper.h>
21 #include <drm/drm_crtc.h>
22 #include <drm/drm_fb_helper.h>
23 #include <drm/drm_mipi_dsi.h>
24 #include <drm/drm_of.h>
25 #include <drm/drm_panel.h>
26 #include <drm/drm_print.h>
27 #include <drm/drm_probe_helper.h>
29 /* PPI layer registers */
30 #define PPI_STARTPPI 0x0104 /* START control bit */
31 #define PPI_LPTXTIMECNT 0x0114 /* LPTX timing signal */
32 #define PPI_D0S_ATMR 0x0144
33 #define PPI_D1S_ATMR 0x0148
34 #define PPI_D0S_CLRSIPOCOUNT 0x0164 /* Assertion timer for Lane 0 */
35 #define PPI_D1S_CLRSIPOCOUNT 0x0168 /* Assertion timer for Lane 1 */
36 #define PPI_START_FUNCTION 1
38 /* DSI layer registers */
39 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX */
40 #define DSI_LANEENABLE 0x0210 /* Enables each lane */
41 #define DSI_RX_START 1
43 /* LCDC/DPI Host Registers */
44 #define LCDCTRL 0x0420
46 /* SPI Master Registers */
50 /* System Controller Registers */
51 #define SYSCTRL 0x0464
53 /* System registers */
56 /* Lane enable PPI and DSI register bits */
57 #define LANEENABLE_CLEN BIT(0)
58 #define LANEENABLE_L0EN BIT(1)
59 #define LANEENABLE_L1EN BIT(2)
63 struct drm_bridge bridge
;
64 struct drm_connector connector
;
65 struct regulator
*regulator
;
66 struct drm_bridge
*panel_bridge
;
71 static int tc358762_clear_error(struct tc358762
*ctx
)
79 static void tc358762_write(struct tc358762
*ctx
, u16 addr
, u32 val
)
81 struct mipi_dsi_device
*dsi
= to_mipi_dsi_device(ctx
->dev
);
95 ret
= mipi_dsi_generic_write(dsi
, data
, sizeof(data
));
100 static inline struct tc358762
*bridge_to_tc358762(struct drm_bridge
*bridge
)
102 return container_of(bridge
, struct tc358762
, bridge
);
105 static int tc358762_init(struct tc358762
*ctx
)
107 tc358762_write(ctx
, DSI_LANEENABLE
,
108 LANEENABLE_L0EN
| LANEENABLE_CLEN
);
109 tc358762_write(ctx
, PPI_D0S_CLRSIPOCOUNT
, 5);
110 tc358762_write(ctx
, PPI_D1S_CLRSIPOCOUNT
, 5);
111 tc358762_write(ctx
, PPI_D0S_ATMR
, 0);
112 tc358762_write(ctx
, PPI_D1S_ATMR
, 0);
113 tc358762_write(ctx
, PPI_LPTXTIMECNT
, LPX_PERIOD
);
115 tc358762_write(ctx
, SPICMR
, 0x00);
116 tc358762_write(ctx
, LCDCTRL
, 0x00100150);
117 tc358762_write(ctx
, SYSCTRL
, 0x040f);
120 tc358762_write(ctx
, PPI_STARTPPI
, PPI_START_FUNCTION
);
121 tc358762_write(ctx
, DSI_STARTDSI
, DSI_RX_START
);
125 return tc358762_clear_error(ctx
);
128 static void tc358762_post_disable(struct drm_bridge
*bridge
)
130 struct tc358762
*ctx
= bridge_to_tc358762(bridge
);
134 * The post_disable hook might be called multiple times.
135 * We want to avoid regulator imbalance below.
137 if (!ctx
->pre_enabled
)
140 ctx
->pre_enabled
= false;
142 ret
= regulator_disable(ctx
->regulator
);
144 dev_err(ctx
->dev
, "error disabling regulators (%d)\n", ret
);
147 static void tc358762_pre_enable(struct drm_bridge
*bridge
)
149 struct tc358762
*ctx
= bridge_to_tc358762(bridge
);
152 ret
= regulator_enable(ctx
->regulator
);
154 dev_err(ctx
->dev
, "error enabling regulators (%d)\n", ret
);
156 ret
= tc358762_init(ctx
);
158 dev_err(ctx
->dev
, "error initializing bridge (%d)\n", ret
);
160 ctx
->pre_enabled
= true;
163 static int tc358762_attach(struct drm_bridge
*bridge
,
164 enum drm_bridge_attach_flags flags
)
166 struct tc358762
*ctx
= bridge_to_tc358762(bridge
);
168 return drm_bridge_attach(bridge
->encoder
, ctx
->panel_bridge
,
172 static const struct drm_bridge_funcs tc358762_bridge_funcs
= {
173 .post_disable
= tc358762_post_disable
,
174 .pre_enable
= tc358762_pre_enable
,
175 .attach
= tc358762_attach
,
178 static int tc358762_parse_dt(struct tc358762
*ctx
)
180 struct drm_bridge
*panel_bridge
;
181 struct device
*dev
= ctx
->dev
;
182 struct drm_panel
*panel
;
185 ret
= drm_of_find_panel_or_bridge(dev
->of_node
, 1, 0, &panel
, NULL
);
189 panel_bridge
= devm_drm_panel_bridge_add(dev
, panel
);
191 if (IS_ERR(panel_bridge
))
192 return PTR_ERR(panel_bridge
);
194 ctx
->panel_bridge
= panel_bridge
;
199 static int tc358762_configure_regulators(struct tc358762
*ctx
)
201 ctx
->regulator
= devm_regulator_get(ctx
->dev
, "vddc");
202 if (IS_ERR(ctx
->regulator
))
203 return PTR_ERR(ctx
->regulator
);
208 static int tc358762_probe(struct mipi_dsi_device
*dsi
)
210 struct device
*dev
= &dsi
->dev
;
211 struct tc358762
*ctx
;
214 ctx
= devm_kzalloc(dev
, sizeof(struct tc358762
), GFP_KERNEL
);
218 mipi_dsi_set_drvdata(dsi
, ctx
);
221 ctx
->pre_enabled
= false;
223 /* TODO: Find out how to get dual-lane mode working */
225 dsi
->format
= MIPI_DSI_FMT_RGB888
;
226 dsi
->mode_flags
= MIPI_DSI_MODE_VIDEO
| MIPI_DSI_MODE_VIDEO_SYNC_PULSE
|
229 ret
= tc358762_parse_dt(ctx
);
233 ret
= tc358762_configure_regulators(ctx
);
237 ctx
->bridge
.funcs
= &tc358762_bridge_funcs
;
238 ctx
->bridge
.type
= DRM_MODE_CONNECTOR_DPI
;
239 ctx
->bridge
.of_node
= dev
->of_node
;
241 drm_bridge_add(&ctx
->bridge
);
243 ret
= mipi_dsi_attach(dsi
);
245 drm_bridge_remove(&ctx
->bridge
);
246 dev_err(dev
, "failed to attach dsi\n");
252 static int tc358762_remove(struct mipi_dsi_device
*dsi
)
254 struct tc358762
*ctx
= mipi_dsi_get_drvdata(dsi
);
256 mipi_dsi_detach(dsi
);
257 drm_bridge_remove(&ctx
->bridge
);
262 static const struct of_device_id tc358762_of_match
[] = {
263 { .compatible
= "toshiba,tc358762" },
266 MODULE_DEVICE_TABLE(of
, tc358762_of_match
);
268 static struct mipi_dsi_driver tc358762_driver
= {
269 .probe
= tc358762_probe
,
270 .remove
= tc358762_remove
,
273 .of_match_table
= tc358762_of_match
,
276 module_mipi_dsi_driver(tc358762_driver
);
278 MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
279 MODULE_DESCRIPTION("MIPI-DSI based Driver for TC358762 DSI/DPI Bridge");
280 MODULE_LICENSE("GPL v2");