WIP FPC-III support
[linux/fpc-iii.git] / drivers / gpu / drm / gma500 / accel_2d.c
blob437bbb6af9e6e50f71ba9574aae81c6d0637703c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /**************************************************************************
3 * Copyright (c) 2007-2011, Intel Corporation.
4 * All Rights Reserved.
6 * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
7 * develop this driver.
9 **************************************************************************/
11 #include <linux/console.h>
12 #include <linux/delay.h>
13 #include <linux/errno.h>
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/mm.h>
17 #include <linux/module.h>
18 #include <linux/slab.h>
19 #include <linux/string.h>
20 #include <linux/tty.h>
22 #include <drm/drm.h>
23 #include <drm/drm_crtc.h>
24 #include <drm/drm_fb_helper.h>
25 #include <drm/drm_fourcc.h>
27 #include "psb_drv.h"
28 #include "psb_reg.h"
30 /**
31 * psb_spank - reset the 2D engine
32 * @dev_priv: our PSB DRM device
34 * Soft reset the graphics engine and then reload the necessary registers.
35 * We use this at initialisation time but it will become relevant for
36 * accelerated X later
38 void psb_spank(struct drm_psb_private *dev_priv)
40 PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET |
41 _PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET |
42 _PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET |
43 _PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET);
44 PSB_RSGX32(PSB_CR_SOFT_RESET);
46 msleep(1);
48 PSB_WSGX32(0, PSB_CR_SOFT_RESET);
49 wmb();
50 PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT,
51 PSB_CR_BIF_CTRL);
52 wmb();
53 (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
55 msleep(1);
56 PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT,
57 PSB_CR_BIF_CTRL);
58 (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
59 PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);