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WIP FPC-III support
[linux/fpc-iii.git] / drivers / gpu / drm / i915 / display / intel_bios.c
blob4cc949b228f2dd5aa3f6c1383b5d69e8ef71bbdc
1 /*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 #include <drm/drm_dp_helper.h>
29
30 #include "display/intel_display.h"
31 #include "display/intel_display_types.h"
32 #include "display/intel_gmbus.h"
33
34 #include "i915_drv.h"
35
36 #define _INTEL_BIOS_PRIVATE
37 #include "intel_vbt_defs.h"
38
39 /**
40 * DOC: Video BIOS Table (VBT)
41 *
42 * The Video BIOS Table, or VBT, provides platform and board specific
43 * configuration information to the driver that is not discoverable or available
44 * through other means. The configuration is mostly related to display
45 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
46 * the PCI ROM.
47 *
48 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
49 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
50 * contain the actual configuration information. The VBT Header, and thus the
51 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
52 * BDB Header. The data blocks are concatenated after the BDB Header. The data
53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
54 * data. (Block 53, the MIPI Sequence Block is an exception.)
55 *
56 * The driver parses the VBT during load. The relevant information is stored in
57 * driver private data for ease of use, and the actual VBT is not read after
58 * that.
59 */
60
61 /* Wrapper for VBT child device config */
62 struct display_device_data {
63 struct child_device_config child;
64 struct dsc_compression_parameters_entry *dsc;
65 struct list_head node;
66 };
67
68 #define SLAVE_ADDR1 0x70
69 #define SLAVE_ADDR2 0x72
70
71 /* Get BDB block size given a pointer to Block ID. */
72 static u32 _get_blocksize(const u8 *block_base)
73 {
74 /* The MIPI Sequence Block v3+ has a separate size field. */
75 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
76 return *((const u32 *)(block_base + 4));
77 else
78 return *((const u16 *)(block_base + 1));
79 }
80
81 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
82 static u32 get_blocksize(const void *block_data)
83 {
84 return _get_blocksize(block_data - 3);
85 }
86
87 static const void *
88 find_section(const void *_bdb, enum bdb_block_id section_id)
89 {
90 const struct bdb_header *bdb = _bdb;
91 const u8 *base = _bdb;
92 int index = 0;
93 u32 total, current_size;
94 enum bdb_block_id current_id;
95
96 /* skip to first section */
97 index += bdb->header_size;
98 total = bdb->bdb_size;
99
100 /* walk the sections looking for section_id */
101 while (index + 3 < total) {
102 current_id = *(base + index);
103 current_size = _get_blocksize(base + index);
104 index += 3;
105
106 if (index + current_size > total)
107 return NULL;
108
109 if (current_id == section_id)
110 return base + index;
111
112 index += current_size;
113 }
114
115 return NULL;
116 }
117
118 static void
119 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
120 const struct lvds_dvo_timing *dvo_timing)
121 {
122 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
123 dvo_timing->hactive_lo;
124 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
125 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
126 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
127 ((dvo_timing->hsync_pulse_width_hi << 8) |
128 dvo_timing->hsync_pulse_width_lo);
129 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
130 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
131
132 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
133 dvo_timing->vactive_lo;
134 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
135 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
136 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
137 ((dvo_timing->vsync_pulse_width_hi << 4) |
138 dvo_timing->vsync_pulse_width_lo);
139 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
140 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
141 panel_fixed_mode->clock = dvo_timing->clock * 10;
142 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
143
144 if (dvo_timing->hsync_positive)
145 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
146 else
147 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
148
149 if (dvo_timing->vsync_positive)
150 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
151 else
152 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
153
154 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
155 dvo_timing->himage_lo;
156 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
157 dvo_timing->vimage_lo;
158
159 /* Some VBTs have bogus h/vtotal values */
160 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
161 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
162 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
163 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
164
165 drm_mode_set_name(panel_fixed_mode);
166 }
167
168 static const struct lvds_dvo_timing *
169 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
170 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
171 int index)
172 {
173 /*
174 * the size of fp_timing varies on the different platform.
175 * So calculate the DVO timing relative offset in LVDS data
176 * entry to get the DVO timing entry
177 */
178
179 int lfp_data_size =
180 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
181 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
182 int dvo_timing_offset =
183 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
184 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
185 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
186
187 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
188 }
189
190 /* get lvds_fp_timing entry
191 * this function may return NULL if the corresponding entry is invalid
192 */
193 static const struct lvds_fp_timing *
194 get_lvds_fp_timing(const struct bdb_header *bdb,
195 const struct bdb_lvds_lfp_data *data,
196 const struct bdb_lvds_lfp_data_ptrs *ptrs,
197 int index)
198 {
199 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
200 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
201 size_t ofs;
202
203 if (index >= ARRAY_SIZE(ptrs->ptr))
204 return NULL;
205 ofs = ptrs->ptr[index].fp_timing_offset;
206 if (ofs < data_ofs ||
207 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
208 return NULL;
209 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
210 }
211
212 /* Parse general panel options */
213 static void
214 parse_panel_options(struct drm_i915_private *dev_priv,
215 const struct bdb_header *bdb)
216 {
217 const struct bdb_lvds_options *lvds_options;
218 int panel_type;
219 int drrs_mode;
220 int ret;
221
222 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
223 if (!lvds_options)
224 return;
225
226 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
227
228 ret = intel_opregion_get_panel_type(dev_priv);
229 if (ret >= 0) {
230 drm_WARN_ON(&dev_priv->drm, ret > 0xf);
231 panel_type = ret;
232 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (OpRegion)\n",
233 panel_type);
234 } else {
235 if (lvds_options->panel_type > 0xf) {
236 drm_dbg_kms(&dev_priv->drm,
237 "Invalid VBT panel type 0x%x\n",
238 lvds_options->panel_type);
239 return;
240 }
241 panel_type = lvds_options->panel_type;
242 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (VBT)\n",
243 panel_type);
244 }
245
246 dev_priv->vbt.panel_type = panel_type;
247
248 drrs_mode = (lvds_options->dps_panel_type_bits
249 >> (panel_type * 2)) & MODE_MASK;
250 /*
251 * VBT has static DRRS = 0 and seamless DRRS = 2.
252 * The below piece of code is required to adjust vbt.drrs_type
253 * to match the enum drrs_support_type.
254 */
255 switch (drrs_mode) {
256 case 0:
257 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
258 drm_dbg_kms(&dev_priv->drm, "DRRS supported mode is static\n");
259 break;
260 case 2:
261 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
262 drm_dbg_kms(&dev_priv->drm,
263 "DRRS supported mode is seamless\n");
264 break;
265 default:
266 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
267 drm_dbg_kms(&dev_priv->drm,
268 "DRRS not supported (VBT input)\n");
269 break;
270 }
271 }
272
273 /* Try to find integrated panel timing data */
274 static void
275 parse_lfp_panel_dtd(struct drm_i915_private *dev_priv,
276 const struct bdb_header *bdb)
277 {
278 const struct bdb_lvds_lfp_data *lvds_lfp_data;
279 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
280 const struct lvds_dvo_timing *panel_dvo_timing;
281 const struct lvds_fp_timing *fp_timing;
282 struct drm_display_mode *panel_fixed_mode;
283 int panel_type = dev_priv->vbt.panel_type;
284
285 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
286 if (!lvds_lfp_data)
287 return;
288
289 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
290 if (!lvds_lfp_data_ptrs)
291 return;
292
293 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
294 lvds_lfp_data_ptrs,
295 panel_type);
296
297 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
298 if (!panel_fixed_mode)
299 return;
300
301 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
302
303 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
304
305 drm_dbg_kms(&dev_priv->drm,
306 "Found panel mode in BIOS VBT legacy lfp table:\n");
307 drm_mode_debug_printmodeline(panel_fixed_mode);
308
309 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
310 lvds_lfp_data_ptrs,
311 panel_type);
312 if (fp_timing) {
313 /* check the resolution, just to be sure */
314 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
315 fp_timing->y_res == panel_fixed_mode->vdisplay) {
316 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
317 drm_dbg_kms(&dev_priv->drm,
318 "VBT initial LVDS value %x\n",
319 dev_priv->vbt.bios_lvds_val);
320 }
321 }
322 }
323
324 static void
325 parse_generic_dtd(struct drm_i915_private *dev_priv,
326 const struct bdb_header *bdb)
327 {
328 const struct bdb_generic_dtd *generic_dtd;
329 const struct generic_dtd_entry *dtd;
330 struct drm_display_mode *panel_fixed_mode;
331 int num_dtd;
332
333 generic_dtd = find_section(bdb, BDB_GENERIC_DTD);
334 if (!generic_dtd)
335 return;
336
337 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
338 drm_err(&dev_priv->drm, "GDTD size %u is too small.\n",
339 generic_dtd->gdtd_size);
340 return;
341 } else if (generic_dtd->gdtd_size !=
342 sizeof(struct generic_dtd_entry)) {
343 drm_err(&dev_priv->drm, "Unexpected GDTD size %u\n",
344 generic_dtd->gdtd_size);
345 /* DTD has unknown fields, but keep going */
346 }
347
348 num_dtd = (get_blocksize(generic_dtd) -
349 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
350 if (dev_priv->vbt.panel_type >= num_dtd) {
351 drm_err(&dev_priv->drm,
352 "Panel type %d not found in table of %d DTD's\n",
353 dev_priv->vbt.panel_type, num_dtd);
354 return;
355 }
356
357 dtd = &generic_dtd->dtd[dev_priv->vbt.panel_type];
358
359 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
360 if (!panel_fixed_mode)
361 return;
362
363 panel_fixed_mode->hdisplay = dtd->hactive;
364 panel_fixed_mode->hsync_start =
365 panel_fixed_mode->hdisplay + dtd->hfront_porch;
366 panel_fixed_mode->hsync_end =
367 panel_fixed_mode->hsync_start + dtd->hsync;
368 panel_fixed_mode->htotal =
369 panel_fixed_mode->hdisplay + dtd->hblank;
370
371 panel_fixed_mode->vdisplay = dtd->vactive;
372 panel_fixed_mode->vsync_start =
373 panel_fixed_mode->vdisplay + dtd->vfront_porch;
374 panel_fixed_mode->vsync_end =
375 panel_fixed_mode->vsync_start + dtd->vsync;
376 panel_fixed_mode->vtotal =
377 panel_fixed_mode->vdisplay + dtd->vblank;
378
379 panel_fixed_mode->clock = dtd->pixel_clock;
380 panel_fixed_mode->width_mm = dtd->width_mm;
381 panel_fixed_mode->height_mm = dtd->height_mm;
382
383 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
384 drm_mode_set_name(panel_fixed_mode);
385
386 if (dtd->hsync_positive_polarity)
387 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
388 else
389 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
390
391 if (dtd->vsync_positive_polarity)
392 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
393 else
394 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
395
396 drm_dbg_kms(&dev_priv->drm,
397 "Found panel mode in BIOS VBT generic dtd table:\n");
398 drm_mode_debug_printmodeline(panel_fixed_mode);
399
400 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
401 }
402
403 static void
404 parse_panel_dtd(struct drm_i915_private *dev_priv,
405 const struct bdb_header *bdb)
406 {
407 /*
408 * Older VBTs provided provided DTD information for internal displays
409 * through the "LFP panel DTD" block (42). As of VBT revision 229,
410 * that block is now deprecated and DTD information should be provided
411 * via a newer "generic DTD" block (58). Just to be safe, we'll
412 * try the new generic DTD block first on VBT >= 229, but still fall
413 * back to trying the old LFP block if that fails.
414 */
415 if (bdb->version >= 229)
416 parse_generic_dtd(dev_priv, bdb);
417 if (!dev_priv->vbt.lfp_lvds_vbt_mode)
418 parse_lfp_panel_dtd(dev_priv, bdb);
419 }
420
421 static void
422 parse_lfp_backlight(struct drm_i915_private *dev_priv,
423 const struct bdb_header *bdb)
424 {
425 const struct bdb_lfp_backlight_data *backlight_data;
426 const struct lfp_backlight_data_entry *entry;
427 int panel_type = dev_priv->vbt.panel_type;
428 u16 level;
429
430 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
431 if (!backlight_data)
432 return;
433
434 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
435 drm_dbg_kms(&dev_priv->drm,
436 "Unsupported backlight data entry size %u\n",
437 backlight_data->entry_size);
438 return;
439 }
440
441 entry = &backlight_data->data[panel_type];
442
443 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
444 if (!dev_priv->vbt.backlight.present) {
445 drm_dbg_kms(&dev_priv->drm,
446 "PWM backlight not present in VBT (type %u)\n",
447 entry->type);
448 return;
449 }
450
451 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
452 if (bdb->version >= 191 &&
453 get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
454 const struct lfp_backlight_control_method *method;
455
456 method = &backlight_data->backlight_control[panel_type];
457 dev_priv->vbt.backlight.type = method->type;
458 dev_priv->vbt.backlight.controller = method->controller;
459 }
460
461 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
462 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
463
464 if (bdb->version >= 234) {
465 u16 min_level;
466 bool scale;
467
468 level = backlight_data->brightness_level[panel_type].level;
469 min_level = backlight_data->brightness_min_level[panel_type].level;
470
471 if (bdb->version >= 236)
472 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
473 else
474 scale = level > 255;
475
476 if (scale)
477 min_level = min_level / 255;
478
479 if (min_level > 255) {
480 drm_warn(&dev_priv->drm, "Brightness min level > 255\n");
481 level = 255;
482 }
483 dev_priv->vbt.backlight.min_brightness = min_level;
484 } else {
485 level = backlight_data->level[panel_type];
486 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
487 }
488
489 drm_dbg_kms(&dev_priv->drm,
490 "VBT backlight PWM modulation frequency %u Hz, "
491 "active %s, min brightness %u, level %u, controller %u\n",
492 dev_priv->vbt.backlight.pwm_freq_hz,
493 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
494 dev_priv->vbt.backlight.min_brightness,
495 level,
496 dev_priv->vbt.backlight.controller);
497 }
498
499 /* Try to find sdvo panel data */
500 static void
501 parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
502 const struct bdb_header *bdb)
503 {
504 const struct bdb_sdvo_panel_dtds *dtds;
505 struct drm_display_mode *panel_fixed_mode;
506 int index;
507
508 index = dev_priv->params.vbt_sdvo_panel_type;
509 if (index == -2) {
510 drm_dbg_kms(&dev_priv->drm,
511 "Ignore SDVO panel mode from BIOS VBT tables.\n");
512 return;
513 }
514
515 if (index == -1) {
516 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
517
518 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
519 if (!sdvo_lvds_options)
520 return;
521
522 index = sdvo_lvds_options->panel_type;
523 }
524
525 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
526 if (!dtds)
527 return;
528
529 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
530 if (!panel_fixed_mode)
531 return;
532
533 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
534
535 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
536
537 drm_dbg_kms(&dev_priv->drm,
538 "Found SDVO panel mode in BIOS VBT tables:\n");
539 drm_mode_debug_printmodeline(panel_fixed_mode);
540 }
541
542 static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
543 bool alternate)
544 {
545 switch (INTEL_GEN(dev_priv)) {
546 case 2:
547 return alternate ? 66667 : 48000;
548 case 3:
549 case 4:
550 return alternate ? 100000 : 96000;
551 default:
552 return alternate ? 100000 : 120000;
553 }
554 }
555
556 static void
557 parse_general_features(struct drm_i915_private *dev_priv,
558 const struct bdb_header *bdb)
559 {
560 const struct bdb_general_features *general;
561
562 general = find_section(bdb, BDB_GENERAL_FEATURES);
563 if (!general)
564 return;
565
566 dev_priv->vbt.int_tv_support = general->int_tv_support;
567 /* int_crt_support can't be trusted on earlier platforms */
568 if (bdb->version >= 155 &&
569 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
570 dev_priv->vbt.int_crt_support = general->int_crt_support;
571 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
572 dev_priv->vbt.lvds_ssc_freq =
573 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
574 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
575 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
576 if (bdb->version >= 181) {
577 dev_priv->vbt.orientation = general->rotate_180 ?
578 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
579 DRM_MODE_PANEL_ORIENTATION_NORMAL;
580 } else {
581 dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
582 }
583 drm_dbg_kms(&dev_priv->drm,
584 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
585 dev_priv->vbt.int_tv_support,
586 dev_priv->vbt.int_crt_support,
587 dev_priv->vbt.lvds_use_ssc,
588 dev_priv->vbt.lvds_ssc_freq,
589 dev_priv->vbt.display_clock_mode,
590 dev_priv->vbt.fdi_rx_polarity_inverted);
591 }
592
593 static const struct child_device_config *
594 child_device_ptr(const struct bdb_general_definitions *defs, int i)
595 {
596 return (const void *) &defs->devices[i * defs->child_dev_size];
597 }
598
599 static void
600 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
601 {
602 struct sdvo_device_mapping *mapping;
603 const struct display_device_data *devdata;
604 const struct child_device_config *child;
605 int count = 0;
606
607 /*
608 * Only parse SDVO mappings on gens that could have SDVO. This isn't
609 * accurate and doesn't have to be, as long as it's not too strict.
610 */
611 if (!IS_GEN_RANGE(dev_priv, 3, 7)) {
612 drm_dbg_kms(&dev_priv->drm, "Skipping SDVO device mapping\n");
613 return;
614 }
615
616 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
617 child = &devdata->child;
618
619 if (child->slave_addr != SLAVE_ADDR1 &&
620 child->slave_addr != SLAVE_ADDR2) {
621 /*
622 * If the slave address is neither 0x70 nor 0x72,
623 * it is not a SDVO device. Skip it.
624 */
625 continue;
626 }
627 if (child->dvo_port != DEVICE_PORT_DVOB &&
628 child->dvo_port != DEVICE_PORT_DVOC) {
629 /* skip the incorrect SDVO port */
630 drm_dbg_kms(&dev_priv->drm,
631 "Incorrect SDVO port. Skip it\n");
632 continue;
633 }
634 drm_dbg_kms(&dev_priv->drm,
635 "the SDVO device with slave addr %2x is found on"
636 " %s port\n",
637 child->slave_addr,
638 (child->dvo_port == DEVICE_PORT_DVOB) ?
639 "SDVOB" : "SDVOC");
640 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
641 if (!mapping->initialized) {
642 mapping->dvo_port = child->dvo_port;
643 mapping->slave_addr = child->slave_addr;
644 mapping->dvo_wiring = child->dvo_wiring;
645 mapping->ddc_pin = child->ddc_pin;
646 mapping->i2c_pin = child->i2c_pin;
647 mapping->initialized = 1;
648 drm_dbg_kms(&dev_priv->drm,
649 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
650 mapping->dvo_port, mapping->slave_addr,
651 mapping->dvo_wiring, mapping->ddc_pin,
652 mapping->i2c_pin);
653 } else {
654 drm_dbg_kms(&dev_priv->drm,
655 "Maybe one SDVO port is shared by "
656 "two SDVO device.\n");
657 }
658 if (child->slave2_addr) {
659 /* Maybe this is a SDVO device with multiple inputs */
660 /* And the mapping info is not added */
661 drm_dbg_kms(&dev_priv->drm,
662 "there exists the slave2_addr. Maybe this"
663 " is a SDVO device with multiple inputs.\n");
664 }
665 count++;
666 }
667
668 if (!count) {
669 /* No SDVO device info is found */
670 drm_dbg_kms(&dev_priv->drm,
671 "No SDVO device info is found in VBT\n");
672 }
673 }
674
675 static void
676 parse_driver_features(struct drm_i915_private *dev_priv,
677 const struct bdb_header *bdb)
678 {
679 const struct bdb_driver_features *driver;
680
681 driver = find_section(bdb, BDB_DRIVER_FEATURES);
682 if (!driver)
683 return;
684
685 if (INTEL_GEN(dev_priv) >= 5) {
686 /*
687 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
688 * to mean "eDP". The VBT spec doesn't agree with that
689 * interpretation, but real world VBTs seem to.
690 */
691 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
692 dev_priv->vbt.int_lvds_support = 0;
693 } else {
694 /*
695 * FIXME it's not clear which BDB version has the LVDS config
696 * bits defined. Revision history in the VBT spec says:
697 * "0.92 | Add two definitions for VBT value of LVDS Active
698 * Config (00b and 11b values defined) | 06/13/2005"
699 * but does not the specify the BDB version.
700 *
701 * So far version 134 (on i945gm) is the oldest VBT observed
702 * in the wild with the bits correctly populated. Version
703 * 108 (on i85x) does not have the bits correctly populated.
704 */
705 if (bdb->version >= 134 &&
706 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
707 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
708 dev_priv->vbt.int_lvds_support = 0;
709 }
710
711 if (bdb->version < 228) {
712 drm_dbg_kms(&dev_priv->drm, "DRRS State Enabled:%d\n",
713 driver->drrs_enabled);
714 /*
715 * If DRRS is not supported, drrs_type has to be set to 0.
716 * This is because, VBT is configured in such a way that
717 * static DRRS is 0 and DRRS not supported is represented by
718 * driver->drrs_enabled=false
719 */
720 if (!driver->drrs_enabled)
721 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
722
723 dev_priv->vbt.psr.enable = driver->psr_enabled;
724 }
725 }
726
727 static void
728 parse_power_conservation_features(struct drm_i915_private *dev_priv,
729 const struct bdb_header *bdb)
730 {
731 const struct bdb_lfp_power *power;
732 u8 panel_type = dev_priv->vbt.panel_type;
733
734 if (bdb->version < 228)
735 return;
736
737 power = find_section(bdb, BDB_LFP_POWER);
738 if (!power)
739 return;
740
741 dev_priv->vbt.psr.enable = power->psr & BIT(panel_type);
742
743 /*
744 * If DRRS is not supported, drrs_type has to be set to 0.
745 * This is because, VBT is configured in such a way that
746 * static DRRS is 0 and DRRS not supported is represented by
747 * power->drrs & BIT(panel_type)=false
748 */
749 if (!(power->drrs & BIT(panel_type)))
750 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
751
752 if (bdb->version >= 232)
753 dev_priv->vbt.edp.hobl = power->hobl & BIT(panel_type);
754 }
755
756 static void
757 parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
758 {
759 const struct bdb_edp *edp;
760 const struct edp_power_seq *edp_pps;
761 const struct edp_fast_link_params *edp_link_params;
762 int panel_type = dev_priv->vbt.panel_type;
763
764 edp = find_section(bdb, BDB_EDP);
765 if (!edp)
766 return;
767
768 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
769 case EDP_18BPP:
770 dev_priv->vbt.edp.bpp = 18;
771 break;
772 case EDP_24BPP:
773 dev_priv->vbt.edp.bpp = 24;
774 break;
775 case EDP_30BPP:
776 dev_priv->vbt.edp.bpp = 30;
777 break;
778 }
779
780 /* Get the eDP sequencing and link info */
781 edp_pps = &edp->power_seqs[panel_type];
782 edp_link_params = &edp->fast_link_params[panel_type];
783
784 dev_priv->vbt.edp.pps = *edp_pps;
785
786 switch (edp_link_params->rate) {
787 case EDP_RATE_1_62:
788 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
789 break;
790 case EDP_RATE_2_7:
791 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
792 break;
793 default:
794 drm_dbg_kms(&dev_priv->drm,
795 "VBT has unknown eDP link rate value %u\n",
796 edp_link_params->rate);
797 break;
798 }
799
800 switch (edp_link_params->lanes) {
801 case EDP_LANE_1:
802 dev_priv->vbt.edp.lanes = 1;
803 break;
804 case EDP_LANE_2:
805 dev_priv->vbt.edp.lanes = 2;
806 break;
807 case EDP_LANE_4:
808 dev_priv->vbt.edp.lanes = 4;
809 break;
810 default:
811 drm_dbg_kms(&dev_priv->drm,
812 "VBT has unknown eDP lane count value %u\n",
813 edp_link_params->lanes);
814 break;
815 }
816
817 switch (edp_link_params->preemphasis) {
818 case EDP_PREEMPHASIS_NONE:
819 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
820 break;
821 case EDP_PREEMPHASIS_3_5dB:
822 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
823 break;
824 case EDP_PREEMPHASIS_6dB:
825 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
826 break;
827 case EDP_PREEMPHASIS_9_5dB:
828 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
829 break;
830 default:
831 drm_dbg_kms(&dev_priv->drm,
832 "VBT has unknown eDP pre-emphasis value %u\n",
833 edp_link_params->preemphasis);
834 break;
835 }
836
837 switch (edp_link_params->vswing) {
838 case EDP_VSWING_0_4V:
839 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
840 break;
841 case EDP_VSWING_0_6V:
842 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
843 break;
844 case EDP_VSWING_0_8V:
845 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
846 break;
847 case EDP_VSWING_1_2V:
848 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
849 break;
850 default:
851 drm_dbg_kms(&dev_priv->drm,
852 "VBT has unknown eDP voltage swing value %u\n",
853 edp_link_params->vswing);
854 break;
855 }
856
857 if (bdb->version >= 173) {
858 u8 vswing;
859
860 /* Don't read from VBT if module parameter has valid value*/
861 if (dev_priv->params.edp_vswing) {
862 dev_priv->vbt.edp.low_vswing =
863 dev_priv->params.edp_vswing == 1;
864 } else {
865 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
866 dev_priv->vbt.edp.low_vswing = vswing == 0;
867 }
868 }
869 }
870
871 static void
872 parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
873 {
874 const struct bdb_psr *psr;
875 const struct psr_table *psr_table;
876 int panel_type = dev_priv->vbt.panel_type;
877
878 psr = find_section(bdb, BDB_PSR);
879 if (!psr) {
880 drm_dbg_kms(&dev_priv->drm, "No PSR BDB found.\n");
881 return;
882 }
883
884 psr_table = &psr->psr_table[panel_type];
885
886 dev_priv->vbt.psr.full_link = psr_table->full_link;
887 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
888
889 /* Allowed VBT values goes from 0 to 15 */
890 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
891 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
892
893 switch (psr_table->lines_to_wait) {
894 case 0:
895 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
896 break;
897 case 1:
898 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
899 break;
900 case 2:
901 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
902 break;
903 case 3:
904 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
905 break;
906 default:
907 drm_dbg_kms(&dev_priv->drm,
908 "VBT has unknown PSR lines to wait %u\n",
909 psr_table->lines_to_wait);
910 break;
911 }
912
913 /*
914 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
915 * Old decimal value is wake up time in multiples of 100 us.
916 */
917 if (bdb->version >= 205 &&
918 (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) ||
919 INTEL_GEN(dev_priv) >= 10)) {
920 switch (psr_table->tp1_wakeup_time) {
921 case 0:
922 dev_priv->vbt.psr.tp1_wakeup_time_us = 500;
923 break;
924 case 1:
925 dev_priv->vbt.psr.tp1_wakeup_time_us = 100;
926 break;
927 case 3:
928 dev_priv->vbt.psr.tp1_wakeup_time_us = 0;
929 break;
930 default:
931 drm_dbg_kms(&dev_priv->drm,
932 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
933 psr_table->tp1_wakeup_time);
934 fallthrough;
935 case 2:
936 dev_priv->vbt.psr.tp1_wakeup_time_us = 2500;
937 break;
938 }
939
940 switch (psr_table->tp2_tp3_wakeup_time) {
941 case 0:
942 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500;
943 break;
944 case 1:
945 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100;
946 break;
947 case 3:
948 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0;
949 break;
950 default:
951 drm_dbg_kms(&dev_priv->drm,
952 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
953 psr_table->tp2_tp3_wakeup_time);
954 fallthrough;
955 case 2:
956 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
957 break;
958 }
959 } else {
960 dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
961 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
962 }
963
964 if (bdb->version >= 226) {
965 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
966
967 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
968 switch (wakeup_time) {
969 case 0:
970 wakeup_time = 500;
971 break;
972 case 1:
973 wakeup_time = 100;
974 break;
975 case 3:
976 wakeup_time = 50;
977 break;
978 default:
979 case 2:
980 wakeup_time = 2500;
981 break;
982 }
983 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
984 } else {
985 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
986 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us;
987 }
988 }
989
990 static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv,
991 u16 version, enum port port)
992 {
993 if (!dev_priv->vbt.dsi.config->dual_link || version < 197) {
994 dev_priv->vbt.dsi.bl_ports = BIT(port);
995 if (dev_priv->vbt.dsi.config->cabc_supported)
996 dev_priv->vbt.dsi.cabc_ports = BIT(port);
997
998 return;
999 }
1000
1001 switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) {
1002 case DL_DCS_PORT_A:
1003 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A);
1004 break;
1005 case DL_DCS_PORT_C:
1006 dev_priv->vbt.dsi.bl_ports = BIT(PORT_C);
1007 break;
1008 default:
1009 case DL_DCS_PORT_A_AND_C:
1010 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
1011 break;
1012 }
1013
1014 if (!dev_priv->vbt.dsi.config->cabc_supported)
1015 return;
1016
1017 switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) {
1018 case DL_DCS_PORT_A:
1019 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A);
1020 break;
1021 case DL_DCS_PORT_C:
1022 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C);
1023 break;
1024 default:
1025 case DL_DCS_PORT_A_AND_C:
1026 dev_priv->vbt.dsi.cabc_ports =
1027 BIT(PORT_A) | BIT(PORT_C);
1028 break;
1029 }
1030 }
1031
1032 static void
1033 parse_mipi_config(struct drm_i915_private *dev_priv,
1034 const struct bdb_header *bdb)
1035 {
1036 const struct bdb_mipi_config *start;
1037 const struct mipi_config *config;
1038 const struct mipi_pps_data *pps;
1039 int panel_type = dev_priv->vbt.panel_type;
1040 enum port port;
1041
1042 /* parse MIPI blocks only if LFP type is MIPI */
1043 if (!intel_bios_is_dsi_present(dev_priv, &port))
1044 return;
1045
1046 /* Initialize this to undefined indicating no generic MIPI support */
1047 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1048
1049 /* Block #40 is already parsed and panel_fixed_mode is
1050 * stored in dev_priv->lfp_lvds_vbt_mode
1051 * resuse this when needed
1052 */
1053
1054 /* Parse #52 for panel index used from panel_type already
1055 * parsed
1056 */
1057 start = find_section(bdb, BDB_MIPI_CONFIG);
1058 if (!start) {
1059 drm_dbg_kms(&dev_priv->drm, "No MIPI config BDB found");
1060 return;
1061 }
1062
1063 drm_dbg(&dev_priv->drm, "Found MIPI Config block, panel index = %d\n",
1064 panel_type);
1065
1066 /*
1067 * get hold of the correct configuration block and pps data as per
1068 * the panel_type as index
1069 */
1070 config = &start->config[panel_type];
1071 pps = &start->pps[panel_type];
1072
1073 /* store as of now full data. Trim when we realise all is not needed */
1074 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1075 if (!dev_priv->vbt.dsi.config)
1076 return;
1077
1078 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1079 if (!dev_priv->vbt.dsi.pps) {
1080 kfree(dev_priv->vbt.dsi.config);
1081 return;
1082 }
1083
1084 parse_dsi_backlight_ports(dev_priv, bdb->version, port);
1085
1086 /* FIXME is the 90 vs. 270 correct? */
1087 switch (config->rotation) {
1088 case ENABLE_ROTATION_0:
1089 /*
1090 * Most (all?) VBTs claim 0 degrees despite having
1091 * an upside down panel, thus we do not trust this.
1092 */
1093 dev_priv->vbt.dsi.orientation =
1094 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1095 break;
1096 case ENABLE_ROTATION_90:
1097 dev_priv->vbt.dsi.orientation =
1098 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1099 break;
1100 case ENABLE_ROTATION_180:
1101 dev_priv->vbt.dsi.orientation =
1102 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1103 break;
1104 case ENABLE_ROTATION_270:
1105 dev_priv->vbt.dsi.orientation =
1106 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1107 break;
1108 }
1109
1110 /* We have mandatory mipi config blocks. Initialize as generic panel */
1111 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1112 }
1113
1114 /* Find the sequence block and size for the given panel. */
1115 static const u8 *
1116 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1117 u16 panel_id, u32 *seq_size)
1118 {
1119 u32 total = get_blocksize(sequence);
1120 const u8 *data = &sequence->data[0];
1121 u8 current_id;
1122 u32 current_size;
1123 int header_size = sequence->version >= 3 ? 5 : 3;
1124 int index = 0;
1125 int i;
1126
1127 /* skip new block size */
1128 if (sequence->version >= 3)
1129 data += 4;
1130
1131 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1132 if (index + header_size > total) {
1133 DRM_ERROR("Invalid sequence block (header)\n");
1134 return NULL;
1135 }
1136
1137 current_id = *(data + index);
1138 if (sequence->version >= 3)
1139 current_size = *((const u32 *)(data + index + 1));
1140 else
1141 current_size = *((const u16 *)(data + index + 1));
1142
1143 index += header_size;
1144
1145 if (index + current_size > total) {
1146 DRM_ERROR("Invalid sequence block\n");
1147 return NULL;
1148 }
1149
1150 if (current_id == panel_id) {
1151 *seq_size = current_size;
1152 return data + index;
1153 }
1154
1155 index += current_size;
1156 }
1157
1158 DRM_ERROR("Sequence block detected but no valid configuration\n");
1159
1160 return NULL;
1161 }
1162
1163 static int goto_next_sequence(const u8 *data, int index, int total)
1164 {
1165 u16 len;
1166
1167 /* Skip Sequence Byte. */
1168 for (index = index + 1; index < total; index += len) {
1169 u8 operation_byte = *(data + index);
1170 index++;
1171
1172 switch (operation_byte) {
1173 case MIPI_SEQ_ELEM_END:
1174 return index;
1175 case MIPI_SEQ_ELEM_SEND_PKT:
1176 if (index + 4 > total)
1177 return 0;
1178
1179 len = *((const u16 *)(data + index + 2)) + 4;
1180 break;
1181 case MIPI_SEQ_ELEM_DELAY:
1182 len = 4;
1183 break;
1184 case MIPI_SEQ_ELEM_GPIO:
1185 len = 2;
1186 break;
1187 case MIPI_SEQ_ELEM_I2C:
1188 if (index + 7 > total)
1189 return 0;
1190 len = *(data + index + 6) + 7;
1191 break;
1192 default:
1193 DRM_ERROR("Unknown operation byte\n");
1194 return 0;
1195 }
1196 }
1197
1198 return 0;
1199 }
1200
1201 static int goto_next_sequence_v3(const u8 *data, int index, int total)
1202 {
1203 int seq_end;
1204 u16 len;
1205 u32 size_of_sequence;
1206
1207 /*
1208 * Could skip sequence based on Size of Sequence alone, but also do some
1209 * checking on the structure.
1210 */
1211 if (total < 5) {
1212 DRM_ERROR("Too small sequence size\n");
1213 return 0;
1214 }
1215
1216 /* Skip Sequence Byte. */
1217 index++;
1218
1219 /*
1220 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1221 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1222 * byte.
1223 */
1224 size_of_sequence = *((const u32 *)(data + index));
1225 index += 4;
1226
1227 seq_end = index + size_of_sequence;
1228 if (seq_end > total) {
1229 DRM_ERROR("Invalid sequence size\n");
1230 return 0;
1231 }
1232
1233 for (; index < total; index += len) {
1234 u8 operation_byte = *(data + index);
1235 index++;
1236
1237 if (operation_byte == MIPI_SEQ_ELEM_END) {
1238 if (index != seq_end) {
1239 DRM_ERROR("Invalid element structure\n");
1240 return 0;
1241 }
1242 return index;
1243 }
1244
1245 len = *(data + index);
1246 index++;
1247
1248 /*
1249 * FIXME: Would be nice to check elements like for v1/v2 in
1250 * goto_next_sequence() above.
1251 */
1252 switch (operation_byte) {
1253 case MIPI_SEQ_ELEM_SEND_PKT:
1254 case MIPI_SEQ_ELEM_DELAY:
1255 case MIPI_SEQ_ELEM_GPIO:
1256 case MIPI_SEQ_ELEM_I2C:
1257 case MIPI_SEQ_ELEM_SPI:
1258 case MIPI_SEQ_ELEM_PMIC:
1259 break;
1260 default:
1261 DRM_ERROR("Unknown operation byte %u\n",
1262 operation_byte);
1263 break;
1264 }
1265 }
1266
1267 return 0;
1268 }
1269
1270 /*
1271 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1272 * skip all delay + gpio operands and stop at the first DSI packet op.
1273 */
1274 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv)
1275 {
1276 const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1277 int index, len;
1278
1279 if (drm_WARN_ON(&dev_priv->drm,
1280 !data || dev_priv->vbt.dsi.seq_version != 1))
1281 return 0;
1282
1283 /* index = 1 to skip sequence byte */
1284 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1285 switch (data[index]) {
1286 case MIPI_SEQ_ELEM_SEND_PKT:
1287 return index == 1 ? 0 : index;
1288 case MIPI_SEQ_ELEM_DELAY:
1289 len = 5; /* 1 byte for operand + uint32 */
1290 break;
1291 case MIPI_SEQ_ELEM_GPIO:
1292 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1293 break;
1294 default:
1295 return 0;
1296 }
1297 }
1298
1299 return 0;
1300 }
1301
1302 /*
1303 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1304 * The deassert must be done before calling intel_dsi_device_ready, so for
1305 * these devices we split the init OTP sequence into a deassert sequence and
1306 * the actual init OTP part.
1307 */
1308 static void fixup_mipi_sequences(struct drm_i915_private *dev_priv)
1309 {
1310 u8 *init_otp;
1311 int len;
1312
1313 /* Limit this to VLV for now. */
1314 if (!IS_VALLEYVIEW(dev_priv))
1315 return;
1316
1317 /* Limit this to v1 vid-mode sequences */
1318 if (dev_priv->vbt.dsi.config->is_cmd_mode ||
1319 dev_priv->vbt.dsi.seq_version != 1)
1320 return;
1321
1322 /* Only do this if there are otp and assert seqs and no deassert seq */
1323 if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1324 !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1325 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1326 return;
1327
1328 /* The deassert-sequence ends at the first DSI packet */
1329 len = get_init_otp_deassert_fragment_len(dev_priv);
1330 if (!len)
1331 return;
1332
1333 drm_dbg_kms(&dev_priv->drm,
1334 "Using init OTP fragment to deassert reset\n");
1335
1336 /* Copy the fragment, update seq byte and terminate it */
1337 init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1338 dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1339 if (!dev_priv->vbt.dsi.deassert_seq)
1340 return;
1341 dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1342 dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1343 /* Use the copy for deassert */
1344 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1345 dev_priv->vbt.dsi.deassert_seq;
1346 /* Replace the last byte of the fragment with init OTP seq byte */
1347 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1348 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1349 dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1350 }
1351
1352 static void
1353 parse_mipi_sequence(struct drm_i915_private *dev_priv,
1354 const struct bdb_header *bdb)
1355 {
1356 int panel_type = dev_priv->vbt.panel_type;
1357 const struct bdb_mipi_sequence *sequence;
1358 const u8 *seq_data;
1359 u32 seq_size;
1360 u8 *data;
1361 int index = 0;
1362
1363 /* Only our generic panel driver uses the sequence block. */
1364 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1365 return;
1366
1367 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1368 if (!sequence) {
1369 drm_dbg_kms(&dev_priv->drm,
1370 "No MIPI Sequence found, parsing complete\n");
1371 return;
1372 }
1373
1374 /* Fail gracefully for forward incompatible sequence block. */
1375 if (sequence->version >= 4) {
1376 drm_err(&dev_priv->drm,
1377 "Unable to parse MIPI Sequence Block v%u\n",
1378 sequence->version);
1379 return;
1380 }
1381
1382 drm_dbg(&dev_priv->drm, "Found MIPI sequence block v%u\n",
1383 sequence->version);
1384
1385 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1386 if (!seq_data)
1387 return;
1388
1389 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1390 if (!data)
1391 return;
1392
1393 /* Parse the sequences, store pointers to each sequence. */
1394 for (;;) {
1395 u8 seq_id = *(data + index);
1396 if (seq_id == MIPI_SEQ_END)
1397 break;
1398
1399 if (seq_id >= MIPI_SEQ_MAX) {
1400 drm_err(&dev_priv->drm, "Unknown sequence %u\n",
1401 seq_id);
1402 goto err;
1403 }
1404
1405 /* Log about presence of sequences we won't run. */
1406 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1407 drm_dbg_kms(&dev_priv->drm,
1408 "Unsupported sequence %u\n", seq_id);
1409
1410 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
1411
1412 if (sequence->version >= 3)
1413 index = goto_next_sequence_v3(data, index, seq_size);
1414 else
1415 index = goto_next_sequence(data, index, seq_size);
1416 if (!index) {
1417 drm_err(&dev_priv->drm, "Invalid sequence %u\n",
1418 seq_id);
1419 goto err;
1420 }
1421 }
1422
1423 dev_priv->vbt.dsi.data = data;
1424 dev_priv->vbt.dsi.size = seq_size;
1425 dev_priv->vbt.dsi.seq_version = sequence->version;
1426
1427 fixup_mipi_sequences(dev_priv);
1428
1429 drm_dbg(&dev_priv->drm, "MIPI related VBT parsing complete\n");
1430 return;
1431
1432 err:
1433 kfree(data);
1434 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
1435 }
1436
1437 static void
1438 parse_compression_parameters(struct drm_i915_private *i915,
1439 const struct bdb_header *bdb)
1440 {
1441 const struct bdb_compression_parameters *params;
1442 struct display_device_data *devdata;
1443 const struct child_device_config *child;
1444 u16 block_size;
1445 int index;
1446
1447 if (bdb->version < 198)
1448 return;
1449
1450 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
1451 if (params) {
1452 /* Sanity checks */
1453 if (params->entry_size != sizeof(params->data[0])) {
1454 drm_dbg_kms(&i915->drm,
1455 "VBT: unsupported compression param entry size\n");
1456 return;
1457 }
1458
1459 block_size = get_blocksize(params);
1460 if (block_size < sizeof(*params)) {
1461 drm_dbg_kms(&i915->drm,
1462 "VBT: expected 16 compression param entries\n");
1463 return;
1464 }
1465 }
1466
1467 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1468 child = &devdata->child;
1469
1470 if (!child->compression_enable)
1471 continue;
1472
1473 if (!params) {
1474 drm_dbg_kms(&i915->drm,
1475 "VBT: compression params not available\n");
1476 continue;
1477 }
1478
1479 if (child->compression_method_cps) {
1480 drm_dbg_kms(&i915->drm,
1481 "VBT: CPS compression not supported\n");
1482 continue;
1483 }
1484
1485 index = child->compression_structure_index;
1486
1487 devdata->dsc = kmemdup(&params->data[index],
1488 sizeof(*devdata->dsc), GFP_KERNEL);
1489 }
1490 }
1491
1492 static u8 translate_iboost(u8 val)
1493 {
1494 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1495
1496 if (val >= ARRAY_SIZE(mapping)) {
1497 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1498 return 0;
1499 }
1500 return mapping[val];
1501 }
1502
1503 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1504 {
1505 const struct ddi_vbt_port_info *info;
1506 enum port port;
1507
1508 for_each_port(port) {
1509 info = &i915->vbt.ddi_port_info[port];
1510
1511 if (info->child && ddc_pin == info->alternate_ddc_pin)
1512 return port;
1513 }
1514
1515 return PORT_NONE;
1516 }
1517
1518 static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
1519 enum port port)
1520 {
1521 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1522 enum port p;
1523
1524 if (!info->alternate_ddc_pin)
1525 return;
1526
1527 p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin);
1528 if (p != PORT_NONE) {
1529 drm_dbg_kms(&dev_priv->drm,
1530 "port %c trying to use the same DDC pin (0x%x) as port %c, "
1531 "disabling port %c DVI/HDMI support\n",
1532 port_name(port), info->alternate_ddc_pin,
1533 port_name(p), port_name(p));
1534
1535 /*
1536 * If we have multiple ports supposedly sharing the
1537 * pin, then dvi/hdmi couldn't exist on the shared
1538 * port. Otherwise they share the same ddc bin and
1539 * system couldn't communicate with them separately.
1540 *
1541 * Give inverse child device order the priority,
1542 * last one wins. Yes, there are real machines
1543 * (eg. Asrock B250M-HDV) where VBT has both
1544 * port A and port E with the same AUX ch and
1545 * we must pick port E :(
1546 */
1547 info = &dev_priv->vbt.ddi_port_info[p];
1548
1549 info->supports_dvi = false;
1550 info->supports_hdmi = false;
1551 info->alternate_ddc_pin = 0;
1552 }
1553 }
1554
1555 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
1556 {
1557 const struct ddi_vbt_port_info *info;
1558 enum port port;
1559
1560 for_each_port(port) {
1561 info = &i915->vbt.ddi_port_info[port];
1562
1563 if (info->child && aux_ch == info->alternate_aux_channel)
1564 return port;
1565 }
1566
1567 return PORT_NONE;
1568 }
1569
1570 static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
1571 enum port port)
1572 {
1573 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1574 enum port p;
1575
1576 if (!info->alternate_aux_channel)
1577 return;
1578
1579 p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel);
1580 if (p != PORT_NONE) {
1581 drm_dbg_kms(&dev_priv->drm,
1582 "port %c trying to use the same AUX CH (0x%x) as port %c, "
1583 "disabling port %c DP support\n",
1584 port_name(port), info->alternate_aux_channel,
1585 port_name(p), port_name(p));
1586
1587 /*
1588 * If we have multiple ports supposedlt sharing the
1589 * aux channel, then DP couldn't exist on the shared
1590 * port. Otherwise they share the same aux channel
1591 * and system couldn't communicate with them separately.
1592 *
1593 * Give inverse child device order the priority,
1594 * last one wins. Yes, there are real machines
1595 * (eg. Asrock B250M-HDV) where VBT has both
1596 * port A and port E with the same AUX ch and
1597 * we must pick port E :(
1598 */
1599 info = &dev_priv->vbt.ddi_port_info[p];
1600
1601 info->supports_dp = false;
1602 info->alternate_aux_channel = 0;
1603 }
1604 }
1605
1606 static const u8 cnp_ddc_pin_map[] = {
1607 [0] = 0, /* N/A */
1608 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1609 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1610 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1611 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1612 };
1613
1614 static const u8 icp_ddc_pin_map[] = {
1615 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1616 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1617 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1618 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1619 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1620 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1621 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1622 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1623 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1624 };
1625
1626 static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
1627 {
1628 const u8 *ddc_pin_map;
1629 int n_entries;
1630
1631 if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1) {
1632 return vbt_pin;
1633 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) {
1634 ddc_pin_map = icp_ddc_pin_map;
1635 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1636 } else if (HAS_PCH_CNP(dev_priv)) {
1637 ddc_pin_map = cnp_ddc_pin_map;
1638 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1639 } else {
1640 /* Assuming direct map */
1641 return vbt_pin;
1642 }
1643
1644 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1645 return ddc_pin_map[vbt_pin];
1646
1647 drm_dbg_kms(&dev_priv->drm,
1648 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1649 vbt_pin);
1650 return 0;
1651 }
1652
1653 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
1654 const int port_mapping[][3], u8 dvo_port)
1655 {
1656 enum port port;
1657 int i;
1658
1659 for (port = PORT_A; port < n_ports; port++) {
1660 for (i = 0; i < n_dvo; i++) {
1661 if (port_mapping[port][i] == -1)
1662 break;
1663
1664 if (dvo_port == port_mapping[port][i])
1665 return port;
1666 }
1667 }
1668
1669 return PORT_NONE;
1670 }
1671
1672 static enum port dvo_port_to_port(struct drm_i915_private *dev_priv,
1673 u8 dvo_port)
1674 {
1675 /*
1676 * Each DDI port can have more than one value on the "DVO Port" field,
1677 * so look for all the possible values for each port.
1678 */
1679 static const int port_mapping[][3] = {
1680 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1681 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1682 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1683 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1684 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
1685 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1686 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1687 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
1688 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
1689 };
1690 /*
1691 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
1692 * map to DDI A,B,TC1,TC2 respectively.
1693 */
1694 static const int rkl_port_mapping[][3] = {
1695 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1696 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1697 [PORT_C] = { -1 },
1698 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1699 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1700 };
1701
1702 if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
1703 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
1704 ARRAY_SIZE(rkl_port_mapping[0]),
1705 rkl_port_mapping,
1706 dvo_port);
1707 else
1708 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
1709 ARRAY_SIZE(port_mapping[0]),
1710 port_mapping,
1711 dvo_port);
1712 }
1713
1714 static void parse_ddi_port(struct drm_i915_private *dev_priv,
1715 struct display_device_data *devdata,
1716 u8 bdb_version)
1717 {
1718 const struct child_device_config *child = &devdata->child;
1719 struct ddi_vbt_port_info *info;
1720 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
1721 enum port port;
1722
1723 port = dvo_port_to_port(dev_priv, child->dvo_port);
1724 if (port == PORT_NONE)
1725 return;
1726
1727 info = &dev_priv->vbt.ddi_port_info[port];
1728
1729 if (info->child) {
1730 drm_dbg_kms(&dev_priv->drm,
1731 "More than one child device for port %c in VBT, using the first.\n",
1732 port_name(port));
1733 return;
1734 }
1735
1736 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1737 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1738 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1739 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1740 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
1741
1742 if (port == PORT_A && is_dvi && INTEL_GEN(dev_priv) < 12) {
1743 drm_dbg_kms(&dev_priv->drm,
1744 "VBT claims port A supports DVI%s, ignoring\n",
1745 is_hdmi ? "/HDMI" : "");
1746 is_dvi = false;
1747 is_hdmi = false;
1748 }
1749
1750 info->supports_dvi = is_dvi;
1751 info->supports_hdmi = is_hdmi;
1752 info->supports_dp = is_dp;
1753 info->supports_edp = is_edp;
1754
1755 if (bdb_version >= 195)
1756 info->supports_typec_usb = child->dp_usb_type_c;
1757
1758 if (bdb_version >= 209)
1759 info->supports_tbt = child->tbt;
1760
1761 drm_dbg_kms(&dev_priv->drm,
1762 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
1763 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
1764 HAS_LSPCON(dev_priv) && child->lspcon,
1765 info->supports_typec_usb, info->supports_tbt,
1766 devdata->dsc != NULL);
1767
1768 if (is_dvi) {
1769 u8 ddc_pin;
1770
1771 ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin);
1772 if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) {
1773 info->alternate_ddc_pin = ddc_pin;
1774 sanitize_ddc_pin(dev_priv, port);
1775 } else {
1776 drm_dbg_kms(&dev_priv->drm,
1777 "Port %c has invalid DDC pin %d, "
1778 "sticking to defaults\n",
1779 port_name(port), ddc_pin);
1780 }
1781 }
1782
1783 if (is_dp) {
1784 info->alternate_aux_channel = child->aux_channel;
1785
1786 sanitize_aux_ch(dev_priv, port);
1787 }
1788
1789 if (bdb_version >= 158) {
1790 /* The VBT HDMI level shift values match the table we have. */
1791 u8 hdmi_level_shift = child->hdmi_level_shifter_value;
1792 drm_dbg_kms(&dev_priv->drm,
1793 "VBT HDMI level shift for port %c: %d\n",
1794 port_name(port),
1795 hdmi_level_shift);
1796 info->hdmi_level_shift = hdmi_level_shift;
1797 info->hdmi_level_shift_set = true;
1798 }
1799
1800 if (bdb_version >= 204) {
1801 int max_tmds_clock;
1802
1803 switch (child->hdmi_max_data_rate) {
1804 default:
1805 MISSING_CASE(child->hdmi_max_data_rate);
1806 fallthrough;
1807 case HDMI_MAX_DATA_RATE_PLATFORM:
1808 max_tmds_clock = 0;
1809 break;
1810 case HDMI_MAX_DATA_RATE_297:
1811 max_tmds_clock = 297000;
1812 break;
1813 case HDMI_MAX_DATA_RATE_165:
1814 max_tmds_clock = 165000;
1815 break;
1816 }
1817
1818 if (max_tmds_clock)
1819 drm_dbg_kms(&dev_priv->drm,
1820 "VBT HDMI max TMDS clock for port %c: %d kHz\n",
1821 port_name(port), max_tmds_clock);
1822 info->max_tmds_clock = max_tmds_clock;
1823 }
1824
1825 /* Parse the I_boost config for SKL and above */
1826 if (bdb_version >= 196 && child->iboost) {
1827 info->dp_boost_level = translate_iboost(child->dp_iboost_level);
1828 drm_dbg_kms(&dev_priv->drm,
1829 "VBT (e)DP boost level for port %c: %d\n",
1830 port_name(port), info->dp_boost_level);
1831 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level);
1832 drm_dbg_kms(&dev_priv->drm,
1833 "VBT HDMI boost level for port %c: %d\n",
1834 port_name(port), info->hdmi_boost_level);
1835 }
1836
1837 /* DP max link rate for CNL+ */
1838 if (bdb_version >= 216) {
1839 switch (child->dp_max_link_rate) {
1840 default:
1841 case VBT_DP_MAX_LINK_RATE_HBR3:
1842 info->dp_max_link_rate = 810000;
1843 break;
1844 case VBT_DP_MAX_LINK_RATE_HBR2:
1845 info->dp_max_link_rate = 540000;
1846 break;
1847 case VBT_DP_MAX_LINK_RATE_HBR:
1848 info->dp_max_link_rate = 270000;
1849 break;
1850 case VBT_DP_MAX_LINK_RATE_LBR:
1851 info->dp_max_link_rate = 162000;
1852 break;
1853 }
1854 drm_dbg_kms(&dev_priv->drm,
1855 "VBT DP max link rate for port %c: %d\n",
1856 port_name(port), info->dp_max_link_rate);
1857 }
1858
1859 info->child = child;
1860 }
1861
1862 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
1863 {
1864 struct display_device_data *devdata;
1865
1866 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
1867 return;
1868
1869 if (bdb_version < 155)
1870 return;
1871
1872 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node)
1873 parse_ddi_port(dev_priv, devdata, bdb_version);
1874 }
1875
1876 static void
1877 parse_general_definitions(struct drm_i915_private *dev_priv,
1878 const struct bdb_header *bdb)
1879 {
1880 const struct bdb_general_definitions *defs;
1881 struct display_device_data *devdata;
1882 const struct child_device_config *child;
1883 int i, child_device_num;
1884 u8 expected_size;
1885 u16 block_size;
1886 int bus_pin;
1887
1888 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1889 if (!defs) {
1890 drm_dbg_kms(&dev_priv->drm,
1891 "No general definition block is found, no devices defined.\n");
1892 return;
1893 }
1894
1895 block_size = get_blocksize(defs);
1896 if (block_size < sizeof(*defs)) {
1897 drm_dbg_kms(&dev_priv->drm,
1898 "General definitions block too small (%u)\n",
1899 block_size);
1900 return;
1901 }
1902
1903 bus_pin = defs->crt_ddc_gmbus_pin;
1904 drm_dbg_kms(&dev_priv->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
1905 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
1906 dev_priv->vbt.crt_ddc_pin = bus_pin;
1907
1908 if (bdb->version < 106) {
1909 expected_size = 22;
1910 } else if (bdb->version < 111) {
1911 expected_size = 27;
1912 } else if (bdb->version < 195) {
1913 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
1914 } else if (bdb->version == 195) {
1915 expected_size = 37;
1916 } else if (bdb->version <= 215) {
1917 expected_size = 38;
1918 } else if (bdb->version <= 237) {
1919 expected_size = 39;
1920 } else {
1921 expected_size = sizeof(*child);
1922 BUILD_BUG_ON(sizeof(*child) < 39);
1923 drm_dbg(&dev_priv->drm,
1924 "Expected child device config size for VBT version %u not known; assuming %u\n",
1925 bdb->version, expected_size);
1926 }
1927
1928 /* Flag an error for unexpected size, but continue anyway. */
1929 if (defs->child_dev_size != expected_size)
1930 drm_err(&dev_priv->drm,
1931 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
1932 defs->child_dev_size, expected_size, bdb->version);
1933
1934 /* The legacy sized child device config is the minimum we need. */
1935 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
1936 drm_dbg_kms(&dev_priv->drm,
1937 "Child device config size %u is too small.\n",
1938 defs->child_dev_size);
1939 return;
1940 }
1941
1942 /* get the number of child device */
1943 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
1944
1945 for (i = 0; i < child_device_num; i++) {
1946 child = child_device_ptr(defs, i);
1947 if (!child->device_type)
1948 continue;
1949
1950 drm_dbg_kms(&dev_priv->drm,
1951 "Found VBT child device with type 0x%x\n",
1952 child->device_type);
1953
1954 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
1955 if (!devdata)
1956 break;
1957
1958 /*
1959 * Copy as much as we know (sizeof) and is available
1960 * (child_dev_size) of the child device config. Accessing the
1961 * data must depend on VBT version.
1962 */
1963 memcpy(&devdata->child, child,
1964 min_t(size_t, defs->child_dev_size, sizeof(*child)));
1965
1966 list_add_tail(&devdata->node, &dev_priv->vbt.display_devices);
1967 }
1968
1969 if (list_empty(&dev_priv->vbt.display_devices))
1970 drm_dbg_kms(&dev_priv->drm,
1971 "no child dev is parsed from VBT\n");
1972 }
1973
1974 /* Common defaults which may be overridden by VBT. */
1975 static void
1976 init_vbt_defaults(struct drm_i915_private *dev_priv)
1977 {
1978 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
1979
1980 /* Default to having backlight */
1981 dev_priv->vbt.backlight.present = true;
1982
1983 /* LFP panel data */
1984 dev_priv->vbt.lvds_dither = 1;
1985
1986 /* SDVO panel data */
1987 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1988
1989 /* general features */
1990 dev_priv->vbt.int_tv_support = 1;
1991 dev_priv->vbt.int_crt_support = 1;
1992
1993 /* driver features */
1994 dev_priv->vbt.int_lvds_support = 1;
1995
1996 /* Default to using SSC */
1997 dev_priv->vbt.lvds_use_ssc = 1;
1998 /*
1999 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2000 * clock for LVDS.
2001 */
2002 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
2003 !HAS_PCH_SPLIT(dev_priv));
2004 drm_dbg_kms(&dev_priv->drm, "Set default to SSC at %d kHz\n",
2005 dev_priv->vbt.lvds_ssc_freq);
2006 }
2007
2008 /* Defaults to initialize only if there is no VBT. */
2009 static void
2010 init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
2011 {
2012 enum port port;
2013
2014 for_each_port(port) {
2015 struct ddi_vbt_port_info *info =
2016 &dev_priv->vbt.ddi_port_info[port];
2017 enum phy phy = intel_port_to_phy(dev_priv, port);
2018
2019 /*
2020 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2021 * to detect it.
2022 */
2023 if (intel_phy_is_tc(dev_priv, phy))
2024 continue;
2025
2026 info->supports_dvi = (port != PORT_A && port != PORT_E);
2027 info->supports_hdmi = info->supports_dvi;
2028 info->supports_dp = (port != PORT_E);
2029 info->supports_edp = (port == PORT_A);
2030 }
2031 }
2032
2033 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2034 {
2035 const void *_vbt = vbt;
2036
2037 return _vbt + vbt->bdb_offset;
2038 }
2039
2040 /**
2041 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2042 * @buf: pointer to a buffer to validate
2043 * @size: size of the buffer
2044 *
2045 * Returns true on valid VBT.
2046 */
2047 bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2048 {
2049 const struct vbt_header *vbt = buf;
2050 const struct bdb_header *bdb;
2051
2052 if (!vbt)
2053 return false;
2054
2055 if (sizeof(struct vbt_header) > size) {
2056 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2057 return false;
2058 }
2059
2060 if (memcmp(vbt->signature, "$VBT", 4)) {
2061 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2062 return false;
2063 }
2064
2065 if (vbt->vbt_size > size) {
2066 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2067 return false;
2068 }
2069
2070 size = vbt->vbt_size;
2071
2072 if (range_overflows_t(size_t,
2073 vbt->bdb_offset,
2074 sizeof(struct bdb_header),
2075 size)) {
2076 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2077 return false;
2078 }
2079
2080 bdb = get_bdb_header(vbt);
2081 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2082 DRM_DEBUG_DRIVER("BDB incomplete\n");
2083 return false;
2084 }
2085
2086 return vbt;
2087 }
2088
2089 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *dev_priv)
2090 {
2091 struct pci_dev *pdev = dev_priv->drm.pdev;
2092 void __iomem *p = NULL, *oprom;
2093 struct vbt_header *vbt;
2094 u16 vbt_size;
2095 size_t i, size;
2096
2097 oprom = pci_map_rom(pdev, &size);
2098 if (!oprom)
2099 return NULL;
2100
2101 /* Scour memory looking for the VBT signature. */
2102 for (i = 0; i + 4 < size; i += 4) {
2103 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
2104 continue;
2105
2106 p = oprom + i;
2107 size -= i;
2108 break;
2109 }
2110
2111 if (!p)
2112 goto err_unmap_oprom;
2113
2114 if (sizeof(struct vbt_header) > size) {
2115 drm_dbg(&dev_priv->drm, "VBT header incomplete\n");
2116 goto err_unmap_oprom;
2117 }
2118
2119 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2120 if (vbt_size > size) {
2121 drm_dbg(&dev_priv->drm,
2122 "VBT incomplete (vbt_size overflows)\n");
2123 goto err_unmap_oprom;
2124 }
2125
2126 /* The rest will be validated by intel_bios_is_valid_vbt() */
2127 vbt = kmalloc(vbt_size, GFP_KERNEL);
2128 if (!vbt)
2129 goto err_unmap_oprom;
2130
2131 memcpy_fromio(vbt, p, vbt_size);
2132
2133 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2134 goto err_free_vbt;
2135
2136 pci_unmap_rom(pdev, oprom);
2137
2138 return vbt;
2139
2140 err_free_vbt:
2141 kfree(vbt);
2142 err_unmap_oprom:
2143 pci_unmap_rom(pdev, oprom);
2144
2145 return NULL;
2146 }
2147
2148 /**
2149 * intel_bios_init - find VBT and initialize settings from the BIOS
2150 * @dev_priv: i915 device instance
2151 *
2152 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2153 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2154 * initialize some defaults if the VBT is not present at all.
2155 */
2156 void intel_bios_init(struct drm_i915_private *dev_priv)
2157 {
2158 const struct vbt_header *vbt = dev_priv->opregion.vbt;
2159 struct vbt_header *oprom_vbt = NULL;
2160 const struct bdb_header *bdb;
2161
2162 INIT_LIST_HEAD(&dev_priv->vbt.display_devices);
2163
2164 if (!HAS_DISPLAY(dev_priv)) {
2165 drm_dbg_kms(&dev_priv->drm,
2166 "Skipping VBT init due to disabled display.\n");
2167 return;
2168 }
2169
2170 init_vbt_defaults(dev_priv);
2171
2172 /* If the OpRegion does not have VBT, look in PCI ROM. */
2173 if (!vbt) {
2174 oprom_vbt = oprom_get_vbt(dev_priv);
2175 if (!oprom_vbt)
2176 goto out;
2177
2178 vbt = oprom_vbt;
2179
2180 drm_dbg_kms(&dev_priv->drm, "Found valid VBT in PCI ROM\n");
2181 }
2182
2183 bdb = get_bdb_header(vbt);
2184
2185 drm_dbg_kms(&dev_priv->drm,
2186 "VBT signature \"%.*s\", BDB version %d\n",
2187 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
2188
2189 /* Grab useful general definitions */
2190 parse_general_features(dev_priv, bdb);
2191 parse_general_definitions(dev_priv, bdb);
2192 parse_panel_options(dev_priv, bdb);
2193 parse_panel_dtd(dev_priv, bdb);
2194 parse_lfp_backlight(dev_priv, bdb);
2195 parse_sdvo_panel_data(dev_priv, bdb);
2196 parse_driver_features(dev_priv, bdb);
2197 parse_power_conservation_features(dev_priv, bdb);
2198 parse_edp(dev_priv, bdb);
2199 parse_psr(dev_priv, bdb);
2200 parse_mipi_config(dev_priv, bdb);
2201 parse_mipi_sequence(dev_priv, bdb);
2202
2203 /* Depends on child device list */
2204 parse_compression_parameters(dev_priv, bdb);
2205
2206 /* Further processing on pre-parsed data */
2207 parse_sdvo_device_mapping(dev_priv, bdb->version);
2208 parse_ddi_ports(dev_priv, bdb->version);
2209
2210 out:
2211 if (!vbt) {
2212 drm_info(&dev_priv->drm,
2213 "Failed to find VBIOS tables (VBT)\n");
2214 init_vbt_missing_defaults(dev_priv);
2215 }
2216
2217 kfree(oprom_vbt);
2218 }
2219
2220 /**
2221 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2222 * @dev_priv: i915 device instance
2223 */
2224 void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
2225 {
2226 struct display_device_data *devdata, *n;
2227
2228 list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) {
2229 list_del(&devdata->node);
2230 kfree(devdata->dsc);
2231 kfree(devdata);
2232 }
2233
2234 kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);
2235 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
2236 kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
2237 dev_priv->vbt.lfp_lvds_vbt_mode = NULL;
2238 kfree(dev_priv->vbt.dsi.data);
2239 dev_priv->vbt.dsi.data = NULL;
2240 kfree(dev_priv->vbt.dsi.pps);
2241 dev_priv->vbt.dsi.pps = NULL;
2242 kfree(dev_priv->vbt.dsi.config);
2243 dev_priv->vbt.dsi.config = NULL;
2244 kfree(dev_priv->vbt.dsi.deassert_seq);
2245 dev_priv->vbt.dsi.deassert_seq = NULL;
2246 }
2247
2248 /**
2249 * intel_bios_is_tv_present - is integrated TV present in VBT
2250 * @dev_priv: i915 device instance
2251 *
2252 * Return true if TV is present. If no child devices were parsed from VBT,
2253 * assume TV is present.
2254 */
2255 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
2256 {
2257 const struct display_device_data *devdata;
2258 const struct child_device_config *child;
2259
2260 if (!dev_priv->vbt.int_tv_support)
2261 return false;
2262
2263 if (list_empty(&dev_priv->vbt.display_devices))
2264 return true;
2265
2266 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2267 child = &devdata->child;
2268
2269 /*
2270 * If the device type is not TV, continue.
2271 */
2272 switch (child->device_type) {
2273 case DEVICE_TYPE_INT_TV:
2274 case DEVICE_TYPE_TV:
2275 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
2276 break;
2277 default:
2278 continue;
2279 }
2280 /* Only when the addin_offset is non-zero, it is regarded
2281 * as present.
2282 */
2283 if (child->addin_offset)
2284 return true;
2285 }
2286
2287 return false;
2288 }
2289
2290 /**
2291 * intel_bios_is_lvds_present - is LVDS present in VBT
2292 * @dev_priv: i915 device instance
2293 * @i2c_pin: i2c pin for LVDS if present
2294 *
2295 * Return true if LVDS is present. If no child devices were parsed from VBT,
2296 * assume LVDS is present.
2297 */
2298 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
2299 {
2300 const struct display_device_data *devdata;
2301 const struct child_device_config *child;
2302
2303 if (list_empty(&dev_priv->vbt.display_devices))
2304 return true;
2305
2306 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2307 child = &devdata->child;
2308
2309 /* If the device type is not LFP, continue.
2310 * We have to check both the new identifiers as well as the
2311 * old for compatibility with some BIOSes.
2312 */
2313 if (child->device_type != DEVICE_TYPE_INT_LFP &&
2314 child->device_type != DEVICE_TYPE_LFP)
2315 continue;
2316
2317 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
2318 *i2c_pin = child->i2c_pin;
2319
2320 /* However, we cannot trust the BIOS writers to populate
2321 * the VBT correctly. Since LVDS requires additional
2322 * information from AIM blocks, a non-zero addin offset is
2323 * a good indicator that the LVDS is actually present.
2324 */
2325 if (child->addin_offset)
2326 return true;
2327
2328 /* But even then some BIOS writers perform some black magic
2329 * and instantiate the device without reference to any
2330 * additional data. Trust that if the VBT was written into
2331 * the OpRegion then they have validated the LVDS's existence.
2332 */
2333 if (dev_priv->opregion.vbt)
2334 return true;
2335 }
2336
2337 return false;
2338 }
2339
2340 /**
2341 * intel_bios_is_port_present - is the specified digital port present
2342 * @dev_priv: i915 device instance
2343 * @port: port to check
2344 *
2345 * Return true if the device in %port is present.
2346 */
2347 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
2348 {
2349 const struct display_device_data *devdata;
2350 const struct child_device_config *child;
2351 static const struct {
2352 u16 dp, hdmi;
2353 } port_mapping[] = {
2354 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2355 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2356 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2357 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2358 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2359 };
2360
2361 if (HAS_DDI(dev_priv)) {
2362 const struct ddi_vbt_port_info *port_info =
2363 &dev_priv->vbt.ddi_port_info[port];
2364
2365 return port_info->child;
2366 }
2367
2368 /* FIXME maybe deal with port A as well? */
2369 if (drm_WARN_ON(&dev_priv->drm,
2370 port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
2371 return false;
2372
2373 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2374 child = &devdata->child;
2375
2376 if ((child->dvo_port == port_mapping[port].dp ||
2377 child->dvo_port == port_mapping[port].hdmi) &&
2378 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
2379 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
2380 return true;
2381 }
2382
2383 return false;
2384 }
2385
2386 /**
2387 * intel_bios_is_port_edp - is the device in given port eDP
2388 * @dev_priv: i915 device instance
2389 * @port: port to check
2390 *
2391 * Return true if the device in %port is eDP.
2392 */
2393 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
2394 {
2395 const struct display_device_data *devdata;
2396 const struct child_device_config *child;
2397 static const short port_mapping[] = {
2398 [PORT_B] = DVO_PORT_DPB,
2399 [PORT_C] = DVO_PORT_DPC,
2400 [PORT_D] = DVO_PORT_DPD,
2401 [PORT_E] = DVO_PORT_DPE,
2402 [PORT_F] = DVO_PORT_DPF,
2403 };
2404
2405 if (HAS_DDI(dev_priv))
2406 return dev_priv->vbt.ddi_port_info[port].supports_edp;
2407
2408 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2409 child = &devdata->child;
2410
2411 if (child->dvo_port == port_mapping[port] &&
2412 (child->device_type & DEVICE_TYPE_eDP_BITS) ==
2413 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
2414 return true;
2415 }
2416
2417 return false;
2418 }
2419
2420 static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
2421 enum port port)
2422 {
2423 static const struct {
2424 u16 dp, hdmi;
2425 } port_mapping[] = {
2426 /*
2427 * Buggy VBTs may declare DP ports as having
2428 * HDMI type dvo_port :( So let's check both.
2429 */
2430 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2431 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2432 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2433 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2434 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2435 };
2436
2437 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2438 return false;
2439
2440 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
2441 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
2442 return false;
2443
2444 if (child->dvo_port == port_mapping[port].dp)
2445 return true;
2446
2447 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2448 if (child->dvo_port == port_mapping[port].hdmi &&
2449 child->aux_channel != 0)
2450 return true;
2451
2452 return false;
2453 }
2454
2455 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
2456 enum port port)
2457 {
2458 const struct display_device_data *devdata;
2459
2460 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2461 if (child_dev_is_dp_dual_mode(&devdata->child, port))
2462 return true;
2463 }
2464
2465 return false;
2466 }
2467
2468 /**
2469 * intel_bios_is_dsi_present - is DSI present in VBT
2470 * @dev_priv: i915 device instance
2471 * @port: port for DSI if present
2472 *
2473 * Return true if DSI is present, and return the port in %port.
2474 */
2475 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
2476 enum port *port)
2477 {
2478 const struct display_device_data *devdata;
2479 const struct child_device_config *child;
2480 u8 dvo_port;
2481
2482 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2483 child = &devdata->child;
2484
2485 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2486 continue;
2487
2488 dvo_port = child->dvo_port;
2489
2490 if (dvo_port == DVO_PORT_MIPIA ||
2491 (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) ||
2492 (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) {
2493 if (port)
2494 *port = dvo_port - DVO_PORT_MIPIA;
2495 return true;
2496 } else if (dvo_port == DVO_PORT_MIPIB ||
2497 dvo_port == DVO_PORT_MIPIC ||
2498 dvo_port == DVO_PORT_MIPID) {
2499 drm_dbg_kms(&dev_priv->drm,
2500 "VBT has unsupported DSI port %c\n",
2501 port_name(dvo_port - DVO_PORT_MIPIA));
2502 }
2503 }
2504
2505 return false;
2506 }
2507
2508 static void fill_dsc(struct intel_crtc_state *crtc_state,
2509 struct dsc_compression_parameters_entry *dsc,
2510 int dsc_max_bpc)
2511 {
2512 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
2513 int bpc = 8;
2514
2515 vdsc_cfg->dsc_version_major = dsc->version_major;
2516 vdsc_cfg->dsc_version_minor = dsc->version_minor;
2517
2518 if (dsc->support_12bpc && dsc_max_bpc >= 12)
2519 bpc = 12;
2520 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
2521 bpc = 10;
2522 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
2523 bpc = 8;
2524 else
2525 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
2526 dsc_max_bpc);
2527
2528 crtc_state->pipe_bpp = bpc * 3;
2529
2530 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
2531 VBT_DSC_MAX_BPP(dsc->max_bpp));
2532
2533 /*
2534 * FIXME: This is ugly, and slice count should take DSC engine
2535 * throughput etc. into account.
2536 *
2537 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
2538 */
2539 if (dsc->slices_per_line & BIT(2)) {
2540 crtc_state->dsc.slice_count = 4;
2541 } else if (dsc->slices_per_line & BIT(1)) {
2542 crtc_state->dsc.slice_count = 2;
2543 } else {
2544 /* FIXME */
2545 if (!(dsc->slices_per_line & BIT(0)))
2546 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
2547
2548 crtc_state->dsc.slice_count = 1;
2549 }
2550
2551 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
2552 crtc_state->dsc.slice_count != 0)
2553 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
2554 crtc_state->hw.adjusted_mode.crtc_hdisplay,
2555 crtc_state->dsc.slice_count);
2556
2557 /*
2558 * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the
2559 * implementation specific physical rate buffer size. Currently we use
2560 * the required rate buffer model size calculated in
2561 * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E.
2562 *
2563 * The VBT rc_buffer_block_size and rc_buffer_size definitions
2564 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC
2565 * implementation should also use the DPCD (or perhaps VBT for eDP)
2566 * provided value for the buffer size.
2567 */
2568
2569 /* FIXME: DSI spec says bpc + 1 for this one */
2570 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
2571
2572 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
2573
2574 vdsc_cfg->slice_height = dsc->slice_height;
2575 }
2576
2577 /* FIXME: initially DSI specific */
2578 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
2579 struct intel_crtc_state *crtc_state,
2580 int dsc_max_bpc)
2581 {
2582 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2583 const struct display_device_data *devdata;
2584 const struct child_device_config *child;
2585
2586 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2587 child = &devdata->child;
2588
2589 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2590 continue;
2591
2592 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
2593 if (!devdata->dsc)
2594 return false;
2595
2596 if (crtc_state)
2597 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
2598
2599 return true;
2600 }
2601 }
2602
2603 return false;
2604 }
2605
2606 /**
2607 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
2608 * @i915: i915 device instance
2609 * @port: port to check
2610 *
2611 * Return true if HPD should be inverted for %port.
2612 */
2613 bool
2614 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
2615 enum port port)
2616 {
2617 const struct child_device_config *child =
2618 i915->vbt.ddi_port_info[port].child;
2619
2620 if (drm_WARN_ON_ONCE(&i915->drm, !IS_GEN9_LP(i915)))
2621 return false;
2622
2623 return child && child->hpd_invert;
2624 }
2625
2626 /**
2627 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2628 * @i915: i915 device instance
2629 * @port: port to check
2630 *
2631 * Return true if LSPCON is present on this port
2632 */
2633 bool
2634 intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
2635 enum port port)
2636 {
2637 const struct child_device_config *child =
2638 i915->vbt.ddi_port_info[port].child;
2639
2640 return HAS_LSPCON(i915) && child && child->lspcon;
2641 }
2642
2643 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv,
2644 enum port port)
2645 {
2646 const struct ddi_vbt_port_info *info =
2647 &dev_priv->vbt.ddi_port_info[port];
2648 enum aux_ch aux_ch;
2649
2650 if (!info->alternate_aux_channel) {
2651 aux_ch = (enum aux_ch)port;
2652
2653 drm_dbg_kms(&dev_priv->drm,
2654 "using AUX %c for port %c (platform default)\n",
2655 aux_ch_name(aux_ch), port_name(port));
2656 return aux_ch;
2657 }
2658
2659 switch (info->alternate_aux_channel) {
2660 case DP_AUX_A:
2661 aux_ch = AUX_CH_A;
2662 break;
2663 case DP_AUX_B:
2664 aux_ch = AUX_CH_B;
2665 break;
2666 case DP_AUX_C:
2667 /*
2668 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
2669 * map to DDI A,B,TC1,TC2 respectively.
2670 */
2671 aux_ch = (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) ?
2672 AUX_CH_USBC1 : AUX_CH_C;
2673 break;
2674 case DP_AUX_D:
2675 aux_ch = (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) ?
2676 AUX_CH_USBC2 : AUX_CH_D;
2677 break;
2678 case DP_AUX_E:
2679 aux_ch = AUX_CH_E;
2680 break;
2681 case DP_AUX_F:
2682 aux_ch = AUX_CH_F;
2683 break;
2684 case DP_AUX_G:
2685 aux_ch = AUX_CH_G;
2686 break;
2687 case DP_AUX_H:
2688 aux_ch = AUX_CH_H;
2689 break;
2690 case DP_AUX_I:
2691 aux_ch = AUX_CH_I;
2692 break;
2693 default:
2694 MISSING_CASE(info->alternate_aux_channel);
2695 aux_ch = AUX_CH_A;
2696 break;
2697 }
2698
2699 drm_dbg_kms(&dev_priv->drm, "using AUX %c for port %c (VBT)\n",
2700 aux_ch_name(aux_ch), port_name(port));
2701
2702 return aux_ch;
2703 }
2704
2705 int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
2706 {
2707 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2708
2709 return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
2710 }
2711
2712 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
2713 {
2714 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2715 const struct ddi_vbt_port_info *info =
2716 &i915->vbt.ddi_port_info[encoder->port];
2717
2718 return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1;
2719 }
2720
2721 int intel_bios_dp_boost_level(struct intel_encoder *encoder)
2722 {
2723 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2724
2725 return i915->vbt.ddi_port_info[encoder->port].dp_boost_level;
2726 }
2727
2728 int intel_bios_hdmi_boost_level(struct intel_encoder *encoder)
2729 {
2730 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2731
2732 return i915->vbt.ddi_port_info[encoder->port].hdmi_boost_level;
2733 }
2734
2735 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
2736 {
2737 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2738
2739 return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate;
2740 }
2741
2742 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
2743 {
2744 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2745
2746 return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin;
2747 }
2748
2749 bool intel_bios_port_supports_dvi(struct drm_i915_private *i915, enum port port)
2750 {
2751 return i915->vbt.ddi_port_info[port].supports_dvi;
2752 }
2753
2754 bool intel_bios_port_supports_hdmi(struct drm_i915_private *i915, enum port port)
2755 {
2756 return i915->vbt.ddi_port_info[port].supports_hdmi;
2757 }
2758
2759 bool intel_bios_port_supports_dp(struct drm_i915_private *i915, enum port port)
2760 {
2761 return i915->vbt.ddi_port_info[port].supports_dp;
2762 }
2763
2764 bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915,
2765 enum port port)
2766 {
2767 return i915->vbt.ddi_port_info[port].supports_typec_usb;
2768 }
2769
2770 bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port port)
2771 {
2772 return i915->vbt.ddi_port_info[port].supports_tbt;
2773 }
Linux with added FPC-III support