drivers/gpu/drm/i915/gt/gen6_ppgtt.h

   1 /* SPDX-License-Identifier: MIT */
   2 /*
   3  * Copyright © 2020 Intel Corporation
   4  */
   5
   6 #ifndef __GEN6_PPGTT_H__
   7 #define __GEN6_PPGTT_H__
   8
   9 #include "intel_gtt.h"
  10
  11 struct i915_gem_ww_ctx;
  12
  13 struct gen6_ppgtt {
  14         struct i915_ppgtt base;
  15
  16         struct mutex flush;
  17         struct i915_vma *vma;
  18         gen6_pte_t __iomem *pd_addr;
  19         u32 pp_dir;
  20
  21         atomic_t pin_count;
  22         struct mutex pin_mutex;
  23
  24         bool scan_for_unused_pt;
  25 };
  26
  27 static inline u32 gen6_pte_index(u32 addr)
  28 {
  29         return i915_pte_index(addr, GEN6_PDE_SHIFT);
  30 }
  31
  32 static inline u32 gen6_pte_count(u32 addr, u32 length)
  33 {
  34         return i915_pte_count(addr, length, GEN6_PDE_SHIFT);
  35 }
  36
  37 static inline u32 gen6_pde_index(u32 addr)
  38 {
  39         return i915_pde_index(addr, GEN6_PDE_SHIFT);
  40 }
  41
  42 #define __to_gen6_ppgtt(base) container_of(base, struct gen6_ppgtt, base)
  43
  44 static inline struct gen6_ppgtt *to_gen6_ppgtt(struct i915_ppgtt *base)
  45 {
  46         BUILD_BUG_ON(offsetof(struct gen6_ppgtt, base));
  47         return __to_gen6_ppgtt(base);
  48 }
  49
  50 /*
  51  * gen6_for_each_pde() iterates over every pde from start until start+length.
  52  * If start and start+length are not perfectly divisible, the macro will round
  53  * down and up as needed. Start=0 and length=2G effectively iterates over
  54  * every PDE in the system. The macro modifies ALL its parameters except 'pd',
  55  * so each of the other parameters should preferably be a simple variable, or
  56  * at most an lvalue with no side-effects!
  57  */
  58 #define gen6_for_each_pde(pt, pd, start, length, iter)                  \
  59         for (iter = gen6_pde_index(start);                              \
  60              length > 0 && iter < I915_PDES &&                          \
  61                      (pt = i915_pt_entry(pd, iter), true);              \
  62              ({ u32 temp = ALIGN(start+1, 1 << GEN6_PDE_SHIFT);         \
  63                     temp = min(temp - start, length);                   \
  64                     start += temp, length -= temp; }), ++iter)
  65
  66 #define gen6_for_all_pdes(pt, pd, iter)                                 \
  67         for (iter = 0;                                                  \
  68              iter < I915_PDES &&                                        \
  69                      (pt = i915_pt_entry(pd, iter), true);              \
  70              ++iter)
  71
  72 int gen6_ppgtt_pin(struct i915_ppgtt *base, struct i915_gem_ww_ctx *ww);
  73 void gen6_ppgtt_unpin(struct i915_ppgtt *base);
  74 void gen6_ppgtt_unpin_all(struct i915_ppgtt *base);
  75 void gen6_ppgtt_enable(struct intel_gt *gt);
  76 void gen7_ppgtt_enable(struct intel_gt *gt);
  77 struct i915_ppgtt *gen6_ppgtt_create(struct intel_gt *gt);
  78
  79 #endif