drivers/gpu/drm/imx/imx-ldb.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * i.MX drm driver - LVDS display bridge
   4  *
   5  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   6  */
   7
   8 #include <linux/clk.h>
   9 #include <linux/component.h>
  10 #include <linux/mfd/syscon.h>
  11 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  12 #include <linux/module.h>
  13 #include <linux/of_device.h>
  14 #include <linux/of_graph.h>
  15 #include <linux/regmap.h>
  16 #include <linux/videodev2.h>
  17
  18 #include <video/of_display_timing.h>
  19 #include <video/of_videomode.h>
  20
  21 #include <drm/drm_atomic.h>
  22 #include <drm/drm_atomic_helper.h>
  23 #include <drm/drm_bridge.h>
  24 #include <drm/drm_fb_helper.h>
  25 #include <drm/drm_of.h>
  26 #include <drm/drm_panel.h>
  27 #include <drm/drm_print.h>
  28 #include <drm/drm_probe_helper.h>
  29 #include <drm/drm_simple_kms_helper.h>
  30
  31 #include "imx-drm.h"
  32
  33 #define DRIVER_NAME "imx-ldb"
  34
  35 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  36 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  37 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  38 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  39 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  40 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  41 #define LDB_SPLIT_MODE_EN               (1 << 4)
  42 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  43 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  44 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  45 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  46 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  47 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  48 #define LDB_BGREF_RMODE_INT             (1 << 15)
  49
  50 struct imx_ldb;
  51
  52 struct imx_ldb_channel {
  53         struct imx_ldb *ldb;
  54         struct drm_connector connector;
  55         struct drm_encoder encoder;
  56
  57         /* Defines what is connected to the ldb, only one at a time */
  58         struct drm_panel *panel;
  59         struct drm_bridge *bridge;
  60
  61         struct device_node *child;
  62         struct i2c_adapter *ddc;
  63         int chno;
  64         void *edid;
  65         struct drm_display_mode mode;
  66         int mode_valid;
  67         u32 bus_format;
  68         u32 bus_flags;
  69 };
  70
  71 static inline struct imx_ldb_channel *con_to_imx_ldb_ch(struct drm_connector *c)
  72 {
  73         return container_of(c, struct imx_ldb_channel, connector);
  74 }
  75
  76 static inline struct imx_ldb_channel *enc_to_imx_ldb_ch(struct drm_encoder *e)
  77 {
  78         return container_of(e, struct imx_ldb_channel, encoder);
  79 }
  80
  81 struct bus_mux {
  82         int reg;
  83         int shift;
  84         int mask;
  85 };
  86
  87 struct imx_ldb {
  88         struct regmap *regmap;
  89         struct device *dev;
  90         struct imx_ldb_channel channel[2];
  91         struct clk *clk[2]; /* our own clock */
  92         struct clk *clk_sel[4]; /* parent of display clock */
  93         struct clk *clk_parent[4]; /* original parent of clk_sel */
  94         struct clk *clk_pll[2]; /* upstream clock we can adjust */
  95         u32 ldb_ctrl;
  96         const struct bus_mux *lvds_mux;
  97 };
  98
  99 static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel *imx_ldb_ch,
 100                                       u32 bus_format)
 101 {
 102         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 103         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 104
 105         switch (bus_format) {
 106         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 107                 break;
 108         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 109                 if (imx_ldb_ch->chno == 0 || dual)
 110                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
 111                 if (imx_ldb_ch->chno == 1 || dual)
 112                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
 113                 break;
 114         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 115                 if (imx_ldb_ch->chno == 0 || dual)
 116                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
 117                                          LDB_BIT_MAP_CH0_JEIDA;
 118                 if (imx_ldb_ch->chno == 1 || dual)
 119                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
 120                                          LDB_BIT_MAP_CH1_JEIDA;
 121                 break;
 122         }
 123 }
 124
 125 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
 126 {
 127         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 128         int num_modes;
 129
 130         num_modes = drm_panel_get_modes(imx_ldb_ch->panel, connector);
 131         if (num_modes > 0)
 132                 return num_modes;
 133
 134         if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
 135                 imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
 136
 137         if (imx_ldb_ch->edid) {
 138                 drm_connector_update_edid_property(connector,
 139                                                         imx_ldb_ch->edid);
 140                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
 141         }
 142
 143         if (imx_ldb_ch->mode_valid) {
 144                 struct drm_display_mode *mode;
 145
 146                 mode = drm_mode_create(connector->dev);
 147                 if (!mode)
 148                         return -EINVAL;
 149                 drm_mode_copy(mode, &imx_ldb_ch->mode);
 150                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 151                 drm_mode_probed_add(connector, mode);
 152                 num_modes++;
 153         }
 154
 155         return num_modes;
 156 }
 157
 158 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 159                 unsigned long serial_clk, unsigned long di_clk)
 160 {
 161         int ret;
 162
 163         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 164                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 165         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 166
 167         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 168                         clk_get_rate(ldb->clk_pll[chno]));
 169
 170         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 171                         clk_get_rate(ldb->clk[chno]),
 172                         (long int)di_clk);
 173         clk_set_rate(ldb->clk[chno], di_clk);
 174
 175         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 176                         clk_get_rate(ldb->clk[chno]));
 177
 178         /* set display clock mux to LDB input clock */
 179         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 180         if (ret)
 181                 dev_err(ldb->dev,
 182                         "unable to set di%d parent clock to ldb_di%d\n", mux,
 183                         chno);
 184 }
 185
 186 static void imx_ldb_encoder_enable(struct drm_encoder *encoder)
 187 {
 188         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 189         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 190         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 191         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 192
 193         drm_panel_prepare(imx_ldb_ch->panel);
 194
 195         if (dual) {
 196                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);
 197                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);
 198
 199                 clk_prepare_enable(ldb->clk[0]);
 200                 clk_prepare_enable(ldb->clk[1]);
 201         } else {
 202                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);
 203         }
 204
 205         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 206                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 207                 if (mux == 0 || ldb->lvds_mux)
 208                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 209                 else if (mux == 1)
 210                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 211         }
 212         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 213                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 214                 if (mux == 1 || ldb->lvds_mux)
 215                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 216                 else if (mux == 0)
 217                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 218         }
 219
 220         if (ldb->lvds_mux) {
 221                 const struct bus_mux *lvds_mux = NULL;
 222
 223                 if (imx_ldb_ch == &ldb->channel[0])
 224                         lvds_mux = &ldb->lvds_mux[0];
 225                 else if (imx_ldb_ch == &ldb->channel[1])
 226                         lvds_mux = &ldb->lvds_mux[1];
 227
 228                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 229                                    mux << lvds_mux->shift);
 230         }
 231
 232         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 233
 234         drm_panel_enable(imx_ldb_ch->panel);
 235 }
 236
 237 static void
 238 imx_ldb_encoder_atomic_mode_set(struct drm_encoder *encoder,
 239                                 struct drm_crtc_state *crtc_state,
 240                                 struct drm_connector_state *connector_state)
 241 {
 242         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 243         struct drm_display_mode *mode = &crtc_state->adjusted_mode;
 244         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 245         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 246         unsigned long serial_clk;
 247         unsigned long di_clk = mode->clock * 1000;
 248         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 249         u32 bus_format = imx_ldb_ch->bus_format;
 250
 251         if (mode->clock > 170000) {
 252                 dev_warn(ldb->dev,
 253                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 254         }
 255         if (mode->clock > 85000 && !dual) {
 256                 dev_warn(ldb->dev,
 257                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 258         }
 259
 260         if (dual) {
 261                 serial_clk = 3500UL * mode->clock;
 262                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 263                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 264         } else {
 265                 serial_clk = 7000UL * mode->clock;
 266                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
 267                                   di_clk);
 268         }
 269
 270         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 271         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 272                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 273                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 274                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 275                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 276         }
 277         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 278                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 279                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 280                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 281                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 282         }
 283
 284         if (!bus_format) {
 285                 struct drm_connector *connector = connector_state->connector;
 286                 struct drm_display_info *di = &connector->display_info;
 287
 288                 if (di->num_bus_formats)
 289                         bus_format = di->bus_formats[0];
 290         }
 291         imx_ldb_ch_set_bus_format(imx_ldb_ch, bus_format);
 292 }
 293
 294 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 295 {
 296         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 297         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 298         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 299         int mux, ret;
 300
 301         drm_panel_disable(imx_ldb_ch->panel);
 302
 303         if (imx_ldb_ch == &ldb->channel[0] || dual)
 304                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 305         if (imx_ldb_ch == &ldb->channel[1] || dual)
 306                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 307
 308         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 309
 310         if (dual) {
 311                 clk_disable_unprepare(ldb->clk[0]);
 312                 clk_disable_unprepare(ldb->clk[1]);
 313         }
 314
 315         if (ldb->lvds_mux) {
 316                 const struct bus_mux *lvds_mux = NULL;
 317
 318                 if (imx_ldb_ch == &ldb->channel[0])
 319                         lvds_mux = &ldb->lvds_mux[0];
 320                 else if (imx_ldb_ch == &ldb->channel[1])
 321                         lvds_mux = &ldb->lvds_mux[1];
 322
 323                 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
 324                 mux &= lvds_mux->mask;
 325                 mux >>= lvds_mux->shift;
 326         } else {
 327                 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
 328         }
 329
 330         /* set display clock mux back to original input clock */
 331         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
 332         if (ret)
 333                 dev_err(ldb->dev,
 334                         "unable to set di%d parent clock to original parent\n",
 335                         mux);
 336
 337         drm_panel_unprepare(imx_ldb_ch->panel);
 338 }
 339
 340 static int imx_ldb_encoder_atomic_check(struct drm_encoder *encoder,
 341                                         struct drm_crtc_state *crtc_state,
 342                                         struct drm_connector_state *conn_state)
 343 {
 344         struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
 345         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 346         struct drm_display_info *di = &conn_state->connector->display_info;
 347         u32 bus_format = imx_ldb_ch->bus_format;
 348
 349         /* Bus format description in DT overrides connector display info. */
 350         if (!bus_format && di->num_bus_formats) {
 351                 bus_format = di->bus_formats[0];
 352                 imx_crtc_state->bus_flags = di->bus_flags;
 353         } else {
 354                 bus_format = imx_ldb_ch->bus_format;
 355                 imx_crtc_state->bus_flags = imx_ldb_ch->bus_flags;
 356         }
 357         switch (bus_format) {
 358         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 359                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB666_1X18;
 360                 break;
 361         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 362         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 363                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 364                 break;
 365         default:
 366                 return -EINVAL;
 367         }
 368
 369         imx_crtc_state->di_hsync_pin = 2;
 370         imx_crtc_state->di_vsync_pin = 3;
 371
 372         return 0;
 373 }
 374
 375
 376 static const struct drm_connector_funcs imx_ldb_connector_funcs = {
 377         .fill_modes = drm_helper_probe_single_connector_modes,
 378         .destroy = imx_drm_connector_destroy,
 379         .reset = drm_atomic_helper_connector_reset,
 380         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 381         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 382 };
 383
 384 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 385         .get_modes = imx_ldb_connector_get_modes,
 386 };
 387
 388 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 389         .atomic_mode_set = imx_ldb_encoder_atomic_mode_set,
 390         .enable = imx_ldb_encoder_enable,
 391         .disable = imx_ldb_encoder_disable,
 392         .atomic_check = imx_ldb_encoder_atomic_check,
 393 };
 394
 395 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 396 {
 397         char clkname[16];
 398
 399         snprintf(clkname, sizeof(clkname), "di%d", chno);
 400         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 401         if (IS_ERR(ldb->clk[chno]))
 402                 return PTR_ERR(ldb->clk[chno]);
 403
 404         snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
 405         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 406
 407         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 408 }
 409
 410 static int imx_ldb_register(struct drm_device *drm,
 411         struct imx_ldb_channel *imx_ldb_ch)
 412 {
 413         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 414         struct drm_encoder *encoder = &imx_ldb_ch->encoder;
 415         int ret;
 416
 417         ret = imx_drm_encoder_parse_of(drm, encoder, imx_ldb_ch->child);
 418         if (ret)
 419                 return ret;
 420
 421         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 422         if (ret)
 423                 return ret;
 424
 425         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 426                 ret = imx_ldb_get_clk(ldb, 1);
 427                 if (ret)
 428                         return ret;
 429         }
 430
 431         drm_encoder_helper_add(encoder, &imx_ldb_encoder_helper_funcs);
 432         drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_LVDS);
 433
 434         if (imx_ldb_ch->bridge) {
 435                 ret = drm_bridge_attach(&imx_ldb_ch->encoder,
 436                                         imx_ldb_ch->bridge, NULL, 0);
 437                 if (ret) {
 438                         DRM_ERROR("Failed to initialize bridge with drm\n");
 439                         return ret;
 440                 }
 441         } else {
 442                 /*
 443                  * We want to add the connector whenever there is no bridge
 444                  * that brings its own, not only when there is a panel. For
 445                  * historical reasons, the ldb driver can also work without
 446                  * a panel.
 447                  */
 448                 drm_connector_helper_add(&imx_ldb_ch->connector,
 449                                 &imx_ldb_connector_helper_funcs);
 450                 drm_connector_init_with_ddc(drm, &imx_ldb_ch->connector,
 451                                             &imx_ldb_connector_funcs,
 452                                             DRM_MODE_CONNECTOR_LVDS,
 453                                             imx_ldb_ch->ddc);
 454                 drm_connector_attach_encoder(&imx_ldb_ch->connector, encoder);
 455         }
 456
 457         return 0;
 458 }
 459
 460 struct imx_ldb_bit_mapping {
 461         u32 bus_format;
 462         u32 datawidth;
 463         const char * const mapping;
 464 };
 465
 466 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
 467         { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,  18, "spwg" },
 468         { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,  24, "spwg" },
 469         { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
 470 };
 471
 472 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
 473 {
 474         const char *bm;
 475         u32 datawidth = 0;
 476         int ret, i;
 477
 478         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 479         if (ret < 0)
 480                 return ret;
 481
 482         of_property_read_u32(np, "fsl,data-width", &datawidth);
 483
 484         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
 485                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
 486                     datawidth == imx_ldb_bit_mappings[i].datawidth)
 487                         return imx_ldb_bit_mappings[i].bus_format;
 488         }
 489
 490         dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
 491
 492         return -ENOENT;
 493 }
 494
 495 static struct bus_mux imx6q_lvds_mux[2] = {
 496         {
 497                 .reg = IOMUXC_GPR3,
 498                 .shift = 6,
 499                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 500         }, {
 501                 .reg = IOMUXC_GPR3,
 502                 .shift = 8,
 503                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 504         }
 505 };
 506
 507 /*
 508  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 509  * of_match_device will walk through this list and take the first entry
 510  * matching any of its compatible values. Therefore, the more generic
 511  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 512  */
 513 static const struct of_device_id imx_ldb_dt_ids[] = {
 514         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 515         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 516         { }
 517 };
 518 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 519
 520 static int imx_ldb_panel_ddc(struct device *dev,
 521                 struct imx_ldb_channel *channel, struct device_node *child)
 522 {
 523         struct device_node *ddc_node;
 524         const u8 *edidp;
 525         int ret;
 526
 527         ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
 528         if (ddc_node) {
 529                 channel->ddc = of_find_i2c_adapter_by_node(ddc_node);
 530                 of_node_put(ddc_node);
 531                 if (!channel->ddc) {
 532                         dev_warn(dev, "failed to get ddc i2c adapter\n");
 533                         return -EPROBE_DEFER;
 534                 }
 535         }
 536
 537         if (!channel->ddc) {
 538                 int edid_len;
 539
 540                 /* if no DDC available, fallback to hardcoded EDID */
 541                 dev_dbg(dev, "no ddc available\n");
 542
 543                 edidp = of_get_property(child, "edid", &edid_len);
 544                 if (edidp) {
 545                         channel->edid = kmemdup(edidp, edid_len, GFP_KERNEL);
 546                 } else if (!channel->panel) {
 547                         /* fallback to display-timings node */
 548                         ret = of_get_drm_display_mode(child,
 549                                                       &channel->mode,
 550                                                       &channel->bus_flags,
 551                                                       OF_USE_NATIVE_MODE);
 552                         if (!ret)
 553                                 channel->mode_valid = 1;
 554                 }
 555         }
 556         return 0;
 557 }
 558
 559 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 560 {
 561         struct drm_device *drm = data;
 562         struct device_node *np = dev->of_node;
 563         const struct of_device_id *of_id =
 564                         of_match_device(imx_ldb_dt_ids, dev);
 565         struct device_node *child;
 566         struct imx_ldb *imx_ldb;
 567         int dual;
 568         int ret;
 569         int i;
 570
 571         imx_ldb = dev_get_drvdata(dev);
 572         memset(imx_ldb, 0, sizeof(*imx_ldb));
 573
 574         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 575         if (IS_ERR(imx_ldb->regmap)) {
 576                 dev_err(dev, "failed to get parent regmap\n");
 577                 return PTR_ERR(imx_ldb->regmap);
 578         }
 579
 580         /* disable LDB by resetting the control register to POR default */
 581         regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);
 582
 583         imx_ldb->dev = dev;
 584
 585         if (of_id)
 586                 imx_ldb->lvds_mux = of_id->data;
 587
 588         dual = of_property_read_bool(np, "fsl,dual-channel");
 589         if (dual)
 590                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 591
 592         /*
 593          * There are three different possible clock mux configurations:
 594          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 595          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 596          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 597          * Map them all to di0_sel...di3_sel.
 598          */
 599         for (i = 0; i < 4; i++) {
 600                 char clkname[16];
 601
 602                 sprintf(clkname, "di%d_sel", i);
 603                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 604                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 605                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 606                         imx_ldb->clk_sel[i] = NULL;
 607                         break;
 608                 }
 609
 610                 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
 611         }
 612         if (i == 0)
 613                 return ret;
 614
 615         for_each_child_of_node(np, child) {
 616                 struct imx_ldb_channel *channel;
 617                 int bus_format;
 618
 619                 ret = of_property_read_u32(child, "reg", &i);
 620                 if (ret || i < 0 || i > 1) {
 621                         ret = -EINVAL;
 622                         goto free_child;
 623                 }
 624
 625                 if (!of_device_is_available(child))
 626                         continue;
 627
 628                 if (dual && i > 0) {
 629                         dev_warn(dev, "dual-channel mode, ignoring second output\n");
 630                         continue;
 631                 }
 632
 633                 channel = &imx_ldb->channel[i];
 634                 channel->ldb = imx_ldb;
 635                 channel->chno = i;
 636
 637                 /*
 638                  * The output port is port@4 with an external 4-port mux or
 639                  * port@2 with the internal 2-port mux.
 640                  */
 641                 ret = drm_of_find_panel_or_bridge(child,
 642                                                   imx_ldb->lvds_mux ? 4 : 2, 0,
 643                                                   &channel->panel, &channel->bridge);
 644                 if (ret && ret != -ENODEV)
 645                         goto free_child;
 646
 647                 /* panel ddc only if there is no bridge */
 648                 if (!channel->bridge) {
 649                         ret = imx_ldb_panel_ddc(dev, channel, child);
 650                         if (ret)
 651                                 goto free_child;
 652                 }
 653
 654                 bus_format = of_get_bus_format(dev, child);
 655                 if (bus_format == -EINVAL) {
 656                         /*
 657                          * If no bus format was specified in the device tree,
 658                          * we can still get it from the connected panel later.
 659                          */
 660                         if (channel->panel && channel->panel->funcs &&
 661                             channel->panel->funcs->get_modes)
 662                                 bus_format = 0;
 663                 }
 664                 if (bus_format < 0) {
 665                         dev_err(dev, "could not determine data mapping: %d\n",
 666                                 bus_format);
 667                         ret = bus_format;
 668                         goto free_child;
 669                 }
 670                 channel->bus_format = bus_format;
 671                 channel->child = child;
 672
 673                 ret = imx_ldb_register(drm, channel);
 674                 if (ret) {
 675                         channel->child = NULL;
 676                         goto free_child;
 677                 }
 678         }
 679
 680         return 0;
 681
 682 free_child:
 683         of_node_put(child);
 684         return ret;
 685 }
 686
 687 static void imx_ldb_unbind(struct device *dev, struct device *master,
 688         void *data)
 689 {
 690         struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
 691         int i;
 692
 693         for (i = 0; i < 2; i++) {
 694                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 695
 696                 kfree(channel->edid);
 697                 i2c_put_adapter(channel->ddc);
 698         }
 699 }
 700
 701 static const struct component_ops imx_ldb_ops = {
 702         .bind   = imx_ldb_bind,
 703         .unbind = imx_ldb_unbind,
 704 };
 705
 706 static int imx_ldb_probe(struct platform_device *pdev)
 707 {
 708         struct imx_ldb *imx_ldb;
 709
 710         imx_ldb = devm_kzalloc(&pdev->dev, sizeof(*imx_ldb), GFP_KERNEL);
 711         if (!imx_ldb)
 712                 return -ENOMEM;
 713
 714         platform_set_drvdata(pdev, imx_ldb);
 715
 716         return component_add(&pdev->dev, &imx_ldb_ops);
 717 }
 718
 719 static int imx_ldb_remove(struct platform_device *pdev)
 720 {
 721         component_del(&pdev->dev, &imx_ldb_ops);
 722         return 0;
 723 }
 724
 725 static struct platform_driver imx_ldb_driver = {
 726         .probe          = imx_ldb_probe,
 727         .remove         = imx_ldb_remove,
 728         .driver         = {
 729                 .of_match_table = imx_ldb_dt_ids,
 730                 .name   = DRIVER_NAME,
 731         },
 732 };
 733
 734 module_platform_driver(imx_ldb_driver);
 735
 736 MODULE_DESCRIPTION("i.MX LVDS driver");
 737 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 738 MODULE_LICENSE("GPL");
 739 MODULE_ALIAS("platform:" DRIVER_NAME);