drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
   3  */
   4
   5 #ifndef _DPU_HW_LM_H
   6 #define _DPU_HW_LM_H
   7
   8 #include "dpu_hw_mdss.h"
   9 #include "dpu_hw_util.h"
  10 #include "dpu_hw_blk.h"
  11
  12 struct dpu_hw_mixer;
  13
  14 struct dpu_hw_mixer_cfg {
  15         u32 out_width;
  16         u32 out_height;
  17         bool right_mixer;
  18         int flags;
  19 };
  20
  21 struct dpu_hw_color3_cfg {
  22         u8 keep_fg[DPU_STAGE_MAX];
  23 };
  24
  25 /**
  26  *
  27  * struct dpu_hw_lm_ops : Interface to the mixer Hw driver functions
  28  *  Assumption is these functions will be called after clocks are enabled
  29  */
  30 struct dpu_hw_lm_ops {
  31         /*
  32          * Sets up mixer output width and height
  33          * and border color if enabled
  34          */
  35         void (*setup_mixer_out)(struct dpu_hw_mixer *ctx,
  36                 struct dpu_hw_mixer_cfg *cfg);
  37
  38         /*
  39          * Alpha blending configuration
  40          * for the specified stage
  41          */
  42         void (*setup_blend_config)(struct dpu_hw_mixer *ctx, uint32_t stage,
  43                 uint32_t fg_alpha, uint32_t bg_alpha, uint32_t blend_op);
  44
  45         /*
  46          * Alpha color component selection from either fg or bg
  47          */
  48         void (*setup_alpha_out)(struct dpu_hw_mixer *ctx, uint32_t mixer_op);
  49
  50         /**
  51          * setup_border_color : enable/disable border color
  52          */
  53         void (*setup_border_color)(struct dpu_hw_mixer *ctx,
  54                 struct dpu_mdss_color *color,
  55                 u8 border_en);
  56 };
  57
  58 struct dpu_hw_mixer {
  59         struct dpu_hw_blk base;
  60         struct dpu_hw_blk_reg_map hw;
  61
  62         /* lm */
  63         enum dpu_lm  idx;
  64         const struct dpu_lm_cfg   *cap;
  65         const struct dpu_mdp_cfg  *mdp;
  66         const struct dpu_ctl_cfg  *ctl;
  67
  68         /* ops */
  69         struct dpu_hw_lm_ops ops;
  70
  71         /* store mixer info specific to display */
  72         struct dpu_hw_mixer_cfg cfg;
  73 };
  74
  75 /**
  76  * to_dpu_hw_mixer - convert base object dpu_hw_base to container
  77  * @hw: Pointer to base hardware block
  78  * return: Pointer to hardware block container
  79  */
  80 static inline struct dpu_hw_mixer *to_dpu_hw_mixer(struct dpu_hw_blk *hw)
  81 {
  82         return container_of(hw, struct dpu_hw_mixer, base);
  83 }
  84
  85 /**
  86  * dpu_hw_lm_init(): Initializes the mixer hw driver object.
  87  * should be called once before accessing every mixer.
  88  * @idx:  mixer index for which driver object is required
  89  * @addr: mapped register io address of MDP
  90  * @m :   pointer to mdss catalog data
  91  */
  92 struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
  93                 void __iomem *addr,
  94                 const struct dpu_mdss_cfg *m);
  95
  96 /**
  97  * dpu_hw_lm_destroy(): Destroys layer mixer driver context
  98  * @lm:   Pointer to LM driver context
  99  */
 100 void dpu_hw_lm_destroy(struct dpu_hw_mixer *lm);
 101
 102 #endif /*_DPU_HW_LM_H */