drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2014, The Linux Foundation. All rights reserved.
   4  * Copyright (C) 2013 Red Hat
   5  * Author: Rob Clark <robdclark@gmail.com>
   6  */
   7
   8 #include <drm/drm_fourcc.h>
   9 #include <drm/drm_util.h>
  10
  11 #include "mdp5_kms.h"
  12 #include "mdp5_smp.h"
  13
  14
  15 struct mdp5_smp {
  16         struct drm_device *dev;
  17
  18         uint8_t reserved[MAX_CLIENTS]; /* fixed MMBs allocation per client */
  19
  20         int blk_cnt;
  21         int blk_size;
  22
  23         /* register cache */
  24         u32 alloc_w[22];
  25         u32 alloc_r[22];
  26         u32 pipe_reqprio_fifo_wm0[SSPP_MAX];
  27         u32 pipe_reqprio_fifo_wm1[SSPP_MAX];
  28         u32 pipe_reqprio_fifo_wm2[SSPP_MAX];
  29 };
  30
  31 static inline
  32 struct mdp5_kms *get_kms(struct mdp5_smp *smp)
  33 {
  34         struct msm_drm_private *priv = smp->dev->dev_private;
  35
  36         return to_mdp5_kms(to_mdp_kms(priv->kms));
  37 }
  38
  39 static inline u32 pipe2client(enum mdp5_pipe pipe, int plane)
  40 {
  41 #define CID_UNUSED      0
  42
  43         if (WARN_ON(plane >= pipe2nclients(pipe)))
  44                 return CID_UNUSED;
  45
  46         /*
  47          * Note on SMP clients:
  48          * For ViG pipes, fetch Y/Cr/Cb-components clients are always
  49          * consecutive, and in that order.
  50          *
  51          * e.g.:
  52          * if mdp5_cfg->smp.clients[SSPP_VIG0] = N,
  53          *      Y  plane's client ID is N
  54          *      Cr plane's client ID is N + 1
  55          *      Cb plane's client ID is N + 2
  56          */
  57
  58         return mdp5_cfg->smp.clients[pipe] + plane;
  59 }
  60
  61 /* allocate blocks for the specified request: */
  62 static int smp_request_block(struct mdp5_smp *smp,
  63                 struct mdp5_smp_state *state,
  64                 u32 cid, int nblks)
  65 {
  66         void *cs = state->client_state[cid];
  67         int i, avail, cnt = smp->blk_cnt;
  68         uint8_t reserved;
  69
  70         /* we shouldn't be requesting blocks for an in-use client: */
  71         WARN_ON(bitmap_weight(cs, cnt) > 0);
  72
  73         reserved = smp->reserved[cid];
  74
  75         if (reserved) {
  76                 nblks = max(0, nblks - reserved);
  77                 DBG("%d MMBs allocated (%d reserved)", nblks, reserved);
  78         }
  79
  80         avail = cnt - bitmap_weight(state->state, cnt);
  81         if (nblks > avail) {
  82                 DRM_DEV_ERROR(smp->dev->dev, "out of blks (req=%d > avail=%d)\n",
  83                                 nblks, avail);
  84                 return -ENOSPC;
  85         }
  86
  87         for (i = 0; i < nblks; i++) {
  88                 int blk = find_first_zero_bit(state->state, cnt);
  89                 set_bit(blk, cs);
  90                 set_bit(blk, state->state);
  91         }
  92
  93         return 0;
  94 }
  95
  96 static void set_fifo_thresholds(struct mdp5_smp *smp,
  97                 enum mdp5_pipe pipe, int nblks)
  98 {
  99         u32 smp_entries_per_blk = smp->blk_size / (128 / BITS_PER_BYTE);
 100         u32 val;
 101
 102         /* 1/4 of SMP pool that is being fetched */
 103         val = (nblks * smp_entries_per_blk) / 4;
 104
 105         smp->pipe_reqprio_fifo_wm0[pipe] = val * 1;
 106         smp->pipe_reqprio_fifo_wm1[pipe] = val * 2;
 107         smp->pipe_reqprio_fifo_wm2[pipe] = val * 3;
 108 }
 109
 110 /*
 111  * NOTE: looks like if horizontal decimation is used (if we supported that)
 112  * then the width used to calculate SMP block requirements is the post-
 113  * decimated width.  Ie. SMP buffering sits downstream of decimation (which
 114  * presumably happens during the dma from scanout buffer).
 115  */
 116 uint32_t mdp5_smp_calculate(struct mdp5_smp *smp,
 117                 const struct mdp_format *format,
 118                 u32 width, bool hdecim)
 119 {
 120         const struct drm_format_info *info = drm_format_info(format->base.pixel_format);
 121         struct mdp5_kms *mdp5_kms = get_kms(smp);
 122         int rev = mdp5_cfg_get_hw_rev(mdp5_kms->cfg);
 123         int i, hsub, nplanes, nlines;
 124         uint32_t blkcfg = 0;
 125
 126         nplanes = info->num_planes;
 127         hsub = info->hsub;
 128
 129         /* different if BWC (compressed framebuffer?) enabled: */
 130         nlines = 2;
 131
 132         /* Newer MDPs have split/packing logic, which fetches sub-sampled
 133          * U and V components (splits them from Y if necessary) and packs
 134          * them together, writes to SMP using a single client.
 135          */
 136         if ((rev > 0) && (format->chroma_sample > CHROMA_FULL)) {
 137                 nplanes = 2;
 138
 139                 /* if decimation is enabled, HW decimates less on the
 140                  * sub sampled chroma components
 141                  */
 142                 if (hdecim && (hsub > 1))
 143                         hsub = 1;
 144         }
 145
 146         for (i = 0; i < nplanes; i++) {
 147                 int n, fetch_stride, cpp;
 148
 149                 cpp = info->cpp[i];
 150                 fetch_stride = width * cpp / (i ? hsub : 1);
 151
 152                 n = DIV_ROUND_UP(fetch_stride * nlines, smp->blk_size);
 153
 154                 /* for hw rev v1.00 */
 155                 if (rev == 0)
 156                         n = roundup_pow_of_two(n);
 157
 158                 blkcfg |= (n << (8 * i));
 159         }
 160
 161         return blkcfg;
 162 }
 163
 164 int mdp5_smp_assign(struct mdp5_smp *smp, struct mdp5_smp_state *state,
 165                 enum mdp5_pipe pipe, uint32_t blkcfg)
 166 {
 167         struct mdp5_kms *mdp5_kms = get_kms(smp);
 168         struct drm_device *dev = mdp5_kms->dev;
 169         int i, ret;
 170
 171         for (i = 0; i < pipe2nclients(pipe); i++) {
 172                 u32 cid = pipe2client(pipe, i);
 173                 int n = blkcfg & 0xff;
 174
 175                 if (!n)
 176                         continue;
 177
 178                 DBG("%s[%d]: request %d SMP blocks", pipe2name(pipe), i, n);
 179                 ret = smp_request_block(smp, state, cid, n);
 180                 if (ret) {
 181                         DRM_DEV_ERROR(dev->dev, "Cannot allocate %d SMP blocks: %d\n",
 182                                         n, ret);
 183                         return ret;
 184                 }
 185
 186                 blkcfg >>= 8;
 187         }
 188
 189         state->assigned |= (1 << pipe);
 190
 191         return 0;
 192 }
 193
 194 /* Release SMP blocks for all clients of the pipe */
 195 void mdp5_smp_release(struct mdp5_smp *smp, struct mdp5_smp_state *state,
 196                 enum mdp5_pipe pipe)
 197 {
 198         int i;
 199         int cnt = smp->blk_cnt;
 200
 201         for (i = 0; i < pipe2nclients(pipe); i++) {
 202                 u32 cid = pipe2client(pipe, i);
 203                 void *cs = state->client_state[cid];
 204
 205                 /* update global state: */
 206                 bitmap_andnot(state->state, state->state, cs, cnt);
 207
 208                 /* clear client's state */
 209                 bitmap_zero(cs, cnt);
 210         }
 211
 212         state->released |= (1 << pipe);
 213 }
 214
 215 /* NOTE: SMP_ALLOC_* regs are *not* double buffered, so release has to
 216  * happen after scanout completes.
 217  */
 218 static unsigned update_smp_state(struct mdp5_smp *smp,
 219                 u32 cid, mdp5_smp_state_t *assigned)
 220 {
 221         int cnt = smp->blk_cnt;
 222         unsigned nblks = 0;
 223         u32 blk, val;
 224
 225         for_each_set_bit(blk, *assigned, cnt) {
 226                 int idx = blk / 3;
 227                 int fld = blk % 3;
 228
 229                 val = smp->alloc_w[idx];
 230
 231                 switch (fld) {
 232                 case 0:
 233                         val &= ~MDP5_SMP_ALLOC_W_REG_CLIENT0__MASK;
 234                         val |= MDP5_SMP_ALLOC_W_REG_CLIENT0(cid);
 235                         break;
 236                 case 1:
 237                         val &= ~MDP5_SMP_ALLOC_W_REG_CLIENT1__MASK;
 238                         val |= MDP5_SMP_ALLOC_W_REG_CLIENT1(cid);
 239                         break;
 240                 case 2:
 241                         val &= ~MDP5_SMP_ALLOC_W_REG_CLIENT2__MASK;
 242                         val |= MDP5_SMP_ALLOC_W_REG_CLIENT2(cid);
 243                         break;
 244                 }
 245
 246                 smp->alloc_w[idx] = val;
 247                 smp->alloc_r[idx] = val;
 248
 249                 nblks++;
 250         }
 251
 252         return nblks;
 253 }
 254
 255 static void write_smp_alloc_regs(struct mdp5_smp *smp)
 256 {
 257         struct mdp5_kms *mdp5_kms = get_kms(smp);
 258         int i, num_regs;
 259
 260         num_regs = smp->blk_cnt / 3 + 1;
 261
 262         for (i = 0; i < num_regs; i++) {
 263                 mdp5_write(mdp5_kms, REG_MDP5_SMP_ALLOC_W_REG(i),
 264                            smp->alloc_w[i]);
 265                 mdp5_write(mdp5_kms, REG_MDP5_SMP_ALLOC_R_REG(i),
 266                            smp->alloc_r[i]);
 267         }
 268 }
 269
 270 static void write_smp_fifo_regs(struct mdp5_smp *smp)
 271 {
 272         struct mdp5_kms *mdp5_kms = get_kms(smp);
 273         int i;
 274
 275         for (i = 0; i < mdp5_kms->num_hwpipes; i++) {
 276                 struct mdp5_hw_pipe *hwpipe = mdp5_kms->hwpipes[i];
 277                 enum mdp5_pipe pipe = hwpipe->pipe;
 278
 279                 mdp5_write(mdp5_kms, REG_MDP5_PIPE_REQPRIO_FIFO_WM_0(pipe),
 280                            smp->pipe_reqprio_fifo_wm0[pipe]);
 281                 mdp5_write(mdp5_kms, REG_MDP5_PIPE_REQPRIO_FIFO_WM_1(pipe),
 282                            smp->pipe_reqprio_fifo_wm1[pipe]);
 283                 mdp5_write(mdp5_kms, REG_MDP5_PIPE_REQPRIO_FIFO_WM_2(pipe),
 284                            smp->pipe_reqprio_fifo_wm2[pipe]);
 285         }
 286 }
 287
 288 void mdp5_smp_prepare_commit(struct mdp5_smp *smp, struct mdp5_smp_state *state)
 289 {
 290         enum mdp5_pipe pipe;
 291
 292         for_each_set_bit(pipe, &state->assigned, sizeof(state->assigned) * 8) {
 293                 unsigned i, nblks = 0;
 294
 295                 for (i = 0; i < pipe2nclients(pipe); i++) {
 296                         u32 cid = pipe2client(pipe, i);
 297                         void *cs = state->client_state[cid];
 298
 299                         nblks += update_smp_state(smp, cid, cs);
 300
 301                         DBG("assign %s:%u, %u blks",
 302                                 pipe2name(pipe), i, nblks);
 303                 }
 304
 305                 set_fifo_thresholds(smp, pipe, nblks);
 306         }
 307
 308         write_smp_alloc_regs(smp);
 309         write_smp_fifo_regs(smp);
 310
 311         state->assigned = 0;
 312 }
 313
 314 void mdp5_smp_complete_commit(struct mdp5_smp *smp, struct mdp5_smp_state *state)
 315 {
 316         enum mdp5_pipe pipe;
 317
 318         for_each_set_bit(pipe, &state->released, sizeof(state->released) * 8) {
 319                 DBG("release %s", pipe2name(pipe));
 320                 set_fifo_thresholds(smp, pipe, 0);
 321         }
 322
 323         write_smp_fifo_regs(smp);
 324
 325         state->released = 0;
 326 }
 327
 328 void mdp5_smp_dump(struct mdp5_smp *smp, struct drm_printer *p)
 329 {
 330         struct mdp5_kms *mdp5_kms = get_kms(smp);
 331         struct mdp5_hw_pipe_state *hwpstate;
 332         struct mdp5_smp_state *state;
 333         struct mdp5_global_state *global_state;
 334         int total = 0, i, j;
 335
 336         drm_printf(p, "name\tinuse\tplane\n");
 337         drm_printf(p, "----\t-----\t-----\n");
 338
 339         if (drm_can_sleep())
 340                 drm_modeset_lock(&mdp5_kms->glob_state_lock, NULL);
 341
 342         global_state = mdp5_get_existing_global_state(mdp5_kms);
 343
 344         /* grab these *after* we hold the state_lock */
 345         hwpstate = &global_state->hwpipe;
 346         state = &global_state->smp;
 347
 348         for (i = 0; i < mdp5_kms->num_hwpipes; i++) {
 349                 struct mdp5_hw_pipe *hwpipe = mdp5_kms->hwpipes[i];
 350                 struct drm_plane *plane = hwpstate->hwpipe_to_plane[hwpipe->idx];
 351                 enum mdp5_pipe pipe = hwpipe->pipe;
 352                 for (j = 0; j < pipe2nclients(pipe); j++) {
 353                         u32 cid = pipe2client(pipe, j);
 354                         void *cs = state->client_state[cid];
 355                         int inuse = bitmap_weight(cs, smp->blk_cnt);
 356
 357                         drm_printf(p, "%s:%d\t%d\t%s\n",
 358                                 pipe2name(pipe), j, inuse,
 359                                 plane ? plane->name : NULL);
 360
 361                         total += inuse;
 362                 }
 363         }
 364
 365         drm_printf(p, "TOTAL:\t%d\t(of %d)\n", total, smp->blk_cnt);
 366         drm_printf(p, "AVAIL:\t%d\n", smp->blk_cnt -
 367                         bitmap_weight(state->state, smp->blk_cnt));
 368
 369         if (drm_can_sleep())
 370                 drm_modeset_unlock(&mdp5_kms->glob_state_lock);
 371 }
 372
 373 void mdp5_smp_destroy(struct mdp5_smp *smp)
 374 {
 375         kfree(smp);
 376 }
 377
 378 struct mdp5_smp *mdp5_smp_init(struct mdp5_kms *mdp5_kms, const struct mdp5_smp_block *cfg)
 379 {
 380         struct mdp5_smp_state *state;
 381         struct mdp5_global_state *global_state;
 382         struct mdp5_smp *smp = NULL;
 383         int ret;
 384
 385         smp = kzalloc(sizeof(*smp), GFP_KERNEL);
 386         if (unlikely(!smp)) {
 387                 ret = -ENOMEM;
 388                 goto fail;
 389         }
 390
 391         smp->dev = mdp5_kms->dev;
 392         smp->blk_cnt = cfg->mmb_count;
 393         smp->blk_size = cfg->mmb_size;
 394
 395         global_state = mdp5_get_existing_global_state(mdp5_kms);
 396         state = &global_state->smp;
 397
 398         /* statically tied MMBs cannot be re-allocated: */
 399         bitmap_copy(state->state, cfg->reserved_state, smp->blk_cnt);
 400         memcpy(smp->reserved, cfg->reserved, sizeof(smp->reserved));
 401
 402         return smp;
 403 fail:
 404         if (smp)
 405                 mdp5_smp_destroy(smp);
 406
 407         return ERR_PTR(ret);
 408 }