drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/disp.h

   1 /* SPDX-License-Identifier: MIT */
   2 #ifndef __NVBIOS_DISP_H__
   3 #define __NVBIOS_DISP_H__
   4 u16 nvbios_disp_table(struct nvkm_bios *,
   5                       u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *sub);
   6
   7 struct nvbios_disp {
   8         u16 data;
   9 };
  10
  11 u16 nvbios_disp_entry(struct nvkm_bios *, u8 idx, u8 *ver, u8 *hdr, u8 *sub);
  12 u16 nvbios_disp_parse(struct nvkm_bios *, u8 idx, u8 *ver, u8 *hdr, u8 *sub,
  13                       struct nvbios_disp *);
  14
  15 struct nvbios_outp {
  16         u16 type;
  17         u16 mask;
  18         u16 script[3];
  19 };
  20
  21 u16 nvbios_outp_entry(struct nvkm_bios *, u8 idx,
  22                       u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
  23 u16 nvbios_outp_parse(struct nvkm_bios *, u8 idx,
  24                       u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_outp *);
  25 u16 nvbios_outp_match(struct nvkm_bios *, u16 type, u16 mask,
  26                       u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_outp *);
  27
  28 struct nvbios_ocfg {
  29         u8  proto;
  30         u8  flags;
  31         u16 clkcmp[2];
  32 };
  33
  34 u16 nvbios_ocfg_entry(struct nvkm_bios *, u16 outp, u8 idx,
  35                       u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
  36 u16 nvbios_ocfg_parse(struct nvkm_bios *, u16 outp, u8 idx,
  37                       u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *);
  38 u16 nvbios_ocfg_match(struct nvkm_bios *, u16 outp, u8 proto, u8 flags,
  39                       u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *);
  40 u16 nvbios_oclk_match(struct nvkm_bios *, u16 cmp, u32 khz);
  41 #endif