drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp10b.c

   1 /*
   2  * Copyright (c) 2019 NVIDIA Corporation.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Thierry Reding
  23  */
  24
  25 #include "priv.h"
  26
  27 static void
  28 gp10b_ltc_init(struct nvkm_ltc *ltc)
  29 {
  30         struct nvkm_device *device = ltc->subdev.device;
  31         struct iommu_fwspec *spec;
  32
  33         nvkm_wr32(device, 0x17e27c, ltc->ltc_nr);
  34         nvkm_wr32(device, 0x17e000, ltc->ltc_nr);
  35         nvkm_wr32(device, 0x100800, ltc->ltc_nr);
  36
  37         spec = dev_iommu_fwspec_get(device->dev);
  38         if (spec) {
  39                 u32 sid = spec->ids[0] & 0xffff;
  40
  41                 /* stream ID */
  42                 nvkm_wr32(device, 0x160000, sid << 2);
  43         }
  44 }
  45
  46 static const struct nvkm_ltc_func
  47 gp10b_ltc = {
  48         .oneinit = gp100_ltc_oneinit,
  49         .init = gp10b_ltc_init,
  50         .intr = gp100_ltc_intr,
  51         .cbc_clear = gm107_ltc_cbc_clear,
  52         .cbc_wait = gm107_ltc_cbc_wait,
  53         .zbc = 16,
  54         .zbc_clear_color = gm107_ltc_zbc_clear_color,
  55         .zbc_clear_depth = gm107_ltc_zbc_clear_depth,
  56         .zbc_clear_stencil = gp102_ltc_zbc_clear_stencil,
  57         .invalidate = gf100_ltc_invalidate,
  58         .flush = gf100_ltc_flush,
  59 };
  60
  61 int
  62 gp10b_ltc_new(struct nvkm_device *device, int index, struct nvkm_ltc **pltc)
  63 {
  64         return nvkm_ltc_new_(&gp10b_ltc, device, index, pltc);
  65 }