WIP FPC-III support
[linux/fpc-iii.git] / drivers / gpu / drm / tegra / plane.h
blobc691dd79b27b153e45b71fa6e663b5275cf73bfd
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2017 NVIDIA CORPORATION. All rights reserved.
4 */
6 #ifndef TEGRA_PLANE_H
7 #define TEGRA_PLANE_H 1
9 #include <drm/drm_plane.h>
11 struct tegra_bo;
12 struct tegra_dc;
14 struct tegra_plane {
15 struct drm_plane base;
16 struct tegra_dc *dc;
17 unsigned int offset;
18 unsigned int index;
21 struct tegra_cursor {
22 struct tegra_plane base;
24 struct tegra_bo *bo;
25 unsigned int width;
26 unsigned int height;
29 static inline struct tegra_plane *to_tegra_plane(struct drm_plane *plane)
31 return container_of(plane, struct tegra_plane, base);
34 struct tegra_plane_legacy_blending_state {
35 bool alpha;
36 bool top;
39 struct tegra_plane_state {
40 struct drm_plane_state base;
42 struct sg_table *sgt[3];
43 dma_addr_t iova[3];
45 struct tegra_bo_tiling tiling;
46 u32 format;
47 u32 swap;
49 bool reflect_x;
50 bool reflect_y;
52 /* used for legacy blending support only */
53 struct tegra_plane_legacy_blending_state blending[2];
54 bool opaque;
57 static inline struct tegra_plane_state *
58 to_tegra_plane_state(struct drm_plane_state *state)
60 if (state)
61 return container_of(state, struct tegra_plane_state, base);
63 return NULL;
66 extern const struct drm_plane_funcs tegra_plane_funcs;
68 int tegra_plane_prepare_fb(struct drm_plane *plane,
69 struct drm_plane_state *state);
70 void tegra_plane_cleanup_fb(struct drm_plane *plane,
71 struct drm_plane_state *state);
73 int tegra_plane_state_add(struct tegra_plane *plane,
74 struct drm_plane_state *state);
76 int tegra_plane_format(u32 fourcc, u32 *format, u32 *swap);
77 bool tegra_plane_format_is_yuv(unsigned int format, bool *planar);
78 int tegra_plane_setup_legacy_state(struct tegra_plane *tegra,
79 struct tegra_plane_state *state);
81 #endif /* TEGRA_PLANE_H */