drivers/gpu/drm/vboxvideo/vboxvideo_vbe.h

   1 /* SPDX-License-Identifier: MIT */
   2 /* Copyright (C) 2006-2016 Oracle Corporation */
   3
   4 #ifndef __VBOXVIDEO_VBE_H__
   5 #define __VBOXVIDEO_VBE_H__
   6
   7 /* GUEST <-> HOST Communication API */
   8
   9 #define VBE_DISPI_BANK_ADDRESS          0xA0000
  10 #define VBE_DISPI_BANK_SIZE_KB          64
  11
  12 #define VBE_DISPI_MAX_XRES              16384
  13 #define VBE_DISPI_MAX_YRES              16384
  14 #define VBE_DISPI_MAX_BPP               32
  15
  16 #define VBE_DISPI_IOPORT_INDEX          0x01CE
  17 #define VBE_DISPI_IOPORT_DATA           0x01CF
  18
  19 #define VBE_DISPI_IOPORT_DAC_WRITE_INDEX  0x03C8
  20 #define VBE_DISPI_IOPORT_DAC_DATA         0x03C9
  21
  22 #define VBE_DISPI_INDEX_ID              0x0
  23 #define VBE_DISPI_INDEX_XRES            0x1
  24 #define VBE_DISPI_INDEX_YRES            0x2
  25 #define VBE_DISPI_INDEX_BPP             0x3
  26 #define VBE_DISPI_INDEX_ENABLE          0x4
  27 #define VBE_DISPI_INDEX_BANK            0x5
  28 #define VBE_DISPI_INDEX_VIRT_WIDTH      0x6
  29 #define VBE_DISPI_INDEX_VIRT_HEIGHT     0x7
  30 #define VBE_DISPI_INDEX_X_OFFSET        0x8
  31 #define VBE_DISPI_INDEX_Y_OFFSET        0x9
  32 #define VBE_DISPI_INDEX_VBOX_VIDEO      0xa
  33 #define VBE_DISPI_INDEX_FB_BASE_HI      0xb
  34
  35 #define VBE_DISPI_ID0                   0xB0C0
  36 #define VBE_DISPI_ID1                   0xB0C1
  37 #define VBE_DISPI_ID2                   0xB0C2
  38 #define VBE_DISPI_ID3                   0xB0C3
  39 #define VBE_DISPI_ID4                   0xB0C4
  40
  41 #define VBE_DISPI_ID_VBOX_VIDEO         0xBE00
  42 /* The VBOX interface id. Indicates support for VBVA shared memory interface. */
  43 #define VBE_DISPI_ID_HGSMI              0xBE01
  44 #define VBE_DISPI_ID_ANYX               0xBE02
  45
  46 #define VBE_DISPI_DISABLED              0x00
  47 #define VBE_DISPI_ENABLED               0x01
  48 #define VBE_DISPI_GETCAPS               0x02
  49 #define VBE_DISPI_8BIT_DAC              0x20
  50
  51 #define VGA_PORT_HGSMI_HOST             0x3b0
  52 #define VGA_PORT_HGSMI_GUEST            0x3d0
  53
  54 #endif