drivers/i2c/busses/i2c-cht-wc.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Intel CHT Whiskey Cove PMIC I2C Master driver
   4  * Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
   5  *
   6  * Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
   7  * Copyright (C) 2011 - 2014 Intel Corporation. All rights reserved.
   8  */
   9
  10 #include <linux/acpi.h>
  11 #include <linux/completion.h>
  12 #include <linux/delay.h>
  13 #include <linux/i2c.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/irq.h>
  16 #include <linux/irqdomain.h>
  17 #include <linux/mfd/intel_soc_pmic.h>
  18 #include <linux/module.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/power/bq24190_charger.h>
  21 #include <linux/slab.h>
  22
  23 #define CHT_WC_I2C_CTRL                 0x5e24
  24 #define CHT_WC_I2C_CTRL_WR              BIT(0)
  25 #define CHT_WC_I2C_CTRL_RD              BIT(1)
  26 #define CHT_WC_I2C_CLIENT_ADDR          0x5e25
  27 #define CHT_WC_I2C_REG_OFFSET           0x5e26
  28 #define CHT_WC_I2C_WRDATA               0x5e27
  29 #define CHT_WC_I2C_RDDATA               0x5e28
  30
  31 #define CHT_WC_EXTCHGRIRQ               0x6e0a
  32 #define CHT_WC_EXTCHGRIRQ_CLIENT_IRQ    BIT(0)
  33 #define CHT_WC_EXTCHGRIRQ_WRITE_IRQ     BIT(1)
  34 #define CHT_WC_EXTCHGRIRQ_READ_IRQ      BIT(2)
  35 #define CHT_WC_EXTCHGRIRQ_NACK_IRQ      BIT(3)
  36 #define CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK  ((u8)GENMASK(3, 1))
  37 #define CHT_WC_EXTCHGRIRQ_MSK           0x6e17
  38
  39 struct cht_wc_i2c_adap {
  40         struct i2c_adapter adapter;
  41         wait_queue_head_t wait;
  42         struct irq_chip irqchip;
  43         struct mutex adap_lock;
  44         struct mutex irqchip_lock;
  45         struct regmap *regmap;
  46         struct irq_domain *irq_domain;
  47         struct i2c_client *client;
  48         int client_irq;
  49         u8 irq_mask;
  50         u8 old_irq_mask;
  51         int read_data;
  52         bool io_error;
  53         bool done;
  54 };
  55
  56 static irqreturn_t cht_wc_i2c_adap_thread_handler(int id, void *data)
  57 {
  58         struct cht_wc_i2c_adap *adap = data;
  59         int ret, reg;
  60
  61         mutex_lock(&adap->adap_lock);
  62
  63         /* Read IRQs */
  64         ret = regmap_read(adap->regmap, CHT_WC_EXTCHGRIRQ, &reg);
  65         if (ret) {
  66                 dev_err(&adap->adapter.dev, "Error reading extchgrirq reg\n");
  67                 mutex_unlock(&adap->adap_lock);
  68                 return IRQ_NONE;
  69         }
  70
  71         reg &= ~adap->irq_mask;
  72
  73         /* Reads must be acked after reading the received data. */
  74         ret = regmap_read(adap->regmap, CHT_WC_I2C_RDDATA, &adap->read_data);
  75         if (ret)
  76                 adap->io_error = true;
  77
  78         /*
  79          * Immediately ack IRQs, so that if new IRQs arrives while we're
  80          * handling the previous ones our irq will re-trigger when we're done.
  81          */
  82         ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, reg);
  83         if (ret)
  84                 dev_err(&adap->adapter.dev, "Error writing extchgrirq reg\n");
  85
  86         if (reg & CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK) {
  87                 adap->io_error |= !!(reg & CHT_WC_EXTCHGRIRQ_NACK_IRQ);
  88                 adap->done = true;
  89         }
  90
  91         mutex_unlock(&adap->adap_lock);
  92
  93         if (reg & CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK)
  94                 wake_up(&adap->wait);
  95
  96         /*
  97          * Do NOT use handle_nested_irq here, the client irq handler will
  98          * likely want to do i2c transfers and the i2c controller uses this
  99          * interrupt handler as well, so running the client irq handler from
 100          * this thread will cause things to lock up.
 101          */
 102         if (reg & CHT_WC_EXTCHGRIRQ_CLIENT_IRQ) {
 103                 /*
 104                  * generic_handle_irq expects local IRQs to be disabled
 105                  * as normally it is called from interrupt context.
 106                  */
 107                 local_irq_disable();
 108                 generic_handle_irq(adap->client_irq);
 109                 local_irq_enable();
 110         }
 111
 112         return IRQ_HANDLED;
 113 }
 114
 115 static u32 cht_wc_i2c_adap_master_func(struct i2c_adapter *adap)
 116 {
 117         /* This i2c adapter only supports SMBUS byte transfers */
 118         return I2C_FUNC_SMBUS_BYTE_DATA;
 119 }
 120
 121 static int cht_wc_i2c_adap_smbus_xfer(struct i2c_adapter *_adap, u16 addr,
 122                                       unsigned short flags, char read_write,
 123                                       u8 command, int size,
 124                                       union i2c_smbus_data *data)
 125 {
 126         struct cht_wc_i2c_adap *adap = i2c_get_adapdata(_adap);
 127         int ret;
 128
 129         mutex_lock(&adap->adap_lock);
 130         adap->io_error = false;
 131         adap->done = false;
 132         mutex_unlock(&adap->adap_lock);
 133
 134         ret = regmap_write(adap->regmap, CHT_WC_I2C_CLIENT_ADDR, addr);
 135         if (ret)
 136                 return ret;
 137
 138         if (read_write == I2C_SMBUS_WRITE) {
 139                 ret = regmap_write(adap->regmap, CHT_WC_I2C_WRDATA, data->byte);
 140                 if (ret)
 141                         return ret;
 142         }
 143
 144         ret = regmap_write(adap->regmap, CHT_WC_I2C_REG_OFFSET, command);
 145         if (ret)
 146                 return ret;
 147
 148         ret = regmap_write(adap->regmap, CHT_WC_I2C_CTRL,
 149                            (read_write == I2C_SMBUS_WRITE) ?
 150                            CHT_WC_I2C_CTRL_WR : CHT_WC_I2C_CTRL_RD);
 151         if (ret)
 152                 return ret;
 153
 154         ret = wait_event_timeout(adap->wait, adap->done, msecs_to_jiffies(30));
 155         if (ret == 0) {
 156                 /*
 157                  * The CHT GPIO controller serializes all IRQs, sometimes
 158                  * causing significant delays, check status manually.
 159                  */
 160                 cht_wc_i2c_adap_thread_handler(0, adap);
 161                 if (!adap->done)
 162                         return -ETIMEDOUT;
 163         }
 164
 165         ret = 0;
 166         mutex_lock(&adap->adap_lock);
 167         if (adap->io_error)
 168                 ret = -EIO;
 169         else if (read_write == I2C_SMBUS_READ)
 170                 data->byte = adap->read_data;
 171         mutex_unlock(&adap->adap_lock);
 172
 173         return ret;
 174 }
 175
 176 static const struct i2c_algorithm cht_wc_i2c_adap_algo = {
 177         .functionality = cht_wc_i2c_adap_master_func,
 178         .smbus_xfer = cht_wc_i2c_adap_smbus_xfer,
 179 };
 180
 181 /*
 182  * We are an i2c-adapter which itself is part of an i2c-client. This means that
 183  * transfers done through us take adapter->bus_lock twice, once for our parent
 184  * i2c-adapter and once to take our own bus_lock. Lockdep does not like this
 185  * nested locking, to make lockdep happy in the case of busses with muxes, the
 186  * i2c-core's i2c_adapter_lock_bus function calls:
 187  * rt_mutex_lock_nested(&adapter->bus_lock, i2c_adapter_depth(adapter));
 188  *
 189  * But i2c_adapter_depth only works when the direct parent of the adapter is
 190  * another adapter, as it is only meant for muxes. In our case there is an
 191  * i2c-client and MFD instantiated platform_device in the parent->child chain
 192  * between the 2 devices.
 193  *
 194  * So we override the default i2c_lock_operations and pass a hardcoded
 195  * depth of 1 to rt_mutex_lock_nested, to make lockdep happy.
 196  *
 197  * Note that if there were to be a mux attached to our adapter, this would
 198  * break things again since the i2c-mux code expects the root-adapter to have
 199  * a locking depth of 0. But we always have only 1 client directly attached
 200  * in the form of the Charger IC paired with the CHT Whiskey Cove PMIC.
 201  */
 202 static void cht_wc_i2c_adap_lock_bus(struct i2c_adapter *adapter,
 203                                  unsigned int flags)
 204 {
 205         rt_mutex_lock_nested(&adapter->bus_lock, 1);
 206 }
 207
 208 static int cht_wc_i2c_adap_trylock_bus(struct i2c_adapter *adapter,
 209                                    unsigned int flags)
 210 {
 211         return rt_mutex_trylock(&adapter->bus_lock);
 212 }
 213
 214 static void cht_wc_i2c_adap_unlock_bus(struct i2c_adapter *adapter,
 215                                    unsigned int flags)
 216 {
 217         rt_mutex_unlock(&adapter->bus_lock);
 218 }
 219
 220 static const struct i2c_lock_operations cht_wc_i2c_adap_lock_ops = {
 221         .lock_bus =    cht_wc_i2c_adap_lock_bus,
 222         .trylock_bus = cht_wc_i2c_adap_trylock_bus,
 223         .unlock_bus =  cht_wc_i2c_adap_unlock_bus,
 224 };
 225
 226 /**** irqchip for the client connected to the extchgr i2c adapter ****/
 227 static void cht_wc_i2c_irq_lock(struct irq_data *data)
 228 {
 229         struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
 230
 231         mutex_lock(&adap->irqchip_lock);
 232 }
 233
 234 static void cht_wc_i2c_irq_sync_unlock(struct irq_data *data)
 235 {
 236         struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
 237         int ret;
 238
 239         if (adap->irq_mask != adap->old_irq_mask) {
 240                 ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK,
 241                                    adap->irq_mask);
 242                 if (ret == 0)
 243                         adap->old_irq_mask = adap->irq_mask;
 244                 else
 245                         dev_err(&adap->adapter.dev, "Error writing EXTCHGRIRQ_MSK\n");
 246         }
 247
 248         mutex_unlock(&adap->irqchip_lock);
 249 }
 250
 251 static void cht_wc_i2c_irq_enable(struct irq_data *data)
 252 {
 253         struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
 254
 255         adap->irq_mask &= ~CHT_WC_EXTCHGRIRQ_CLIENT_IRQ;
 256 }
 257
 258 static void cht_wc_i2c_irq_disable(struct irq_data *data)
 259 {
 260         struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
 261
 262         adap->irq_mask |= CHT_WC_EXTCHGRIRQ_CLIENT_IRQ;
 263 }
 264
 265 static const struct irq_chip cht_wc_i2c_irq_chip = {
 266         .irq_bus_lock           = cht_wc_i2c_irq_lock,
 267         .irq_bus_sync_unlock    = cht_wc_i2c_irq_sync_unlock,
 268         .irq_disable            = cht_wc_i2c_irq_disable,
 269         .irq_enable             = cht_wc_i2c_irq_enable,
 270         .name                   = "cht_wc_ext_chrg_irq_chip",
 271 };
 272
 273 static const char * const bq24190_suppliers[] = {
 274         "tcpm-source-psy-i2c-fusb302" };
 275
 276 static const struct property_entry bq24190_props[] = {
 277         PROPERTY_ENTRY_STRING_ARRAY("supplied-from", bq24190_suppliers),
 278         PROPERTY_ENTRY_BOOL("omit-battery-class"),
 279         PROPERTY_ENTRY_BOOL("disable-reset"),
 280         { }
 281 };
 282
 283 static struct regulator_consumer_supply fusb302_consumer = {
 284         .supply = "vbus",
 285         /* Must match fusb302 dev_name in intel_cht_int33fe.c */
 286         .dev_name = "i2c-fusb302",
 287 };
 288
 289 static const struct regulator_init_data bq24190_vbus_init_data = {
 290         .constraints = {
 291                 /* The name is used in intel_cht_int33fe.c do not change. */
 292                 .name = "cht_wc_usb_typec_vbus",
 293                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
 294         },
 295         .consumer_supplies = &fusb302_consumer,
 296         .num_consumer_supplies = 1,
 297 };
 298
 299 static struct bq24190_platform_data bq24190_pdata = {
 300         .regulator_init_data = &bq24190_vbus_init_data,
 301 };
 302
 303 static int cht_wc_i2c_adap_i2c_probe(struct platform_device *pdev)
 304 {
 305         struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
 306         struct cht_wc_i2c_adap *adap;
 307         struct i2c_board_info board_info = {
 308                 .type = "bq24190",
 309                 .addr = 0x6b,
 310                 .dev_name = "bq24190",
 311                 .properties = bq24190_props,
 312                 .platform_data = &bq24190_pdata,
 313         };
 314         int ret, reg, irq;
 315
 316         irq = platform_get_irq(pdev, 0);
 317         if (irq < 0)
 318                 return irq;
 319
 320         adap = devm_kzalloc(&pdev->dev, sizeof(*adap), GFP_KERNEL);
 321         if (!adap)
 322                 return -ENOMEM;
 323
 324         init_waitqueue_head(&adap->wait);
 325         mutex_init(&adap->adap_lock);
 326         mutex_init(&adap->irqchip_lock);
 327         adap->irqchip = cht_wc_i2c_irq_chip;
 328         adap->regmap = pmic->regmap;
 329         adap->adapter.owner = THIS_MODULE;
 330         adap->adapter.class = I2C_CLASS_HWMON;
 331         adap->adapter.algo = &cht_wc_i2c_adap_algo;
 332         adap->adapter.lock_ops = &cht_wc_i2c_adap_lock_ops;
 333         strlcpy(adap->adapter.name, "PMIC I2C Adapter",
 334                 sizeof(adap->adapter.name));
 335         adap->adapter.dev.parent = &pdev->dev;
 336
 337         /* Clear and activate i2c-adapter interrupts, disable client IRQ */
 338         adap->old_irq_mask = adap->irq_mask = ~CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK;
 339
 340         ret = regmap_read(adap->regmap, CHT_WC_I2C_RDDATA, &reg);
 341         if (ret)
 342                 return ret;
 343
 344         ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, ~adap->irq_mask);
 345         if (ret)
 346                 return ret;
 347
 348         ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK, adap->irq_mask);
 349         if (ret)
 350                 return ret;
 351
 352         /* Alloc and register client IRQ */
 353         adap->irq_domain = irq_domain_add_linear(pdev->dev.of_node, 1,
 354                                                  &irq_domain_simple_ops, NULL);
 355         if (!adap->irq_domain)
 356                 return -ENOMEM;
 357
 358         adap->client_irq = irq_create_mapping(adap->irq_domain, 0);
 359         if (!adap->client_irq) {
 360                 ret = -ENOMEM;
 361                 goto remove_irq_domain;
 362         }
 363
 364         irq_set_chip_data(adap->client_irq, adap);
 365         irq_set_chip_and_handler(adap->client_irq, &adap->irqchip,
 366                                  handle_simple_irq);
 367
 368         ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
 369                                         cht_wc_i2c_adap_thread_handler,
 370                                         IRQF_ONESHOT, "PMIC I2C Adapter", adap);
 371         if (ret)
 372                 goto remove_irq_domain;
 373
 374         i2c_set_adapdata(&adap->adapter, adap);
 375         ret = i2c_add_adapter(&adap->adapter);
 376         if (ret)
 377                 goto remove_irq_domain;
 378
 379         /*
 380          * Normally the Whiskey Cove PMIC is paired with a TI bq24292i charger,
 381          * connected to this i2c bus, and a max17047 fuel-gauge and a fusb302
 382          * USB Type-C controller connected to another i2c bus. In this setup
 383          * the max17047 and fusb302 devices are enumerated through an INT33FE
 384          * ACPI device. If this device is present register an i2c-client for
 385          * the TI bq24292i charger.
 386          */
 387         if (acpi_dev_present("INT33FE", NULL, -1)) {
 388                 board_info.irq = adap->client_irq;
 389                 adap->client = i2c_new_client_device(&adap->adapter, &board_info);
 390                 if (IS_ERR(adap->client)) {
 391                         ret = PTR_ERR(adap->client);
 392                         goto del_adapter;
 393                 }
 394         }
 395
 396         platform_set_drvdata(pdev, adap);
 397         return 0;
 398
 399 del_adapter:
 400         i2c_del_adapter(&adap->adapter);
 401 remove_irq_domain:
 402         irq_domain_remove(adap->irq_domain);
 403         return ret;
 404 }
 405
 406 static int cht_wc_i2c_adap_i2c_remove(struct platform_device *pdev)
 407 {
 408         struct cht_wc_i2c_adap *adap = platform_get_drvdata(pdev);
 409
 410         i2c_unregister_device(adap->client);
 411         i2c_del_adapter(&adap->adapter);
 412         irq_domain_remove(adap->irq_domain);
 413
 414         return 0;
 415 }
 416
 417 static const struct platform_device_id cht_wc_i2c_adap_id_table[] = {
 418         { .name = "cht_wcove_ext_chgr" },
 419         {},
 420 };
 421 MODULE_DEVICE_TABLE(platform, cht_wc_i2c_adap_id_table);
 422
 423 static struct platform_driver cht_wc_i2c_adap_driver = {
 424         .probe = cht_wc_i2c_adap_i2c_probe,
 425         .remove = cht_wc_i2c_adap_i2c_remove,
 426         .driver = {
 427                 .name = "cht_wcove_ext_chgr",
 428         },
 429         .id_table = cht_wc_i2c_adap_id_table,
 430 };
 431 module_platform_driver(cht_wc_i2c_adap_driver);
 432
 433 MODULE_DESCRIPTION("Intel CHT Whiskey Cove PMIC I2C Master driver");
 434 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
 435 MODULE_LICENSE("GPL");