WIP FPC-III support
[linux/fpc-iii.git] / drivers / i2c / busses / i2c-thunderx-pcidrv.c
blob12c90aa0900e60b63e0a14215f3692c12876c9cf
1 /*
2 * Cavium ThunderX i2c driver.
4 * Copyright (C) 2015,2016 Cavium Inc.
5 * Authors: Fred Martin <fmartin@caviumnetworks.com>
6 * Jan Glauber <jglauber@cavium.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/acpi.h>
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/i2c.h>
17 #include <linux/i2c-smbus.h>
18 #include <linux/interrupt.h>
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/of_irq.h>
22 #include <linux/pci.h>
24 #include "i2c-octeon-core.h"
26 #define DRV_NAME "i2c-thunderx"
28 #define PCI_DEVICE_ID_THUNDER_TWSI 0xa012
30 #define SYS_FREQ_DEFAULT 700000000
32 #define TWSI_INT_ENA_W1C 0x1028
33 #define TWSI_INT_ENA_W1S 0x1030
36 * Enable the CORE interrupt.
37 * The interrupt will be asserted when there is non-STAT_IDLE state in the
38 * SW_TWSI_EOP_TWSI_STAT register.
40 static void thunder_i2c_int_enable(struct octeon_i2c *i2c)
42 octeon_i2c_writeq_flush(TWSI_INT_CORE_INT,
43 i2c->twsi_base + TWSI_INT_ENA_W1S);
47 * Disable the CORE interrupt.
49 static void thunder_i2c_int_disable(struct octeon_i2c *i2c)
51 octeon_i2c_writeq_flush(TWSI_INT_CORE_INT,
52 i2c->twsi_base + TWSI_INT_ENA_W1C);
55 static void thunder_i2c_hlc_int_enable(struct octeon_i2c *i2c)
57 octeon_i2c_writeq_flush(TWSI_INT_ST_INT | TWSI_INT_TS_INT,
58 i2c->twsi_base + TWSI_INT_ENA_W1S);
61 static void thunder_i2c_hlc_int_disable(struct octeon_i2c *i2c)
63 octeon_i2c_writeq_flush(TWSI_INT_ST_INT | TWSI_INT_TS_INT,
64 i2c->twsi_base + TWSI_INT_ENA_W1C);
67 static u32 thunderx_i2c_functionality(struct i2c_adapter *adap)
69 return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK) |
70 I2C_FUNC_SMBUS_READ_BLOCK_DATA | I2C_SMBUS_BLOCK_PROC_CALL;
73 static const struct i2c_algorithm thunderx_i2c_algo = {
74 .master_xfer = octeon_i2c_xfer,
75 .functionality = thunderx_i2c_functionality,
78 static const struct i2c_adapter thunderx_i2c_ops = {
79 .owner = THIS_MODULE,
80 .name = "ThunderX adapter",
81 .algo = &thunderx_i2c_algo,
84 static void thunder_i2c_clock_enable(struct device *dev, struct octeon_i2c *i2c)
86 int ret;
88 if (acpi_disabled) {
89 /* DT */
90 i2c->clk = clk_get(dev, NULL);
91 if (IS_ERR(i2c->clk)) {
92 i2c->clk = NULL;
93 goto skip;
96 ret = clk_prepare_enable(i2c->clk);
97 if (ret)
98 goto skip;
99 i2c->sys_freq = clk_get_rate(i2c->clk);
100 } else {
101 /* ACPI */
102 device_property_read_u32(dev, "sclk", &i2c->sys_freq);
105 skip:
106 if (!i2c->sys_freq)
107 i2c->sys_freq = SYS_FREQ_DEFAULT;
110 static void thunder_i2c_clock_disable(struct device *dev, struct clk *clk)
112 if (!clk)
113 return;
114 clk_disable_unprepare(clk);
115 clk_put(clk);
118 static int thunder_i2c_smbus_setup_of(struct octeon_i2c *i2c,
119 struct device_node *node)
121 struct i2c_client *ara;
123 if (!node)
124 return -EINVAL;
126 i2c->alert_data.irq = irq_of_parse_and_map(node, 0);
127 if (!i2c->alert_data.irq)
128 return -EINVAL;
130 ara = i2c_new_smbus_alert_device(&i2c->adap, &i2c->alert_data);
131 if (IS_ERR(ara))
132 return PTR_ERR(ara);
134 i2c->ara = ara;
136 return 0;
139 static int thunder_i2c_smbus_setup(struct octeon_i2c *i2c,
140 struct device_node *node)
142 /* TODO: ACPI support */
143 if (!acpi_disabled)
144 return -EOPNOTSUPP;
146 return thunder_i2c_smbus_setup_of(i2c, node);
149 static void thunder_i2c_smbus_remove(struct octeon_i2c *i2c)
151 i2c_unregister_device(i2c->ara);
154 static int thunder_i2c_probe_pci(struct pci_dev *pdev,
155 const struct pci_device_id *ent)
157 struct device *dev = &pdev->dev;
158 struct octeon_i2c *i2c;
159 int ret;
161 i2c = devm_kzalloc(dev, sizeof(*i2c), GFP_KERNEL);
162 if (!i2c)
163 return -ENOMEM;
165 i2c->roff.sw_twsi = 0x1000;
166 i2c->roff.twsi_int = 0x1010;
167 i2c->roff.sw_twsi_ext = 0x1018;
169 i2c->dev = dev;
170 pci_set_drvdata(pdev, i2c);
171 ret = pcim_enable_device(pdev);
172 if (ret)
173 return ret;
175 ret = pci_request_regions(pdev, DRV_NAME);
176 if (ret)
177 return ret;
179 i2c->twsi_base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));
180 if (!i2c->twsi_base)
181 return -EINVAL;
183 thunder_i2c_clock_enable(dev, i2c);
184 ret = device_property_read_u32(dev, "clock-frequency", &i2c->twsi_freq);
185 if (ret)
186 i2c->twsi_freq = I2C_MAX_STANDARD_MODE_FREQ;
188 init_waitqueue_head(&i2c->queue);
190 i2c->int_enable = thunder_i2c_int_enable;
191 i2c->int_disable = thunder_i2c_int_disable;
192 i2c->hlc_int_enable = thunder_i2c_hlc_int_enable;
193 i2c->hlc_int_disable = thunder_i2c_hlc_int_disable;
195 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSIX);
196 if (ret < 0)
197 goto error;
199 ret = devm_request_irq(dev, pci_irq_vector(pdev, 0), octeon_i2c_isr, 0,
200 DRV_NAME, i2c);
201 if (ret)
202 goto error;
204 ret = octeon_i2c_init_lowlevel(i2c);
205 if (ret)
206 goto error;
208 octeon_i2c_set_clock(i2c);
210 i2c->adap = thunderx_i2c_ops;
211 i2c->adap.retries = 5;
212 i2c->adap.class = I2C_CLASS_HWMON;
213 i2c->adap.bus_recovery_info = &octeon_i2c_recovery_info;
214 i2c->adap.dev.parent = dev;
215 i2c->adap.dev.of_node = pdev->dev.of_node;
216 snprintf(i2c->adap.name, sizeof(i2c->adap.name),
217 "Cavium ThunderX i2c adapter at %s", dev_name(dev));
218 i2c_set_adapdata(&i2c->adap, i2c);
220 ret = i2c_add_adapter(&i2c->adap);
221 if (ret)
222 goto error;
224 dev_info(i2c->dev, "Probed. Set system clock to %u\n", i2c->sys_freq);
226 ret = thunder_i2c_smbus_setup(i2c, pdev->dev.of_node);
227 if (ret)
228 dev_info(dev, "SMBUS alert not active on this bus\n");
230 return 0;
232 error:
233 thunder_i2c_clock_disable(dev, i2c->clk);
234 return ret;
237 static void thunder_i2c_remove_pci(struct pci_dev *pdev)
239 struct octeon_i2c *i2c = pci_get_drvdata(pdev);
241 thunder_i2c_smbus_remove(i2c);
242 thunder_i2c_clock_disable(&pdev->dev, i2c->clk);
243 i2c_del_adapter(&i2c->adap);
246 static const struct pci_device_id thunder_i2c_pci_id_table[] = {
247 { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDER_TWSI) },
248 { 0, }
251 MODULE_DEVICE_TABLE(pci, thunder_i2c_pci_id_table);
253 static struct pci_driver thunder_i2c_pci_driver = {
254 .name = DRV_NAME,
255 .id_table = thunder_i2c_pci_id_table,
256 .probe = thunder_i2c_probe_pci,
257 .remove = thunder_i2c_remove_pci,
260 module_pci_driver(thunder_i2c_pci_driver);
262 MODULE_LICENSE("GPL");
263 MODULE_AUTHOR("Fred Martin <fmartin@caviumnetworks.com>");
264 MODULE_DESCRIPTION("I2C-Bus adapter for Cavium ThunderX SOC");