drivers/i2c/busses/i2c-xgene-slimpro.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * X-Gene SLIMpro I2C Driver
   4  *
   5  * Copyright (c) 2014, Applied Micro Circuits Corporation
   6  * Author: Feng Kan <fkan@apm.com>
   7  * Author: Hieu Le <hnle@apm.com>
   8  *
   9  * This driver provides support for X-Gene SLIMpro I2C device access
  10  * using the APM X-Gene SLIMpro mailbox driver.
  11  */
  12 #include <acpi/pcc.h>
  13 #include <linux/acpi.h>
  14 #include <linux/dma-mapping.h>
  15 #include <linux/i2c.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/io.h>
  18 #include <linux/mailbox_client.h>
  19 #include <linux/module.h>
  20 #include <linux/of.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/version.h>
  23
  24 #define MAILBOX_OP_TIMEOUT              1000    /* Operation time out in ms */
  25 #define MAILBOX_I2C_INDEX               0
  26 #define SLIMPRO_IIC_BUS                 1       /* Use I2C bus 1 only */
  27
  28 #define SMBUS_CMD_LEN                   1
  29 #define BYTE_DATA                       1
  30 #define WORD_DATA                       2
  31 #define BLOCK_DATA                      3
  32
  33 #define SLIMPRO_IIC_I2C_PROTOCOL        0
  34 #define SLIMPRO_IIC_SMB_PROTOCOL        1
  35
  36 #define SLIMPRO_IIC_READ                0
  37 #define SLIMPRO_IIC_WRITE               1
  38
  39 #define IIC_SMB_WITHOUT_DATA_LEN        0
  40 #define IIC_SMB_WITH_DATA_LEN           1
  41
  42 #define SLIMPRO_DEBUG_MSG               0
  43 #define SLIMPRO_MSG_TYPE_SHIFT          28
  44 #define SLIMPRO_DBG_SUBTYPE_I2C1READ    4
  45 #define SLIMPRO_DBGMSG_TYPE_SHIFT       24
  46 #define SLIMPRO_DBGMSG_TYPE_MASK        0x0F000000U
  47 #define SLIMPRO_IIC_DEV_SHIFT           23
  48 #define SLIMPRO_IIC_DEV_MASK            0x00800000U
  49 #define SLIMPRO_IIC_DEVID_SHIFT         13
  50 #define SLIMPRO_IIC_DEVID_MASK          0x007FE000U
  51 #define SLIMPRO_IIC_RW_SHIFT            12
  52 #define SLIMPRO_IIC_RW_MASK             0x00001000U
  53 #define SLIMPRO_IIC_PROTO_SHIFT         11
  54 #define SLIMPRO_IIC_PROTO_MASK          0x00000800U
  55 #define SLIMPRO_IIC_ADDRLEN_SHIFT       8
  56 #define SLIMPRO_IIC_ADDRLEN_MASK        0x00000700U
  57 #define SLIMPRO_IIC_DATALEN_SHIFT       0
  58 #define SLIMPRO_IIC_DATALEN_MASK        0x000000FFU
  59
  60 /*
  61  * SLIMpro I2C message encode
  62  *
  63  * dev          - Controller number (0-based)
  64  * chip         - I2C chip address
  65  * op           - SLIMPRO_IIC_READ or SLIMPRO_IIC_WRITE
  66  * proto        - SLIMPRO_IIC_SMB_PROTOCOL or SLIMPRO_IIC_I2C_PROTOCOL
  67  * addrlen      - Length of the address field
  68  * datalen      - Length of the data field
  69  */
  70 #define SLIMPRO_IIC_ENCODE_MSG(dev, chip, op, proto, addrlen, datalen) \
  71         ((SLIMPRO_DEBUG_MSG << SLIMPRO_MSG_TYPE_SHIFT) | \
  72         ((SLIMPRO_DBG_SUBTYPE_I2C1READ << SLIMPRO_DBGMSG_TYPE_SHIFT) & \
  73         SLIMPRO_DBGMSG_TYPE_MASK) | \
  74         ((dev << SLIMPRO_IIC_DEV_SHIFT) & SLIMPRO_IIC_DEV_MASK) | \
  75         ((chip << SLIMPRO_IIC_DEVID_SHIFT) & SLIMPRO_IIC_DEVID_MASK) | \
  76         ((op << SLIMPRO_IIC_RW_SHIFT) & SLIMPRO_IIC_RW_MASK) | \
  77         ((proto << SLIMPRO_IIC_PROTO_SHIFT) & SLIMPRO_IIC_PROTO_MASK) | \
  78         ((addrlen << SLIMPRO_IIC_ADDRLEN_SHIFT) & SLIMPRO_IIC_ADDRLEN_MASK) | \
  79         ((datalen << SLIMPRO_IIC_DATALEN_SHIFT) & SLIMPRO_IIC_DATALEN_MASK))
  80
  81 #define SLIMPRO_MSG_TYPE(v)             (((v) & 0xF0000000) >> 28)
  82
  83 /*
  84  * Encode for upper address for block data
  85  */
  86 #define SLIMPRO_IIC_ENCODE_FLAG_BUFADDR                 0x80000000
  87 #define SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(a)        ((u32) (((a) << 30) \
  88                                                                 & 0x40000000))
  89 #define SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(a)             ((u32) (((a) >> 12) \
  90                                                                 & 0x3FF00000))
  91 #define SLIMPRO_IIC_ENCODE_ADDR(a)                      ((a) & 0x000FFFFF)
  92
  93 #define SLIMPRO_IIC_MSG_DWORD_COUNT                     3
  94
  95 /* PCC related defines */
  96 #define PCC_SIGNATURE                   0x50424300
  97 #define PCC_STS_CMD_COMPLETE            BIT(0)
  98 #define PCC_STS_SCI_DOORBELL            BIT(1)
  99 #define PCC_STS_ERR                     BIT(2)
 100 #define PCC_STS_PLAT_NOTIFY             BIT(3)
 101 #define PCC_CMD_GENERATE_DB_INT         BIT(15)
 102
 103 struct slimpro_i2c_dev {
 104         struct i2c_adapter adapter;
 105         struct device *dev;
 106         struct mbox_chan *mbox_chan;
 107         struct mbox_client mbox_client;
 108         int mbox_idx;
 109         struct completion rd_complete;
 110         u8 dma_buffer[I2C_SMBUS_BLOCK_MAX + 1]; /* dma_buffer[0] is used for length */
 111         u32 *resp_msg;
 112         phys_addr_t comm_base_addr;
 113         void *pcc_comm_addr;
 114 };
 115
 116 #define to_slimpro_i2c_dev(cl)  \
 117                 container_of(cl, struct slimpro_i2c_dev, mbox_client)
 118
 119 enum slimpro_i2c_version {
 120         XGENE_SLIMPRO_I2C_V1 = 0,
 121         XGENE_SLIMPRO_I2C_V2 = 1,
 122 };
 123
 124 /*
 125  * This function tests and clears a bitmask then returns its old value
 126  */
 127 static u16 xgene_word_tst_and_clr(u16 *addr, u16 mask)
 128 {
 129         u16 ret, val;
 130
 131         val = le16_to_cpu(READ_ONCE(*addr));
 132         ret = val & mask;
 133         val &= ~mask;
 134         WRITE_ONCE(*addr, cpu_to_le16(val));
 135
 136         return ret;
 137 }
 138
 139 static void slimpro_i2c_rx_cb(struct mbox_client *cl, void *mssg)
 140 {
 141         struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl);
 142
 143         /*
 144          * Response message format:
 145          * mssg[0] is the return code of the operation
 146          * mssg[1] is the first data word
 147          * mssg[2] is NOT used
 148          */
 149         if (ctx->resp_msg)
 150                 *ctx->resp_msg = ((u32 *)mssg)[1];
 151
 152         if (ctx->mbox_client.tx_block)
 153                 complete(&ctx->rd_complete);
 154 }
 155
 156 static void slimpro_i2c_pcc_rx_cb(struct mbox_client *cl, void *msg)
 157 {
 158         struct slimpro_i2c_dev *ctx = to_slimpro_i2c_dev(cl);
 159         struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
 160
 161         /* Check if platform sends interrupt */
 162         if (!xgene_word_tst_and_clr(&generic_comm_base->status,
 163                                     PCC_STS_SCI_DOORBELL))
 164                 return;
 165
 166         if (xgene_word_tst_and_clr(&generic_comm_base->status,
 167                                    PCC_STS_CMD_COMPLETE)) {
 168                 msg = generic_comm_base + 1;
 169
 170                 /* Response message msg[1] contains the return value. */
 171                 if (ctx->resp_msg)
 172                         *ctx->resp_msg = ((u32 *)msg)[1];
 173
 174                 complete(&ctx->rd_complete);
 175         }
 176 }
 177
 178 static void slimpro_i2c_pcc_tx_prepare(struct slimpro_i2c_dev *ctx, u32 *msg)
 179 {
 180         struct acpi_pcct_shared_memory *generic_comm_base = ctx->pcc_comm_addr;
 181         u32 *ptr = (void *)(generic_comm_base + 1);
 182         u16 status;
 183         int i;
 184
 185         WRITE_ONCE(generic_comm_base->signature,
 186                    cpu_to_le32(PCC_SIGNATURE | ctx->mbox_idx));
 187
 188         WRITE_ONCE(generic_comm_base->command,
 189                    cpu_to_le16(SLIMPRO_MSG_TYPE(msg[0]) | PCC_CMD_GENERATE_DB_INT));
 190
 191         status = le16_to_cpu(READ_ONCE(generic_comm_base->status));
 192         status &= ~PCC_STS_CMD_COMPLETE;
 193         WRITE_ONCE(generic_comm_base->status, cpu_to_le16(status));
 194
 195         /* Copy the message to the PCC comm space */
 196         for (i = 0; i < SLIMPRO_IIC_MSG_DWORD_COUNT; i++)
 197                 WRITE_ONCE(ptr[i], cpu_to_le32(msg[i]));
 198 }
 199
 200 static int start_i2c_msg_xfer(struct slimpro_i2c_dev *ctx)
 201 {
 202         if (ctx->mbox_client.tx_block || !acpi_disabled) {
 203                 if (!wait_for_completion_timeout(&ctx->rd_complete,
 204                                                  msecs_to_jiffies(MAILBOX_OP_TIMEOUT)))
 205                         return -ETIMEDOUT;
 206         }
 207
 208         /* Check of invalid data or no device */
 209         if (*ctx->resp_msg == 0xffffffff)
 210                 return -ENODEV;
 211
 212         return 0;
 213 }
 214
 215 static int slimpro_i2c_send_msg(struct slimpro_i2c_dev *ctx,
 216                                 u32 *msg,
 217                                 u32 *data)
 218 {
 219         int rc;
 220
 221         ctx->resp_msg = data;
 222
 223         if (!acpi_disabled) {
 224                 reinit_completion(&ctx->rd_complete);
 225                 slimpro_i2c_pcc_tx_prepare(ctx, msg);
 226         }
 227
 228         rc = mbox_send_message(ctx->mbox_chan, msg);
 229         if (rc < 0)
 230                 goto err;
 231
 232         rc = start_i2c_msg_xfer(ctx);
 233
 234 err:
 235         if (!acpi_disabled)
 236                 mbox_chan_txdone(ctx->mbox_chan, 0);
 237
 238         ctx->resp_msg = NULL;
 239
 240         return rc;
 241 }
 242
 243 static int slimpro_i2c_rd(struct slimpro_i2c_dev *ctx, u32 chip,
 244                           u32 addr, u32 addrlen, u32 protocol,
 245                           u32 readlen, u32 *data)
 246 {
 247         u32 msg[3];
 248
 249         msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip,
 250                                         SLIMPRO_IIC_READ, protocol, addrlen, readlen);
 251         msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr);
 252         msg[2] = 0;
 253
 254         return slimpro_i2c_send_msg(ctx, msg, data);
 255 }
 256
 257 static int slimpro_i2c_wr(struct slimpro_i2c_dev *ctx, u32 chip,
 258                           u32 addr, u32 addrlen, u32 protocol, u32 writelen,
 259                           u32 data)
 260 {
 261         u32 msg[3];
 262
 263         msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip,
 264                                         SLIMPRO_IIC_WRITE, protocol, addrlen, writelen);
 265         msg[1] = SLIMPRO_IIC_ENCODE_ADDR(addr);
 266         msg[2] = data;
 267
 268         return slimpro_i2c_send_msg(ctx, msg, msg);
 269 }
 270
 271 static int slimpro_i2c_blkrd(struct slimpro_i2c_dev *ctx, u32 chip, u32 addr,
 272                              u32 addrlen, u32 protocol, u32 readlen,
 273                              u32 with_data_len, void *data)
 274 {
 275         dma_addr_t paddr;
 276         u32 msg[3];
 277         int rc;
 278
 279         paddr = dma_map_single(ctx->dev, ctx->dma_buffer, readlen, DMA_FROM_DEVICE);
 280         if (dma_mapping_error(ctx->dev, paddr)) {
 281                 dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n",
 282                         ctx->dma_buffer);
 283                 return -ENOMEM;
 284         }
 285
 286         msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_READ,
 287                                         protocol, addrlen, readlen);
 288         msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR |
 289                  SLIMPRO_IIC_ENCODE_FLAG_WITH_DATA_LEN(with_data_len) |
 290                  SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) |
 291                  SLIMPRO_IIC_ENCODE_ADDR(addr);
 292         msg[2] = (u32)paddr;
 293
 294         rc = slimpro_i2c_send_msg(ctx, msg, msg);
 295
 296         /* Copy to destination */
 297         memcpy(data, ctx->dma_buffer, readlen);
 298
 299         dma_unmap_single(ctx->dev, paddr, readlen, DMA_FROM_DEVICE);
 300         return rc;
 301 }
 302
 303 static int slimpro_i2c_blkwr(struct slimpro_i2c_dev *ctx, u32 chip,
 304                              u32 addr, u32 addrlen, u32 protocol, u32 writelen,
 305                              void *data)
 306 {
 307         dma_addr_t paddr;
 308         u32 msg[3];
 309         int rc;
 310
 311         memcpy(ctx->dma_buffer, data, writelen);
 312         paddr = dma_map_single(ctx->dev, ctx->dma_buffer, writelen,
 313                                DMA_TO_DEVICE);
 314         if (dma_mapping_error(ctx->dev, paddr)) {
 315                 dev_err(&ctx->adapter.dev, "Error in mapping dma buffer %p\n",
 316                         ctx->dma_buffer);
 317                 return -ENOMEM;
 318         }
 319
 320         msg[0] = SLIMPRO_IIC_ENCODE_MSG(SLIMPRO_IIC_BUS, chip, SLIMPRO_IIC_WRITE,
 321                                         protocol, addrlen, writelen);
 322         msg[1] = SLIMPRO_IIC_ENCODE_FLAG_BUFADDR |
 323                  SLIMPRO_IIC_ENCODE_UPPER_BUFADDR(paddr) |
 324                  SLIMPRO_IIC_ENCODE_ADDR(addr);
 325         msg[2] = (u32)paddr;
 326
 327         if (ctx->mbox_client.tx_block)
 328                 reinit_completion(&ctx->rd_complete);
 329
 330         rc = slimpro_i2c_send_msg(ctx, msg, msg);
 331
 332         dma_unmap_single(ctx->dev, paddr, writelen, DMA_TO_DEVICE);
 333         return rc;
 334 }
 335
 336 static int xgene_slimpro_i2c_xfer(struct i2c_adapter *adap, u16 addr,
 337                                   unsigned short flags, char read_write,
 338                                   u8 command, int size,
 339                                   union i2c_smbus_data *data)
 340 {
 341         struct slimpro_i2c_dev *ctx = i2c_get_adapdata(adap);
 342         int ret = -EOPNOTSUPP;
 343         u32 val;
 344
 345         switch (size) {
 346         case I2C_SMBUS_BYTE:
 347                 if (read_write == I2C_SMBUS_READ) {
 348                         ret = slimpro_i2c_rd(ctx, addr, 0, 0,
 349                                              SLIMPRO_IIC_SMB_PROTOCOL,
 350                                              BYTE_DATA, &val);
 351                         data->byte = val;
 352                 } else {
 353                         ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
 354                                              SLIMPRO_IIC_SMB_PROTOCOL,
 355                                              0, 0);
 356                 }
 357                 break;
 358         case I2C_SMBUS_BYTE_DATA:
 359                 if (read_write == I2C_SMBUS_READ) {
 360                         ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN,
 361                                              SLIMPRO_IIC_SMB_PROTOCOL,
 362                                              BYTE_DATA, &val);
 363                         data->byte = val;
 364                 } else {
 365                         val = data->byte;
 366                         ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
 367                                              SLIMPRO_IIC_SMB_PROTOCOL,
 368                                              BYTE_DATA, val);
 369                 }
 370                 break;
 371         case I2C_SMBUS_WORD_DATA:
 372                 if (read_write == I2C_SMBUS_READ) {
 373                         ret = slimpro_i2c_rd(ctx, addr, command, SMBUS_CMD_LEN,
 374                                              SLIMPRO_IIC_SMB_PROTOCOL,
 375                                              WORD_DATA, &val);
 376                         data->word = val;
 377                 } else {
 378                         val = data->word;
 379                         ret = slimpro_i2c_wr(ctx, addr, command, SMBUS_CMD_LEN,
 380                                              SLIMPRO_IIC_SMB_PROTOCOL,
 381                                              WORD_DATA, val);
 382                 }
 383                 break;
 384         case I2C_SMBUS_BLOCK_DATA:
 385                 if (read_write == I2C_SMBUS_READ) {
 386                         ret = slimpro_i2c_blkrd(ctx, addr, command,
 387                                                 SMBUS_CMD_LEN,
 388                                                 SLIMPRO_IIC_SMB_PROTOCOL,
 389                                                 I2C_SMBUS_BLOCK_MAX + 1,
 390                                                 IIC_SMB_WITH_DATA_LEN,
 391                                                 &data->block[0]);
 392
 393                 } else {
 394                         ret = slimpro_i2c_blkwr(ctx, addr, command,
 395                                                 SMBUS_CMD_LEN,
 396                                                 SLIMPRO_IIC_SMB_PROTOCOL,
 397                                                 data->block[0] + 1,
 398                                                 &data->block[0]);
 399                 }
 400                 break;
 401         case I2C_SMBUS_I2C_BLOCK_DATA:
 402                 if (read_write == I2C_SMBUS_READ) {
 403                         ret = slimpro_i2c_blkrd(ctx, addr,
 404                                                 command,
 405                                                 SMBUS_CMD_LEN,
 406                                                 SLIMPRO_IIC_I2C_PROTOCOL,
 407                                                 I2C_SMBUS_BLOCK_MAX,
 408                                                 IIC_SMB_WITHOUT_DATA_LEN,
 409                                                 &data->block[1]);
 410                 } else {
 411                         ret = slimpro_i2c_blkwr(ctx, addr, command,
 412                                                 SMBUS_CMD_LEN,
 413                                                 SLIMPRO_IIC_I2C_PROTOCOL,
 414                                                 data->block[0],
 415                                                 &data->block[1]);
 416                 }
 417                 break;
 418         default:
 419                 break;
 420         }
 421         return ret;
 422 }
 423
 424 /*
 425 * Return list of supported functionality.
 426 */
 427 static u32 xgene_slimpro_i2c_func(struct i2c_adapter *adapter)
 428 {
 429         return I2C_FUNC_SMBUS_BYTE |
 430                 I2C_FUNC_SMBUS_BYTE_DATA |
 431                 I2C_FUNC_SMBUS_WORD_DATA |
 432                 I2C_FUNC_SMBUS_BLOCK_DATA |
 433                 I2C_FUNC_SMBUS_I2C_BLOCK;
 434 }
 435
 436 static const struct i2c_algorithm xgene_slimpro_i2c_algorithm = {
 437         .smbus_xfer = xgene_slimpro_i2c_xfer,
 438         .functionality = xgene_slimpro_i2c_func,
 439 };
 440
 441 static int xgene_slimpro_i2c_probe(struct platform_device *pdev)
 442 {
 443         struct slimpro_i2c_dev *ctx;
 444         struct i2c_adapter *adapter;
 445         struct mbox_client *cl;
 446         int rc;
 447
 448         ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
 449         if (!ctx)
 450                 return -ENOMEM;
 451
 452         ctx->dev = &pdev->dev;
 453         platform_set_drvdata(pdev, ctx);
 454         cl = &ctx->mbox_client;
 455
 456         /* Request mailbox channel */
 457         cl->dev = &pdev->dev;
 458         init_completion(&ctx->rd_complete);
 459         cl->tx_tout = MAILBOX_OP_TIMEOUT;
 460         cl->knows_txdone = false;
 461         if (acpi_disabled) {
 462                 cl->tx_block = true;
 463                 cl->rx_callback = slimpro_i2c_rx_cb;
 464                 ctx->mbox_chan = mbox_request_channel(cl, MAILBOX_I2C_INDEX);
 465                 if (IS_ERR(ctx->mbox_chan)) {
 466                         dev_err(&pdev->dev, "i2c mailbox channel request failed\n");
 467                         return PTR_ERR(ctx->mbox_chan);
 468                 }
 469         } else {
 470                 struct acpi_pcct_hw_reduced *cppc_ss;
 471                 const struct acpi_device_id *acpi_id;
 472                 int version = XGENE_SLIMPRO_I2C_V1;
 473
 474                 acpi_id = acpi_match_device(pdev->dev.driver->acpi_match_table,
 475                                             &pdev->dev);
 476                 if (!acpi_id)
 477                         return -EINVAL;
 478
 479                 version = (int)acpi_id->driver_data;
 480
 481                 if (device_property_read_u32(&pdev->dev, "pcc-channel",
 482                                              &ctx->mbox_idx))
 483                         ctx->mbox_idx = MAILBOX_I2C_INDEX;
 484
 485                 cl->tx_block = false;
 486                 cl->rx_callback = slimpro_i2c_pcc_rx_cb;
 487                 ctx->mbox_chan = pcc_mbox_request_channel(cl, ctx->mbox_idx);
 488                 if (IS_ERR(ctx->mbox_chan)) {
 489                         dev_err(&pdev->dev, "PCC mailbox channel request failed\n");
 490                         return PTR_ERR(ctx->mbox_chan);
 491                 }
 492
 493                 /*
 494                  * The PCC mailbox controller driver should
 495                  * have parsed the PCCT (global table of all
 496                  * PCC channels) and stored pointers to the
 497                  * subspace communication region in con_priv.
 498                  */
 499                 cppc_ss = ctx->mbox_chan->con_priv;
 500                 if (!cppc_ss) {
 501                         dev_err(&pdev->dev, "PPC subspace not found\n");
 502                         rc = -ENOENT;
 503                         goto mbox_err;
 504                 }
 505
 506                 if (!ctx->mbox_chan->mbox->txdone_irq) {
 507                         dev_err(&pdev->dev, "PCC IRQ not supported\n");
 508                         rc = -ENOENT;
 509                         goto mbox_err;
 510                 }
 511
 512                 /*
 513                  * This is the shared communication region
 514                  * for the OS and Platform to communicate over.
 515                  */
 516                 ctx->comm_base_addr = cppc_ss->base_address;
 517                 if (ctx->comm_base_addr) {
 518                         if (version == XGENE_SLIMPRO_I2C_V2)
 519                                 ctx->pcc_comm_addr = memremap(
 520                                                         ctx->comm_base_addr,
 521                                                         cppc_ss->length,
 522                                                         MEMREMAP_WT);
 523                         else
 524                                 ctx->pcc_comm_addr = memremap(
 525                                                         ctx->comm_base_addr,
 526                                                         cppc_ss->length,
 527                                                         MEMREMAP_WB);
 528                 } else {
 529                         dev_err(&pdev->dev, "Failed to get PCC comm region\n");
 530                         rc = -ENOENT;
 531                         goto mbox_err;
 532                 }
 533
 534                 if (!ctx->pcc_comm_addr) {
 535                         dev_err(&pdev->dev,
 536                                 "Failed to ioremap PCC comm region\n");
 537                         rc = -ENOMEM;
 538                         goto mbox_err;
 539                 }
 540         }
 541         rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
 542         if (rc)
 543                 dev_warn(&pdev->dev, "Unable to set dma mask\n");
 544
 545         /* Setup I2C adapter */
 546         adapter = &ctx->adapter;
 547         snprintf(adapter->name, sizeof(adapter->name), "MAILBOX I2C");
 548         adapter->algo = &xgene_slimpro_i2c_algorithm;
 549         adapter->class = I2C_CLASS_HWMON;
 550         adapter->dev.parent = &pdev->dev;
 551         adapter->dev.of_node = pdev->dev.of_node;
 552         ACPI_COMPANION_SET(&adapter->dev, ACPI_COMPANION(&pdev->dev));
 553         i2c_set_adapdata(adapter, ctx);
 554         rc = i2c_add_adapter(adapter);
 555         if (rc)
 556                 goto mbox_err;
 557
 558         dev_info(&pdev->dev, "Mailbox I2C Adapter registered\n");
 559         return 0;
 560
 561 mbox_err:
 562         if (acpi_disabled)
 563                 mbox_free_channel(ctx->mbox_chan);
 564         else
 565                 pcc_mbox_free_channel(ctx->mbox_chan);
 566
 567         return rc;
 568 }
 569
 570 static int xgene_slimpro_i2c_remove(struct platform_device *pdev)
 571 {
 572         struct slimpro_i2c_dev *ctx = platform_get_drvdata(pdev);
 573
 574         i2c_del_adapter(&ctx->adapter);
 575
 576         if (acpi_disabled)
 577                 mbox_free_channel(ctx->mbox_chan);
 578         else
 579                 pcc_mbox_free_channel(ctx->mbox_chan);
 580
 581         return 0;
 582 }
 583
 584 static const struct of_device_id xgene_slimpro_i2c_dt_ids[] = {
 585         {.compatible = "apm,xgene-slimpro-i2c" },
 586         {},
 587 };
 588 MODULE_DEVICE_TABLE(of, xgene_slimpro_i2c_dt_ids);
 589
 590 #ifdef CONFIG_ACPI
 591 static const struct acpi_device_id xgene_slimpro_i2c_acpi_ids[] = {
 592         {"APMC0D40", XGENE_SLIMPRO_I2C_V1},
 593         {"APMC0D8B", XGENE_SLIMPRO_I2C_V2},
 594         {}
 595 };
 596 MODULE_DEVICE_TABLE(acpi, xgene_slimpro_i2c_acpi_ids);
 597 #endif
 598
 599 static struct platform_driver xgene_slimpro_i2c_driver = {
 600         .probe  = xgene_slimpro_i2c_probe,
 601         .remove = xgene_slimpro_i2c_remove,
 602         .driver = {
 603                 .name   = "xgene-slimpro-i2c",
 604                 .of_match_table = of_match_ptr(xgene_slimpro_i2c_dt_ids),
 605                 .acpi_match_table = ACPI_PTR(xgene_slimpro_i2c_acpi_ids)
 606         },
 607 };
 608
 609 module_platform_driver(xgene_slimpro_i2c_driver);
 610
 611 MODULE_DESCRIPTION("APM X-Gene SLIMpro I2C driver");
 612 MODULE_AUTHOR("Feng Kan <fkan@apm.com>");
 613 MODULE_AUTHOR("Hieu Le <hnle@apm.com>");
 614 MODULE_LICENSE("GPL");