WIP FPC-III support
[linux/fpc-iii.git] / drivers / iio / dac / ad5446.c
blobd87e21016863c5b2e2a31df75e4dff8edd8a6109
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * AD5446 SPI DAC driver
5 * Copyright 2010 Analog Devices Inc.
6 */
8 #include <linux/interrupt.h>
9 #include <linux/workqueue.h>
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/sysfs.h>
14 #include <linux/list.h>
15 #include <linux/spi/spi.h>
16 #include <linux/i2c.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/err.h>
19 #include <linux/module.h>
20 #include <linux/mod_devicetable.h>
22 #include <linux/iio/iio.h>
23 #include <linux/iio/sysfs.h>
25 #include <asm/unaligned.h>
27 #define MODE_PWRDWN_1k 0x1
28 #define MODE_PWRDWN_100k 0x2
29 #define MODE_PWRDWN_TRISTATE 0x3
31 /**
32 * struct ad5446_state - driver instance specific data
33 * @dev: this device
34 * @chip_info: chip model specific constants, available modes etc
35 * @reg: supply regulator
36 * @vref_mv: actual reference voltage used
37 * @cached_val: store/retrieve values during power down
38 * @pwr_down_mode: power down mode (1k, 100k or tristate)
39 * @pwr_down: true if the device is in power down
40 * @lock: lock to protect the data buffer during write ops
43 struct ad5446_state {
44 struct device *dev;
45 const struct ad5446_chip_info *chip_info;
46 struct regulator *reg;
47 unsigned short vref_mv;
48 unsigned cached_val;
49 unsigned pwr_down_mode;
50 unsigned pwr_down;
51 struct mutex lock;
54 /**
55 * struct ad5446_chip_info - chip specific information
56 * @channel: channel spec for the DAC
57 * @int_vref_mv: AD5620/40/60: the internal reference voltage
58 * @write: chip specific helper function to write to the register
61 struct ad5446_chip_info {
62 struct iio_chan_spec channel;
63 u16 int_vref_mv;
64 int (*write)(struct ad5446_state *st, unsigned val);
67 static const char * const ad5446_powerdown_modes[] = {
68 "1kohm_to_gnd", "100kohm_to_gnd", "three_state"
71 static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev,
72 const struct iio_chan_spec *chan, unsigned int mode)
74 struct ad5446_state *st = iio_priv(indio_dev);
76 st->pwr_down_mode = mode + 1;
78 return 0;
81 static int ad5446_get_powerdown_mode(struct iio_dev *indio_dev,
82 const struct iio_chan_spec *chan)
84 struct ad5446_state *st = iio_priv(indio_dev);
86 return st->pwr_down_mode - 1;
89 static const struct iio_enum ad5446_powerdown_mode_enum = {
90 .items = ad5446_powerdown_modes,
91 .num_items = ARRAY_SIZE(ad5446_powerdown_modes),
92 .get = ad5446_get_powerdown_mode,
93 .set = ad5446_set_powerdown_mode,
96 static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev,
97 uintptr_t private,
98 const struct iio_chan_spec *chan,
99 char *buf)
101 struct ad5446_state *st = iio_priv(indio_dev);
103 return sprintf(buf, "%d\n", st->pwr_down);
106 static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
107 uintptr_t private,
108 const struct iio_chan_spec *chan,
109 const char *buf, size_t len)
111 struct ad5446_state *st = iio_priv(indio_dev);
112 unsigned int shift;
113 unsigned int val;
114 bool powerdown;
115 int ret;
117 ret = strtobool(buf, &powerdown);
118 if (ret)
119 return ret;
121 mutex_lock(&st->lock);
122 st->pwr_down = powerdown;
124 if (st->pwr_down) {
125 shift = chan->scan_type.realbits + chan->scan_type.shift;
126 val = st->pwr_down_mode << shift;
127 } else {
128 val = st->cached_val;
131 ret = st->chip_info->write(st, val);
132 mutex_unlock(&st->lock);
134 return ret ? ret : len;
137 static const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[] = {
139 .name = "powerdown",
140 .read = ad5446_read_dac_powerdown,
141 .write = ad5446_write_dac_powerdown,
142 .shared = IIO_SEPARATE,
144 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5446_powerdown_mode_enum),
145 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5446_powerdown_mode_enum),
146 { },
149 #define _AD5446_CHANNEL(bits, storage, _shift, ext) { \
150 .type = IIO_VOLTAGE, \
151 .indexed = 1, \
152 .output = 1, \
153 .channel = 0, \
154 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
155 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
156 .scan_type = { \
157 .sign = 'u', \
158 .realbits = (bits), \
159 .storagebits = (storage), \
160 .shift = (_shift), \
161 }, \
162 .ext_info = (ext), \
165 #define AD5446_CHANNEL(bits, storage, shift) \
166 _AD5446_CHANNEL(bits, storage, shift, NULL)
168 #define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
169 _AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)
171 static int ad5446_read_raw(struct iio_dev *indio_dev,
172 struct iio_chan_spec const *chan,
173 int *val,
174 int *val2,
175 long m)
177 struct ad5446_state *st = iio_priv(indio_dev);
179 switch (m) {
180 case IIO_CHAN_INFO_RAW:
181 *val = st->cached_val;
182 return IIO_VAL_INT;
183 case IIO_CHAN_INFO_SCALE:
184 *val = st->vref_mv;
185 *val2 = chan->scan_type.realbits;
186 return IIO_VAL_FRACTIONAL_LOG2;
188 return -EINVAL;
191 static int ad5446_write_raw(struct iio_dev *indio_dev,
192 struct iio_chan_spec const *chan,
193 int val,
194 int val2,
195 long mask)
197 struct ad5446_state *st = iio_priv(indio_dev);
198 int ret = 0;
200 switch (mask) {
201 case IIO_CHAN_INFO_RAW:
202 if (val >= (1 << chan->scan_type.realbits) || val < 0)
203 return -EINVAL;
205 val <<= chan->scan_type.shift;
206 mutex_lock(&st->lock);
207 st->cached_val = val;
208 if (!st->pwr_down)
209 ret = st->chip_info->write(st, val);
210 mutex_unlock(&st->lock);
211 break;
212 default:
213 ret = -EINVAL;
216 return ret;
219 static const struct iio_info ad5446_info = {
220 .read_raw = ad5446_read_raw,
221 .write_raw = ad5446_write_raw,
224 static int ad5446_probe(struct device *dev, const char *name,
225 const struct ad5446_chip_info *chip_info)
227 struct ad5446_state *st;
228 struct iio_dev *indio_dev;
229 struct regulator *reg;
230 int ret, voltage_uv = 0;
232 reg = devm_regulator_get(dev, "vcc");
233 if (!IS_ERR(reg)) {
234 ret = regulator_enable(reg);
235 if (ret)
236 return ret;
238 ret = regulator_get_voltage(reg);
239 if (ret < 0)
240 goto error_disable_reg;
242 voltage_uv = ret;
245 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
246 if (indio_dev == NULL) {
247 ret = -ENOMEM;
248 goto error_disable_reg;
250 st = iio_priv(indio_dev);
251 st->chip_info = chip_info;
253 dev_set_drvdata(dev, indio_dev);
254 st->reg = reg;
255 st->dev = dev;
257 indio_dev->name = name;
258 indio_dev->info = &ad5446_info;
259 indio_dev->modes = INDIO_DIRECT_MODE;
260 indio_dev->channels = &st->chip_info->channel;
261 indio_dev->num_channels = 1;
263 mutex_init(&st->lock);
265 st->pwr_down_mode = MODE_PWRDWN_1k;
267 if (st->chip_info->int_vref_mv)
268 st->vref_mv = st->chip_info->int_vref_mv;
269 else if (voltage_uv)
270 st->vref_mv = voltage_uv / 1000;
271 else
272 dev_warn(dev, "reference voltage unspecified\n");
274 ret = iio_device_register(indio_dev);
275 if (ret)
276 goto error_disable_reg;
278 return 0;
280 error_disable_reg:
281 if (!IS_ERR(reg))
282 regulator_disable(reg);
283 return ret;
286 static int ad5446_remove(struct device *dev)
288 struct iio_dev *indio_dev = dev_get_drvdata(dev);
289 struct ad5446_state *st = iio_priv(indio_dev);
291 iio_device_unregister(indio_dev);
292 if (!IS_ERR(st->reg))
293 regulator_disable(st->reg);
295 return 0;
298 #if IS_ENABLED(CONFIG_SPI_MASTER)
300 static int ad5446_write(struct ad5446_state *st, unsigned val)
302 struct spi_device *spi = to_spi_device(st->dev);
303 __be16 data = cpu_to_be16(val);
305 return spi_write(spi, &data, sizeof(data));
308 static int ad5660_write(struct ad5446_state *st, unsigned val)
310 struct spi_device *spi = to_spi_device(st->dev);
311 uint8_t data[3];
313 put_unaligned_be24(val, &data[0]);
315 return spi_write(spi, data, sizeof(data));
319 * ad5446_supported_spi_device_ids:
320 * The AD5620/40/60 parts are available in different fixed internal reference
321 * voltage options. The actual part numbers may look differently
322 * (and a bit cryptic), however this style is used to make clear which
323 * parts are supported here.
325 enum ad5446_supported_spi_device_ids {
326 ID_AD5300,
327 ID_AD5310,
328 ID_AD5320,
329 ID_AD5444,
330 ID_AD5446,
331 ID_AD5450,
332 ID_AD5451,
333 ID_AD5541A,
334 ID_AD5512A,
335 ID_AD5553,
336 ID_AD5600,
337 ID_AD5601,
338 ID_AD5611,
339 ID_AD5621,
340 ID_AD5641,
341 ID_AD5620_2500,
342 ID_AD5620_1250,
343 ID_AD5640_2500,
344 ID_AD5640_1250,
345 ID_AD5660_2500,
346 ID_AD5660_1250,
347 ID_AD5662,
350 static const struct ad5446_chip_info ad5446_spi_chip_info[] = {
351 [ID_AD5300] = {
352 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
353 .write = ad5446_write,
355 [ID_AD5310] = {
356 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
357 .write = ad5446_write,
359 [ID_AD5320] = {
360 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
361 .write = ad5446_write,
363 [ID_AD5444] = {
364 .channel = AD5446_CHANNEL(12, 16, 2),
365 .write = ad5446_write,
367 [ID_AD5446] = {
368 .channel = AD5446_CHANNEL(14, 16, 0),
369 .write = ad5446_write,
371 [ID_AD5450] = {
372 .channel = AD5446_CHANNEL(8, 16, 6),
373 .write = ad5446_write,
375 [ID_AD5451] = {
376 .channel = AD5446_CHANNEL(10, 16, 4),
377 .write = ad5446_write,
379 [ID_AD5541A] = {
380 .channel = AD5446_CHANNEL(16, 16, 0),
381 .write = ad5446_write,
383 [ID_AD5512A] = {
384 .channel = AD5446_CHANNEL(12, 16, 4),
385 .write = ad5446_write,
387 [ID_AD5553] = {
388 .channel = AD5446_CHANNEL(14, 16, 0),
389 .write = ad5446_write,
391 [ID_AD5600] = {
392 .channel = AD5446_CHANNEL(16, 16, 0),
393 .write = ad5446_write,
395 [ID_AD5601] = {
396 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
397 .write = ad5446_write,
399 [ID_AD5611] = {
400 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
401 .write = ad5446_write,
403 [ID_AD5621] = {
404 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
405 .write = ad5446_write,
407 [ID_AD5641] = {
408 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
409 .write = ad5446_write,
411 [ID_AD5620_2500] = {
412 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
413 .int_vref_mv = 2500,
414 .write = ad5446_write,
416 [ID_AD5620_1250] = {
417 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
418 .int_vref_mv = 1250,
419 .write = ad5446_write,
421 [ID_AD5640_2500] = {
422 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
423 .int_vref_mv = 2500,
424 .write = ad5446_write,
426 [ID_AD5640_1250] = {
427 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
428 .int_vref_mv = 1250,
429 .write = ad5446_write,
431 [ID_AD5660_2500] = {
432 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
433 .int_vref_mv = 2500,
434 .write = ad5660_write,
436 [ID_AD5660_1250] = {
437 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
438 .int_vref_mv = 1250,
439 .write = ad5660_write,
441 [ID_AD5662] = {
442 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
443 .write = ad5660_write,
447 static const struct spi_device_id ad5446_spi_ids[] = {
448 {"ad5300", ID_AD5300},
449 {"ad5310", ID_AD5310},
450 {"ad5320", ID_AD5320},
451 {"ad5444", ID_AD5444},
452 {"ad5446", ID_AD5446},
453 {"ad5450", ID_AD5450},
454 {"ad5451", ID_AD5451},
455 {"ad5452", ID_AD5444}, /* ad5452 is compatible to the ad5444 */
456 {"ad5453", ID_AD5446}, /* ad5453 is compatible to the ad5446 */
457 {"ad5512a", ID_AD5512A},
458 {"ad5541a", ID_AD5541A},
459 {"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */
460 {"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */
461 {"ad5553", ID_AD5553},
462 {"ad5600", ID_AD5600},
463 {"ad5601", ID_AD5601},
464 {"ad5611", ID_AD5611},
465 {"ad5621", ID_AD5621},
466 {"ad5641", ID_AD5641},
467 {"ad5620-2500", ID_AD5620_2500}, /* AD5620/40/60: */
468 {"ad5620-1250", ID_AD5620_1250}, /* part numbers may look differently */
469 {"ad5640-2500", ID_AD5640_2500},
470 {"ad5640-1250", ID_AD5640_1250},
471 {"ad5660-2500", ID_AD5660_2500},
472 {"ad5660-1250", ID_AD5660_1250},
473 {"ad5662", ID_AD5662},
474 {"dac081s101", ID_AD5300}, /* compatible Texas Instruments chips */
475 {"dac101s101", ID_AD5310},
476 {"dac121s101", ID_AD5320},
477 {"dac7512", ID_AD5320},
480 MODULE_DEVICE_TABLE(spi, ad5446_spi_ids);
482 static const struct of_device_id ad5446_of_ids[] = {
483 { .compatible = "ti,dac7512" },
486 MODULE_DEVICE_TABLE(of, ad5446_of_ids);
488 static int ad5446_spi_probe(struct spi_device *spi)
490 const struct spi_device_id *id = spi_get_device_id(spi);
492 return ad5446_probe(&spi->dev, id->name,
493 &ad5446_spi_chip_info[id->driver_data]);
496 static int ad5446_spi_remove(struct spi_device *spi)
498 return ad5446_remove(&spi->dev);
501 static struct spi_driver ad5446_spi_driver = {
502 .driver = {
503 .name = "ad5446",
504 .of_match_table = ad5446_of_ids,
506 .probe = ad5446_spi_probe,
507 .remove = ad5446_spi_remove,
508 .id_table = ad5446_spi_ids,
511 static int __init ad5446_spi_register_driver(void)
513 return spi_register_driver(&ad5446_spi_driver);
516 static void ad5446_spi_unregister_driver(void)
518 spi_unregister_driver(&ad5446_spi_driver);
521 #else
523 static inline int ad5446_spi_register_driver(void) { return 0; }
524 static inline void ad5446_spi_unregister_driver(void) { }
526 #endif
528 #if IS_ENABLED(CONFIG_I2C)
530 static int ad5622_write(struct ad5446_state *st, unsigned val)
532 struct i2c_client *client = to_i2c_client(st->dev);
533 __be16 data = cpu_to_be16(val);
535 return i2c_master_send(client, (char *)&data, sizeof(data));
539 * ad5446_supported_i2c_device_ids:
540 * The AD5620/40/60 parts are available in different fixed internal reference
541 * voltage options. The actual part numbers may look differently
542 * (and a bit cryptic), however this style is used to make clear which
543 * parts are supported here.
545 enum ad5446_supported_i2c_device_ids {
546 ID_AD5602,
547 ID_AD5612,
548 ID_AD5622,
551 static const struct ad5446_chip_info ad5446_i2c_chip_info[] = {
552 [ID_AD5602] = {
553 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
554 .write = ad5622_write,
556 [ID_AD5612] = {
557 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
558 .write = ad5622_write,
560 [ID_AD5622] = {
561 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
562 .write = ad5622_write,
566 static int ad5446_i2c_probe(struct i2c_client *i2c,
567 const struct i2c_device_id *id)
569 return ad5446_probe(&i2c->dev, id->name,
570 &ad5446_i2c_chip_info[id->driver_data]);
573 static int ad5446_i2c_remove(struct i2c_client *i2c)
575 return ad5446_remove(&i2c->dev);
578 static const struct i2c_device_id ad5446_i2c_ids[] = {
579 {"ad5301", ID_AD5602},
580 {"ad5311", ID_AD5612},
581 {"ad5321", ID_AD5622},
582 {"ad5602", ID_AD5602},
583 {"ad5612", ID_AD5612},
584 {"ad5622", ID_AD5622},
587 MODULE_DEVICE_TABLE(i2c, ad5446_i2c_ids);
589 static struct i2c_driver ad5446_i2c_driver = {
590 .driver = {
591 .name = "ad5446",
593 .probe = ad5446_i2c_probe,
594 .remove = ad5446_i2c_remove,
595 .id_table = ad5446_i2c_ids,
598 static int __init ad5446_i2c_register_driver(void)
600 return i2c_add_driver(&ad5446_i2c_driver);
603 static void __exit ad5446_i2c_unregister_driver(void)
605 i2c_del_driver(&ad5446_i2c_driver);
608 #else
610 static inline int ad5446_i2c_register_driver(void) { return 0; }
611 static inline void ad5446_i2c_unregister_driver(void) { }
613 #endif
615 static int __init ad5446_init(void)
617 int ret;
619 ret = ad5446_spi_register_driver();
620 if (ret)
621 return ret;
623 ret = ad5446_i2c_register_driver();
624 if (ret) {
625 ad5446_spi_unregister_driver();
626 return ret;
629 return 0;
631 module_init(ad5446_init);
633 static void __exit ad5446_exit(void)
635 ad5446_i2c_unregister_driver();
636 ad5446_spi_unregister_driver();
638 module_exit(ad5446_exit);
640 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
641 MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC");
642 MODULE_LICENSE("GPL v2");