1 // SPDX-License-Identifier: GPL-2.0
3 * PNI RM3100 3-axis geomagnetic sensor driver core.
5 * Copyright (C) 2018 Song Qiang <songqiang1304521@gmail.com>
7 * User Manual available at
8 * <https://www.pnicorp.com/download/rm3100-user-manual/>
10 * TODO: event generation, pm.
13 #include <linux/delay.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/slab.h>
18 #include <linux/iio/buffer.h>
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
21 #include <linux/iio/trigger.h>
22 #include <linux/iio/triggered_buffer.h>
23 #include <linux/iio/trigger_consumer.h>
25 #include <asm/unaligned.h>
29 /* Cycle Count Registers. */
30 #define RM3100_REG_CC_X 0x05
31 #define RM3100_REG_CC_Y 0x07
32 #define RM3100_REG_CC_Z 0x09
34 /* Poll Measurement Mode register. */
35 #define RM3100_REG_POLL 0x00
36 #define RM3100_POLL_X BIT(4)
37 #define RM3100_POLL_Y BIT(5)
38 #define RM3100_POLL_Z BIT(6)
40 /* Continuous Measurement Mode register. */
41 #define RM3100_REG_CMM 0x01
42 #define RM3100_CMM_START BIT(0)
43 #define RM3100_CMM_X BIT(4)
44 #define RM3100_CMM_Y BIT(5)
45 #define RM3100_CMM_Z BIT(6)
47 /* TiMe Rate Configuration register. */
48 #define RM3100_REG_TMRC 0x0B
49 #define RM3100_TMRC_OFFSET 0x92
51 /* Result Status register. */
52 #define RM3100_REG_STATUS 0x34
53 #define RM3100_STATUS_DRDY BIT(7)
55 /* Measurement result registers. */
56 #define RM3100_REG_MX2 0x24
57 #define RM3100_REG_MY2 0x27
58 #define RM3100_REG_MZ2 0x2a
60 #define RM3100_W_REG_START RM3100_REG_POLL
61 #define RM3100_W_REG_END RM3100_REG_TMRC
62 #define RM3100_R_REG_START RM3100_REG_POLL
63 #define RM3100_R_REG_END RM3100_REG_STATUS
64 #define RM3100_V_REG_START RM3100_REG_POLL
65 #define RM3100_V_REG_END RM3100_REG_STATUS
68 * This is computed by hand, is the sum of channel storage bits and padding
69 * bits, which is 4+4+4+12=24 in here.
71 #define RM3100_SCAN_BYTES 24
73 #define RM3100_CMM_AXIS_SHIFT 4
76 struct regmap
*regmap
;
77 struct completion measuring_done
;
81 u8 buffer
[RM3100_SCAN_BYTES
];
82 struct iio_trigger
*drdy_trig
;
85 * This lock is for protecting the consistency of series of i2c
86 * operations, that is, to make sure a measurement process will
87 * not be interrupted by a set frequency operation, which should
88 * be taken where a series of i2c operation starts, released where
94 static const struct regmap_range rm3100_readable_ranges
[] = {
95 regmap_reg_range(RM3100_R_REG_START
, RM3100_R_REG_END
),
98 const struct regmap_access_table rm3100_readable_table
= {
99 .yes_ranges
= rm3100_readable_ranges
,
100 .n_yes_ranges
= ARRAY_SIZE(rm3100_readable_ranges
),
102 EXPORT_SYMBOL_GPL(rm3100_readable_table
);
104 static const struct regmap_range rm3100_writable_ranges
[] = {
105 regmap_reg_range(RM3100_W_REG_START
, RM3100_W_REG_END
),
108 const struct regmap_access_table rm3100_writable_table
= {
109 .yes_ranges
= rm3100_writable_ranges
,
110 .n_yes_ranges
= ARRAY_SIZE(rm3100_writable_ranges
),
112 EXPORT_SYMBOL_GPL(rm3100_writable_table
);
114 static const struct regmap_range rm3100_volatile_ranges
[] = {
115 regmap_reg_range(RM3100_V_REG_START
, RM3100_V_REG_END
),
118 const struct regmap_access_table rm3100_volatile_table
= {
119 .yes_ranges
= rm3100_volatile_ranges
,
120 .n_yes_ranges
= ARRAY_SIZE(rm3100_volatile_ranges
),
122 EXPORT_SYMBOL_GPL(rm3100_volatile_table
);
124 static irqreturn_t
rm3100_thread_fn(int irq
, void *d
)
126 struct iio_dev
*indio_dev
= d
;
127 struct rm3100_data
*data
= iio_priv(indio_dev
);
130 * Write operation to any register or read operation
131 * to first byte of results will clear the interrupt.
133 regmap_write(data
->regmap
, RM3100_REG_POLL
, 0);
138 static irqreturn_t
rm3100_irq_handler(int irq
, void *d
)
140 struct iio_dev
*indio_dev
= d
;
141 struct rm3100_data
*data
= iio_priv(indio_dev
);
143 switch (indio_dev
->currentmode
) {
144 case INDIO_DIRECT_MODE
:
145 complete(&data
->measuring_done
);
147 case INDIO_BUFFER_TRIGGERED
:
148 iio_trigger_poll(data
->drdy_trig
);
151 dev_err(indio_dev
->dev
.parent
,
152 "device mode out of control, current mode: %d",
153 indio_dev
->currentmode
);
156 return IRQ_WAKE_THREAD
;
159 static int rm3100_wait_measurement(struct rm3100_data
*data
)
161 struct regmap
*regmap
= data
->regmap
;
167 * A read cycle of 400kbits i2c bus is about 20us, plus the time
168 * used for scheduling, a read cycle of fast mode of this device
169 * can reach 1.7ms, it may be possible for data to arrive just
170 * after we check the RM3100_REG_STATUS. In this case, irq_handler is
171 * called before measuring_done is reinitialized, it will wait
172 * forever for data that has already been ready.
173 * Reinitialize measuring_done before looking up makes sure we
174 * will always capture interrupt no matter when it happens.
176 if (data
->use_interrupt
)
177 reinit_completion(&data
->measuring_done
);
179 ret
= regmap_read(regmap
, RM3100_REG_STATUS
, &val
);
183 if ((val
& RM3100_STATUS_DRDY
) != RM3100_STATUS_DRDY
) {
184 if (data
->use_interrupt
) {
185 ret
= wait_for_completion_timeout(&data
->measuring_done
,
186 msecs_to_jiffies(data
->conversion_time
));
191 usleep_range(1000, 5000);
193 ret
= regmap_read(regmap
, RM3100_REG_STATUS
,
198 if (val
& RM3100_STATUS_DRDY
)
208 static int rm3100_read_mag(struct rm3100_data
*data
, int idx
, int *val
)
210 struct regmap
*regmap
= data
->regmap
;
214 mutex_lock(&data
->lock
);
215 ret
= regmap_write(regmap
, RM3100_REG_POLL
, BIT(4 + idx
));
219 ret
= rm3100_wait_measurement(data
);
223 ret
= regmap_bulk_read(regmap
, RM3100_REG_MX2
+ 3 * idx
, buffer
, 3);
226 mutex_unlock(&data
->lock
);
228 *val
= sign_extend32(get_unaligned_be24(&buffer
[0]), 23);
233 mutex_unlock(&data
->lock
);
237 #define RM3100_CHANNEL(axis, idx) \
241 .channel2 = IIO_MOD_##axis, \
242 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
243 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
244 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
251 .endianness = IIO_BE, \
255 static const struct iio_chan_spec rm3100_channels
[] = {
256 RM3100_CHANNEL(X
, 0),
257 RM3100_CHANNEL(Y
, 1),
258 RM3100_CHANNEL(Z
, 2),
259 IIO_CHAN_SOFT_TIMESTAMP(3),
262 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
263 "600 300 150 75 37 18 9 4.5 2.3 1.2 0.6 0.3 0.015 0.075"
266 static struct attribute
*rm3100_attributes
[] = {
267 &iio_const_attr_sampling_frequency_available
.dev_attr
.attr
,
271 static const struct attribute_group rm3100_attribute_group
= {
272 .attrs
= rm3100_attributes
,
275 #define RM3100_SAMP_NUM 14
278 * Frequency : rm3100_samp_rates[][0].rm3100_samp_rates[][1]Hz.
279 * Time between reading: rm3100_sam_rates[][2]ms.
280 * The first one is actually 1.7ms.
282 static const int rm3100_samp_rates
[RM3100_SAMP_NUM
][3] = {
283 {600, 0, 2}, {300, 0, 3}, {150, 0, 7}, {75, 0, 13}, {37, 0, 27},
284 {18, 0, 55}, {9, 0, 110}, {4, 500000, 220}, {2, 300000, 440},
285 {1, 200000, 800}, {0, 600000, 1600}, {0, 300000, 3300},
286 {0, 15000, 6700}, {0, 75000, 13000}
289 static int rm3100_get_samp_freq(struct rm3100_data
*data
, int *val
, int *val2
)
294 mutex_lock(&data
->lock
);
295 ret
= regmap_read(data
->regmap
, RM3100_REG_TMRC
, &tmp
);
296 mutex_unlock(&data
->lock
);
299 *val
= rm3100_samp_rates
[tmp
- RM3100_TMRC_OFFSET
][0];
300 *val2
= rm3100_samp_rates
[tmp
- RM3100_TMRC_OFFSET
][1];
302 return IIO_VAL_INT_PLUS_MICRO
;
305 static int rm3100_set_cycle_count(struct rm3100_data
*data
, int val
)
310 for (i
= 0; i
< 3; i
++) {
311 ret
= regmap_write(data
->regmap
, RM3100_REG_CC_X
+ 2 * i
, val
);
317 * The scale of this sensor depends on the cycle count value, these
318 * three values are corresponding to the cycle count value 50, 100,
319 * 200. scale = output / gain * 10^4.
330 * This function will never be called by users' code, so here we
331 * assume that it will never get a wrong parameter.
340 static int rm3100_set_samp_freq(struct iio_dev
*indio_dev
, int val
, int val2
)
342 struct rm3100_data
*data
= iio_priv(indio_dev
);
343 struct regmap
*regmap
= data
->regmap
;
344 unsigned int cycle_count
;
348 mutex_lock(&data
->lock
);
349 /* All cycle count registers use the same value. */
350 ret
= regmap_read(regmap
, RM3100_REG_CC_X
, &cycle_count
);
354 for (i
= 0; i
< RM3100_SAMP_NUM
; i
++) {
355 if (val
== rm3100_samp_rates
[i
][0] &&
356 val2
== rm3100_samp_rates
[i
][1])
359 if (i
== RM3100_SAMP_NUM
) {
364 ret
= regmap_write(regmap
, RM3100_REG_TMRC
, i
+ RM3100_TMRC_OFFSET
);
368 /* Checking if cycle count registers need changing. */
369 if (val
== 600 && cycle_count
== 200) {
370 ret
= rm3100_set_cycle_count(data
, 100);
373 } else if (val
!= 600 && cycle_count
== 100) {
374 ret
= rm3100_set_cycle_count(data
, 200);
379 if (indio_dev
->currentmode
== INDIO_BUFFER_TRIGGERED
) {
380 /* Writing TMRC registers requires CMM reset. */
381 ret
= regmap_write(regmap
, RM3100_REG_CMM
, 0);
384 ret
= regmap_write(data
->regmap
, RM3100_REG_CMM
,
385 (*indio_dev
->active_scan_mask
& 0x7) <<
386 RM3100_CMM_AXIS_SHIFT
| RM3100_CMM_START
);
390 mutex_unlock(&data
->lock
);
392 data
->conversion_time
= rm3100_samp_rates
[i
][2] * 2;
396 mutex_unlock(&data
->lock
);
400 static int rm3100_read_raw(struct iio_dev
*indio_dev
,
401 const struct iio_chan_spec
*chan
,
402 int *val
, int *val2
, long mask
)
404 struct rm3100_data
*data
= iio_priv(indio_dev
);
408 case IIO_CHAN_INFO_RAW
:
409 ret
= iio_device_claim_direct_mode(indio_dev
);
413 ret
= rm3100_read_mag(data
, chan
->scan_index
, val
);
414 iio_device_release_direct_mode(indio_dev
);
417 case IIO_CHAN_INFO_SCALE
:
421 return IIO_VAL_INT_PLUS_MICRO
;
422 case IIO_CHAN_INFO_SAMP_FREQ
:
423 return rm3100_get_samp_freq(data
, val
, val2
);
429 static int rm3100_write_raw(struct iio_dev
*indio_dev
,
430 struct iio_chan_spec
const *chan
,
431 int val
, int val2
, long mask
)
434 case IIO_CHAN_INFO_SAMP_FREQ
:
435 return rm3100_set_samp_freq(indio_dev
, val
, val2
);
441 static const struct iio_info rm3100_info
= {
442 .attrs
= &rm3100_attribute_group
,
443 .read_raw
= rm3100_read_raw
,
444 .write_raw
= rm3100_write_raw
,
447 static int rm3100_buffer_preenable(struct iio_dev
*indio_dev
)
449 struct rm3100_data
*data
= iio_priv(indio_dev
);
451 /* Starting channels enabled. */
452 return regmap_write(data
->regmap
, RM3100_REG_CMM
,
453 (*indio_dev
->active_scan_mask
& 0x7) << RM3100_CMM_AXIS_SHIFT
|
457 static int rm3100_buffer_postdisable(struct iio_dev
*indio_dev
)
459 struct rm3100_data
*data
= iio_priv(indio_dev
);
461 return regmap_write(data
->regmap
, RM3100_REG_CMM
, 0);
464 static const struct iio_buffer_setup_ops rm3100_buffer_ops
= {
465 .preenable
= rm3100_buffer_preenable
,
466 .postdisable
= rm3100_buffer_postdisable
,
469 static irqreturn_t
rm3100_trigger_handler(int irq
, void *p
)
471 struct iio_poll_func
*pf
= p
;
472 struct iio_dev
*indio_dev
= pf
->indio_dev
;
473 unsigned long scan_mask
= *indio_dev
->active_scan_mask
;
474 unsigned int mask_len
= indio_dev
->masklength
;
475 struct rm3100_data
*data
= iio_priv(indio_dev
);
476 struct regmap
*regmap
= data
->regmap
;
479 mutex_lock(&data
->lock
);
481 case BIT(0) | BIT(1) | BIT(2):
482 ret
= regmap_bulk_read(regmap
, RM3100_REG_MX2
, data
->buffer
, 9);
483 mutex_unlock(&data
->lock
);
486 /* Convert XXXYYYZZZxxx to XXXxYYYxZZZx. x for paddings. */
487 for (i
= 2; i
> 0; i
--)
488 memmove(data
->buffer
+ i
* 4, data
->buffer
+ i
* 3, 3);
490 case BIT(0) | BIT(1):
491 ret
= regmap_bulk_read(regmap
, RM3100_REG_MX2
, data
->buffer
, 6);
492 mutex_unlock(&data
->lock
);
495 memmove(data
->buffer
+ 4, data
->buffer
+ 3, 3);
497 case BIT(1) | BIT(2):
498 ret
= regmap_bulk_read(regmap
, RM3100_REG_MY2
, data
->buffer
, 6);
499 mutex_unlock(&data
->lock
);
502 memmove(data
->buffer
+ 4, data
->buffer
+ 3, 3);
504 case BIT(0) | BIT(2):
505 ret
= regmap_bulk_read(regmap
, RM3100_REG_MX2
, data
->buffer
, 9);
506 mutex_unlock(&data
->lock
);
509 memmove(data
->buffer
+ 4, data
->buffer
+ 6, 3);
512 for_each_set_bit(bit
, &scan_mask
, mask_len
) {
513 ret
= regmap_bulk_read(regmap
, RM3100_REG_MX2
+ 3 * bit
,
516 mutex_unlock(&data
->lock
);
520 mutex_unlock(&data
->lock
);
523 * Always using the same buffer so that we wouldn't need to set the
524 * paddings to 0 in case of leaking any data.
526 iio_push_to_buffers_with_timestamp(indio_dev
, data
->buffer
,
529 iio_trigger_notify_done(indio_dev
->trig
);
534 int rm3100_common_probe(struct device
*dev
, struct regmap
*regmap
, int irq
)
536 struct iio_dev
*indio_dev
;
537 struct rm3100_data
*data
;
541 indio_dev
= devm_iio_device_alloc(dev
, sizeof(*data
));
545 data
= iio_priv(indio_dev
);
546 data
->regmap
= regmap
;
548 mutex_init(&data
->lock
);
550 indio_dev
->name
= "rm3100";
551 indio_dev
->info
= &rm3100_info
;
552 indio_dev
->channels
= rm3100_channels
;
553 indio_dev
->num_channels
= ARRAY_SIZE(rm3100_channels
);
554 indio_dev
->modes
= INDIO_DIRECT_MODE
| INDIO_BUFFER_TRIGGERED
;
555 indio_dev
->currentmode
= INDIO_DIRECT_MODE
;
558 data
->use_interrupt
= false;
560 data
->use_interrupt
= true;
562 init_completion(&data
->measuring_done
);
563 ret
= devm_request_threaded_irq(dev
,
572 dev_err(dev
, "request irq line failed.\n");
576 data
->drdy_trig
= devm_iio_trigger_alloc(dev
, "%s-drdy%d",
579 if (!data
->drdy_trig
)
582 data
->drdy_trig
->dev
.parent
= dev
;
583 ret
= devm_iio_trigger_register(dev
, data
->drdy_trig
);
588 ret
= devm_iio_triggered_buffer_setup(dev
, indio_dev
,
589 &iio_pollfunc_store_time
,
590 rm3100_trigger_handler
,
595 ret
= regmap_read(regmap
, RM3100_REG_TMRC
, &tmp
);
598 /* Initializing max wait time, which is double conversion time. */
599 data
->conversion_time
= rm3100_samp_rates
[tmp
- RM3100_TMRC_OFFSET
][2]
602 /* Cycle count values may not be what we want. */
603 if ((tmp
- RM3100_TMRC_OFFSET
) == 0)
604 rm3100_set_cycle_count(data
, 100);
606 rm3100_set_cycle_count(data
, 200);
608 return devm_iio_device_register(dev
, indio_dev
);
610 EXPORT_SYMBOL_GPL(rm3100_common_probe
);
612 MODULE_AUTHOR("Song Qiang <songqiang1304521@gmail.com>");
613 MODULE_DESCRIPTION("PNI RM3100 3-axis magnetometer i2c driver");
614 MODULE_LICENSE("GPL v2");