WIP FPC-III support
[linux/fpc-iii.git] / drivers / iio / resolver / ad2s90.c
blobd6a91f137e134b0214b55222f5962e857537d19b
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ad2s90.c simple support for the ADI Resolver to Digital Converters: AD2S90
5 * Copyright (c) 2010-2010 Analog Devices Inc.
6 */
7 #include <linux/types.h>
8 #include <linux/mutex.h>
9 #include <linux/device.h>
10 #include <linux/spi/spi.h>
11 #include <linux/slab.h>
12 #include <linux/sysfs.h>
13 #include <linux/module.h>
15 #include <linux/iio/iio.h>
16 #include <linux/iio/sysfs.h>
19 * Although chip's max frequency is 2Mhz, it needs 600ns between CS and the
20 * first falling edge of SCLK, so frequency should be at most 1 / (2 * 6e-7)
22 #define AD2S90_MAX_SPI_FREQ_HZ 830000
24 struct ad2s90_state {
25 struct mutex lock; /* lock to protect rx buffer */
26 struct spi_device *sdev;
27 u8 rx[2] ____cacheline_aligned;
30 static int ad2s90_read_raw(struct iio_dev *indio_dev,
31 struct iio_chan_spec const *chan,
32 int *val,
33 int *val2,
34 long m)
36 int ret;
37 struct ad2s90_state *st = iio_priv(indio_dev);
39 if (chan->type != IIO_ANGL)
40 return -EINVAL;
42 switch (m) {
43 case IIO_CHAN_INFO_SCALE:
44 /* 2 * Pi / 2^12 */
45 *val = 6283; /* mV */
46 *val2 = 12;
47 return IIO_VAL_FRACTIONAL_LOG2;
48 case IIO_CHAN_INFO_RAW:
49 mutex_lock(&st->lock);
50 ret = spi_read(st->sdev, st->rx, 2);
51 if (ret < 0) {
52 mutex_unlock(&st->lock);
53 return ret;
55 *val = (((u16)(st->rx[0])) << 4) | ((st->rx[1] & 0xF0) >> 4);
57 mutex_unlock(&st->lock);
59 return IIO_VAL_INT;
60 default:
61 break;
64 return -EINVAL;
67 static const struct iio_info ad2s90_info = {
68 .read_raw = ad2s90_read_raw,
71 static const struct iio_chan_spec ad2s90_chan = {
72 .type = IIO_ANGL,
73 .indexed = 1,
74 .channel = 0,
75 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
78 static int ad2s90_probe(struct spi_device *spi)
80 struct iio_dev *indio_dev;
81 struct ad2s90_state *st;
83 if (spi->max_speed_hz > AD2S90_MAX_SPI_FREQ_HZ) {
84 dev_err(&spi->dev, "SPI CLK, %d Hz exceeds %d Hz\n",
85 spi->max_speed_hz, AD2S90_MAX_SPI_FREQ_HZ);
86 return -EINVAL;
89 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
90 if (!indio_dev)
91 return -ENOMEM;
92 st = iio_priv(indio_dev);
93 spi_set_drvdata(spi, indio_dev);
95 mutex_init(&st->lock);
96 st->sdev = spi;
97 indio_dev->info = &ad2s90_info;
98 indio_dev->modes = INDIO_DIRECT_MODE;
99 indio_dev->channels = &ad2s90_chan;
100 indio_dev->num_channels = 1;
101 indio_dev->name = spi_get_device_id(spi)->name;
103 return devm_iio_device_register(indio_dev->dev.parent, indio_dev);
106 static const struct of_device_id ad2s90_of_match[] = {
107 { .compatible = "adi,ad2s90", },
110 MODULE_DEVICE_TABLE(of, ad2s90_of_match);
112 static const struct spi_device_id ad2s90_id[] = {
113 { "ad2s90" },
116 MODULE_DEVICE_TABLE(spi, ad2s90_id);
118 static struct spi_driver ad2s90_driver = {
119 .driver = {
120 .name = "ad2s90",
121 .of_match_table = ad2s90_of_match,
123 .probe = ad2s90_probe,
124 .id_table = ad2s90_id,
126 module_spi_driver(ad2s90_driver);
128 MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>");
129 MODULE_DESCRIPTION("Analog Devices AD2S90 Resolver to Digital SPI driver");
130 MODULE_LICENSE("GPL v2");