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WIP FPC-III support
[linux/fpc-iii.git] / drivers / infiniband / hw / bnxt_re / main.c
blobfdb8c247825855eeb03143923bd9de83e8704b66
1 /*
2 * Broadcom NetXtreme-E RoCE driver.
3 *
4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
5 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
6 *
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * BSD license below:
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 *
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 *
36 * Description: Main component of the bnxt_re driver
37 */
38
39 #include <linux/module.h>
40 #include <linux/netdevice.h>
41 #include <linux/ethtool.h>
42 #include <linux/mutex.h>
43 #include <linux/list.h>
44 #include <linux/rculist.h>
45 #include <linux/spinlock.h>
46 #include <linux/pci.h>
47 #include <net/dcbnl.h>
48 #include <net/ipv6.h>
49 #include <net/addrconf.h>
50 #include <linux/if_ether.h>
51
52 #include <rdma/ib_verbs.h>
53 #include <rdma/ib_user_verbs.h>
54 #include <rdma/ib_umem.h>
55 #include <rdma/ib_addr.h>
56
57 #include "bnxt_ulp.h"
58 #include "roce_hsi.h"
59 #include "qplib_res.h"
60 #include "qplib_sp.h"
61 #include "qplib_fp.h"
62 #include "qplib_rcfw.h"
63 #include "bnxt_re.h"
64 #include "ib_verbs.h"
65 #include <rdma/bnxt_re-abi.h>
66 #include "bnxt.h"
67 #include "hw_counters.h"
68
69 static char version[] =
70 BNXT_RE_DESC "\n";
71
72 MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>");
73 MODULE_DESCRIPTION(BNXT_RE_DESC " Driver");
74 MODULE_LICENSE("Dual BSD/GPL");
75
76 /* globals */
77 static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list);
78 /* Mutex to protect the list of bnxt_re devices added */
79 static DEFINE_MUTEX(bnxt_re_dev_lock);
80 static struct workqueue_struct *bnxt_re_wq;
81 static void bnxt_re_remove_device(struct bnxt_re_dev *rdev);
82 static void bnxt_re_dealloc_driver(struct ib_device *ib_dev);
83 static void bnxt_re_stop_irq(void *handle);
84
85 static void bnxt_re_set_drv_mode(struct bnxt_re_dev *rdev, u8 mode)
86 {
87 struct bnxt_qplib_chip_ctx *cctx;
88
89 cctx = rdev->chip_ctx;
90 cctx->modes.wqe_mode = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
91 mode : BNXT_QPLIB_WQE_MODE_STATIC;
92 }
93
94 static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev)
95 {
96 struct bnxt_qplib_chip_ctx *chip_ctx;
97
98 if (!rdev->chip_ctx)
99 return;
100 chip_ctx = rdev->chip_ctx;
101 rdev->chip_ctx = NULL;
102 rdev->rcfw.res = NULL;
103 rdev->qplib_res.cctx = NULL;
104 rdev->qplib_res.pdev = NULL;
105 rdev->qplib_res.netdev = NULL;
106 kfree(chip_ctx);
107 }
108
109 static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev, u8 wqe_mode)
110 {
111 struct bnxt_qplib_chip_ctx *chip_ctx;
112 struct bnxt_en_dev *en_dev;
113 struct bnxt *bp;
114
115 en_dev = rdev->en_dev;
116 bp = netdev_priv(en_dev->net);
117
118 chip_ctx = kzalloc(sizeof(*chip_ctx), GFP_KERNEL);
119 if (!chip_ctx)
120 return -ENOMEM;
121 chip_ctx->chip_num = bp->chip_num;
122
123 rdev->chip_ctx = chip_ctx;
124 /* rest members to follow eventually */
125
126 rdev->qplib_res.cctx = rdev->chip_ctx;
127 rdev->rcfw.res = &rdev->qplib_res;
128
129 bnxt_re_set_drv_mode(rdev, wqe_mode);
130 return 0;
131 }
132
133 /* SR-IOV helper functions */
134
135 static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev)
136 {
137 struct bnxt *bp;
138
139 bp = netdev_priv(rdev->en_dev->net);
140 if (BNXT_VF(bp))
141 rdev->is_virtfn = 1;
142 }
143
144 /* Set the maximum number of each resource that the driver actually wants
145 * to allocate. This may be up to the maximum number the firmware has
146 * reserved for the function. The driver may choose to allocate fewer
147 * resources than the firmware maximum.
148 */
149 static void bnxt_re_limit_pf_res(struct bnxt_re_dev *rdev)
150 {
151 struct bnxt_qplib_dev_attr *attr;
152 struct bnxt_qplib_ctx *ctx;
153 int i;
154
155 attr = &rdev->dev_attr;
156 ctx = &rdev->qplib_ctx;
157
158 ctx->qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT,
159 attr->max_qp);
160 ctx->mrw_count = BNXT_RE_MAX_MRW_COUNT_256K;
161 /* Use max_mr from fw since max_mrw does not get set */
162 ctx->mrw_count = min_t(u32, ctx->mrw_count, attr->max_mr);
163 ctx->srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT,
164 attr->max_srq);
165 ctx->cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT, attr->max_cq);
166 if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx))
167 for (i = 0; i < MAX_TQM_ALLOC_REQ; i++)
168 rdev->qplib_ctx.tqm_ctx.qcount[i] =
169 rdev->dev_attr.tqm_alloc_reqs[i];
170 }
171
172 static void bnxt_re_limit_vf_res(struct bnxt_qplib_ctx *qplib_ctx, u32 num_vf)
173 {
174 struct bnxt_qplib_vf_res *vf_res;
175 u32 mrws = 0;
176 u32 vf_pct;
177 u32 nvfs;
178
179 vf_res = &qplib_ctx->vf_res;
180 /*
181 * Reserve a set of resources for the PF. Divide the remaining
182 * resources among the VFs
183 */
184 vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF;
185 nvfs = num_vf;
186 num_vf = 100 * num_vf;
187 vf_res->max_qp_per_vf = (qplib_ctx->qpc_count * vf_pct) / num_vf;
188 vf_res->max_srq_per_vf = (qplib_ctx->srqc_count * vf_pct) / num_vf;
189 vf_res->max_cq_per_vf = (qplib_ctx->cq_count * vf_pct) / num_vf;
190 /*
191 * The driver allows many more MRs than other resources. If the
192 * firmware does also, then reserve a fixed amount for the PF and
193 * divide the rest among VFs. VFs may use many MRs for NFS
194 * mounts, ISER, NVME applications, etc. If the firmware severely
195 * restricts the number of MRs, then let PF have half and divide
196 * the rest among VFs, as for the other resource types.
197 */
198 if (qplib_ctx->mrw_count < BNXT_RE_MAX_MRW_COUNT_64K) {
199 mrws = qplib_ctx->mrw_count * vf_pct;
200 nvfs = num_vf;
201 } else {
202 mrws = qplib_ctx->mrw_count - BNXT_RE_RESVD_MR_FOR_PF;
203 }
204 vf_res->max_mrw_per_vf = (mrws / nvfs);
205 vf_res->max_gid_per_vf = BNXT_RE_MAX_GID_PER_VF;
206 }
207
208 static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev)
209 {
210 u32 num_vfs;
211
212 memset(&rdev->qplib_ctx.vf_res, 0, sizeof(struct bnxt_qplib_vf_res));
213 bnxt_re_limit_pf_res(rdev);
214
215 num_vfs = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
216 BNXT_RE_GEN_P5_MAX_VF : rdev->num_vfs;
217 if (num_vfs)
218 bnxt_re_limit_vf_res(&rdev->qplib_ctx, num_vfs);
219 }
220
221 /* for handling bnxt_en callbacks later */
222 static void bnxt_re_stop(void *p)
223 {
224 }
225
226 static void bnxt_re_start(void *p)
227 {
228 }
229
230 static void bnxt_re_sriov_config(void *p, int num_vfs)
231 {
232 struct bnxt_re_dev *rdev = p;
233
234 if (!rdev)
235 return;
236
237 rdev->num_vfs = num_vfs;
238 if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) {
239 bnxt_re_set_resource_limits(rdev);
240 bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw,
241 &rdev->qplib_ctx);
242 }
243 }
244
245 static void bnxt_re_shutdown(void *p)
246 {
247 struct bnxt_re_dev *rdev = p;
248
249 if (!rdev)
250 return;
251 ASSERT_RTNL();
252 /* Release the MSIx vectors before queuing unregister */
253 bnxt_re_stop_irq(rdev);
254 ib_unregister_device_queued(&rdev->ibdev);
255 }
256
257 static void bnxt_re_stop_irq(void *handle)
258 {
259 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
260 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
261 struct bnxt_qplib_nq *nq;
262 int indx;
263
264 for (indx = BNXT_RE_NQ_IDX; indx < rdev->num_msix; indx++) {
265 nq = &rdev->nq[indx - 1];
266 bnxt_qplib_nq_stop_irq(nq, false);
267 }
268
269 bnxt_qplib_rcfw_stop_irq(rcfw, false);
270 }
271
272 static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent)
273 {
274 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
275 struct bnxt_msix_entry *msix_ent = rdev->msix_entries;
276 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
277 struct bnxt_qplib_nq *nq;
278 int indx, rc;
279
280 if (!ent) {
281 /* Not setting the f/w timeout bit in rcfw.
282 * During the driver unload the first command
283 * to f/w will timeout and that will set the
284 * timeout bit.
285 */
286 ibdev_err(&rdev->ibdev, "Failed to re-start IRQs\n");
287 return;
288 }
289
290 /* Vectors may change after restart, so update with new vectors
291 * in device sctructure.
292 */
293 for (indx = 0; indx < rdev->num_msix; indx++)
294 rdev->msix_entries[indx].vector = ent[indx].vector;
295
296 bnxt_qplib_rcfw_start_irq(rcfw, msix_ent[BNXT_RE_AEQ_IDX].vector,
297 false);
298 for (indx = BNXT_RE_NQ_IDX ; indx < rdev->num_msix; indx++) {
299 nq = &rdev->nq[indx - 1];
300 rc = bnxt_qplib_nq_start_irq(nq, indx - 1,
301 msix_ent[indx].vector, false);
302 if (rc)
303 ibdev_warn(&rdev->ibdev, "Failed to reinit NQ index %d\n",
304 indx - 1);
305 }
306 }
307
308 static struct bnxt_ulp_ops bnxt_re_ulp_ops = {
309 .ulp_async_notifier = NULL,
310 .ulp_stop = bnxt_re_stop,
311 .ulp_start = bnxt_re_start,
312 .ulp_sriov_config = bnxt_re_sriov_config,
313 .ulp_shutdown = bnxt_re_shutdown,
314 .ulp_irq_stop = bnxt_re_stop_irq,
315 .ulp_irq_restart = bnxt_re_start_irq
316 };
317
318 /* RoCE -> Net driver */
319
320 /* Driver registration routines used to let the networking driver (bnxt_en)
321 * to know that the RoCE driver is now installed
322 */
323 static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev)
324 {
325 struct bnxt_en_dev *en_dev;
326 int rc;
327
328 if (!rdev)
329 return -EINVAL;
330
331 en_dev = rdev->en_dev;
332
333 rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev,
334 BNXT_ROCE_ULP);
335 return rc;
336 }
337
338 static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev)
339 {
340 struct bnxt_en_dev *en_dev;
341 int rc = 0;
342
343 if (!rdev)
344 return -EINVAL;
345
346 en_dev = rdev->en_dev;
347
348 rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP,
349 &bnxt_re_ulp_ops, rdev);
350 rdev->qplib_res.pdev = rdev->en_dev->pdev;
351 return rc;
352 }
353
354 static int bnxt_re_free_msix(struct bnxt_re_dev *rdev)
355 {
356 struct bnxt_en_dev *en_dev;
357 int rc;
358
359 if (!rdev)
360 return -EINVAL;
361
362 en_dev = rdev->en_dev;
363
364
365 rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP);
366
367 return rc;
368 }
369
370 static int bnxt_re_request_msix(struct bnxt_re_dev *rdev)
371 {
372 int rc = 0, num_msix_want = BNXT_RE_MAX_MSIX, num_msix_got;
373 struct bnxt_en_dev *en_dev;
374
375 if (!rdev)
376 return -EINVAL;
377
378 en_dev = rdev->en_dev;
379
380 num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus());
381
382 num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP,
383 rdev->msix_entries,
384 num_msix_want);
385 if (num_msix_got < BNXT_RE_MIN_MSIX) {
386 rc = -EINVAL;
387 goto done;
388 }
389 if (num_msix_got != num_msix_want) {
390 ibdev_warn(&rdev->ibdev,
391 "Requested %d MSI-X vectors, got %d\n",
392 num_msix_want, num_msix_got);
393 }
394 rdev->num_msix = num_msix_got;
395 done:
396 return rc;
397 }
398
399 static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr,
400 u16 opcd, u16 crid, u16 trid)
401 {
402 hdr->req_type = cpu_to_le16(opcd);
403 hdr->cmpl_ring = cpu_to_le16(crid);
404 hdr->target_id = cpu_to_le16(trid);
405 }
406
407 static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg,
408 int msg_len, void *resp, int resp_max_len,
409 int timeout)
410 {
411 fw_msg->msg = msg;
412 fw_msg->msg_len = msg_len;
413 fw_msg->resp = resp;
414 fw_msg->resp_max_len = resp_max_len;
415 fw_msg->timeout = timeout;
416 }
417
418 static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev,
419 u16 fw_ring_id, int type)
420 {
421 struct bnxt_en_dev *en_dev = rdev->en_dev;
422 struct hwrm_ring_free_input req = {0};
423 struct hwrm_ring_free_output resp;
424 struct bnxt_fw_msg fw_msg;
425 int rc = -EINVAL;
426
427 if (!en_dev)
428 return rc;
429
430 memset(&fw_msg, 0, sizeof(fw_msg));
431
432 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1);
433 req.ring_type = type;
434 req.ring_id = cpu_to_le16(fw_ring_id);
435 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
436 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
437 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
438 if (rc)
439 ibdev_err(&rdev->ibdev, "Failed to free HW ring:%d :%#x",
440 req.ring_id, rc);
441 return rc;
442 }
443
444 static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev,
445 struct bnxt_re_ring_attr *ring_attr,
446 u16 *fw_ring_id)
447 {
448 struct bnxt_en_dev *en_dev = rdev->en_dev;
449 struct hwrm_ring_alloc_input req = {0};
450 struct hwrm_ring_alloc_output resp;
451 struct bnxt_fw_msg fw_msg;
452 int rc = -EINVAL;
453
454 if (!en_dev)
455 return rc;
456
457 memset(&fw_msg, 0, sizeof(fw_msg));
458 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1);
459 req.enables = 0;
460 req.page_tbl_addr = cpu_to_le64(ring_attr->dma_arr[0]);
461 if (ring_attr->pages > 1) {
462 /* Page size is in log2 units */
463 req.page_size = BNXT_PAGE_SHIFT;
464 req.page_tbl_depth = 1;
465 }
466 req.fbo = 0;
467 /* Association of ring index with doorbell index and MSIX number */
468 req.logical_id = cpu_to_le16(ring_attr->lrid);
469 req.length = cpu_to_le32(ring_attr->depth + 1);
470 req.ring_type = ring_attr->type;
471 req.int_mode = ring_attr->mode;
472 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
473 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
474 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
475 if (!rc)
476 *fw_ring_id = le16_to_cpu(resp.ring_id);
477
478 return rc;
479 }
480
481 static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev,
482 u32 fw_stats_ctx_id)
483 {
484 struct bnxt_en_dev *en_dev = rdev->en_dev;
485 struct hwrm_stat_ctx_free_input req = {0};
486 struct bnxt_fw_msg fw_msg;
487 int rc = -EINVAL;
488
489 if (!en_dev)
490 return rc;
491
492 memset(&fw_msg, 0, sizeof(fw_msg));
493
494 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1);
495 req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id);
496 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&req,
497 sizeof(req), DFLT_HWRM_CMD_TIMEOUT);
498 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
499 if (rc)
500 ibdev_err(&rdev->ibdev, "Failed to free HW stats context %#x",
501 rc);
502
503 return rc;
504 }
505
506 static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev,
507 dma_addr_t dma_map,
508 u32 *fw_stats_ctx_id)
509 {
510 struct hwrm_stat_ctx_alloc_output resp = {0};
511 struct hwrm_stat_ctx_alloc_input req = {0};
512 struct bnxt_en_dev *en_dev = rdev->en_dev;
513 struct bnxt_fw_msg fw_msg;
514 int rc = -EINVAL;
515
516 *fw_stats_ctx_id = INVALID_STATS_CTX_ID;
517
518 if (!en_dev)
519 return rc;
520
521 memset(&fw_msg, 0, sizeof(fw_msg));
522
523 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1);
524 req.update_period_ms = cpu_to_le32(1000);
525 req.stats_dma_addr = cpu_to_le64(dma_map);
526 req.stats_dma_length = cpu_to_le16(sizeof(struct ctx_hw_stats_ext));
527 req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE;
528 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
529 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
530 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
531 if (!rc)
532 *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id);
533
534 return rc;
535 }
536
537 /* Device */
538
539 static bool is_bnxt_re_dev(struct net_device *netdev)
540 {
541 struct ethtool_drvinfo drvinfo;
542
543 if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) {
544 memset(&drvinfo, 0, sizeof(drvinfo));
545 netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo);
546
547 if (strcmp(drvinfo.driver, "bnxt_en"))
548 return false;
549 return true;
550 }
551 return false;
552 }
553
554 static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev)
555 {
556 struct ib_device *ibdev =
557 ib_device_get_by_netdev(netdev, RDMA_DRIVER_BNXT_RE);
558 if (!ibdev)
559 return NULL;
560
561 return container_of(ibdev, struct bnxt_re_dev, ibdev);
562 }
563
564 static void bnxt_re_dev_unprobe(struct net_device *netdev,
565 struct bnxt_en_dev *en_dev)
566 {
567 dev_put(netdev);
568 module_put(en_dev->pdev->driver->driver.owner);
569 }
570
571 static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev)
572 {
573 struct bnxt *bp = netdev_priv(netdev);
574 struct bnxt_en_dev *en_dev;
575 struct pci_dev *pdev;
576
577 /* Call bnxt_en's RoCE probe via indirect API */
578 if (!bp->ulp_probe)
579 return ERR_PTR(-EINVAL);
580
581 en_dev = bp->ulp_probe(netdev);
582 if (IS_ERR(en_dev))
583 return en_dev;
584
585 pdev = en_dev->pdev;
586 if (!pdev)
587 return ERR_PTR(-EINVAL);
588
589 if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) {
590 dev_info(&pdev->dev,
591 "%s: probe error: RoCE is not supported on this device",
592 ROCE_DRV_MODULE_NAME);
593 return ERR_PTR(-ENODEV);
594 }
595
596 /* Bump net device reference count */
597 if (!try_module_get(pdev->driver->driver.owner))
598 return ERR_PTR(-ENODEV);
599
600 dev_hold(netdev);
601
602 return en_dev;
603 }
604
605 static ssize_t hw_rev_show(struct device *device, struct device_attribute *attr,
606 char *buf)
607 {
608 struct bnxt_re_dev *rdev =
609 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
610
611 return sysfs_emit(buf, "0x%x\n", rdev->en_dev->pdev->vendor);
612 }
613 static DEVICE_ATTR_RO(hw_rev);
614
615 static ssize_t hca_type_show(struct device *device,
616 struct device_attribute *attr, char *buf)
617 {
618 struct bnxt_re_dev *rdev =
619 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
620
621 return sysfs_emit(buf, "%s\n", rdev->ibdev.node_desc);
622 }
623 static DEVICE_ATTR_RO(hca_type);
624
625 static struct attribute *bnxt_re_attributes[] = {
626 &dev_attr_hw_rev.attr,
627 &dev_attr_hca_type.attr,
628 NULL
629 };
630
631 static const struct attribute_group bnxt_re_dev_attr_group = {
632 .attrs = bnxt_re_attributes,
633 };
634
635 static const struct ib_device_ops bnxt_re_dev_ops = {
636 .owner = THIS_MODULE,
637 .driver_id = RDMA_DRIVER_BNXT_RE,
638 .uverbs_abi_ver = BNXT_RE_ABI_VERSION,
639
640 .add_gid = bnxt_re_add_gid,
641 .alloc_hw_stats = bnxt_re_ib_alloc_hw_stats,
642 .alloc_mr = bnxt_re_alloc_mr,
643 .alloc_pd = bnxt_re_alloc_pd,
644 .alloc_ucontext = bnxt_re_alloc_ucontext,
645 .create_ah = bnxt_re_create_ah,
646 .create_cq = bnxt_re_create_cq,
647 .create_qp = bnxt_re_create_qp,
648 .create_srq = bnxt_re_create_srq,
649 .create_user_ah = bnxt_re_create_ah,
650 .dealloc_driver = bnxt_re_dealloc_driver,
651 .dealloc_pd = bnxt_re_dealloc_pd,
652 .dealloc_ucontext = bnxt_re_dealloc_ucontext,
653 .del_gid = bnxt_re_del_gid,
654 .dereg_mr = bnxt_re_dereg_mr,
655 .destroy_ah = bnxt_re_destroy_ah,
656 .destroy_cq = bnxt_re_destroy_cq,
657 .destroy_qp = bnxt_re_destroy_qp,
658 .destroy_srq = bnxt_re_destroy_srq,
659 .get_dev_fw_str = bnxt_re_query_fw_str,
660 .get_dma_mr = bnxt_re_get_dma_mr,
661 .get_hw_stats = bnxt_re_ib_get_hw_stats,
662 .get_link_layer = bnxt_re_get_link_layer,
663 .get_port_immutable = bnxt_re_get_port_immutable,
664 .map_mr_sg = bnxt_re_map_mr_sg,
665 .mmap = bnxt_re_mmap,
666 .modify_ah = bnxt_re_modify_ah,
667 .modify_qp = bnxt_re_modify_qp,
668 .modify_srq = bnxt_re_modify_srq,
669 .poll_cq = bnxt_re_poll_cq,
670 .post_recv = bnxt_re_post_recv,
671 .post_send = bnxt_re_post_send,
672 .post_srq_recv = bnxt_re_post_srq_recv,
673 .query_ah = bnxt_re_query_ah,
674 .query_device = bnxt_re_query_device,
675 .query_pkey = bnxt_re_query_pkey,
676 .query_port = bnxt_re_query_port,
677 .query_qp = bnxt_re_query_qp,
678 .query_srq = bnxt_re_query_srq,
679 .reg_user_mr = bnxt_re_reg_user_mr,
680 .req_notify_cq = bnxt_re_req_notify_cq,
681 INIT_RDMA_OBJ_SIZE(ib_ah, bnxt_re_ah, ib_ah),
682 INIT_RDMA_OBJ_SIZE(ib_cq, bnxt_re_cq, ib_cq),
683 INIT_RDMA_OBJ_SIZE(ib_pd, bnxt_re_pd, ib_pd),
684 INIT_RDMA_OBJ_SIZE(ib_srq, bnxt_re_srq, ib_srq),
685 INIT_RDMA_OBJ_SIZE(ib_ucontext, bnxt_re_ucontext, ib_uctx),
686 };
687
688 static int bnxt_re_register_ib(struct bnxt_re_dev *rdev)
689 {
690 struct ib_device *ibdev = &rdev->ibdev;
691 int ret;
692
693 /* ib device init */
694 ibdev->node_type = RDMA_NODE_IB_CA;
695 strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA",
696 strlen(BNXT_RE_DESC) + 5);
697 ibdev->phys_port_cnt = 1;
698
699 bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid);
700
701 ibdev->num_comp_vectors = rdev->num_msix - 1;
702 ibdev->dev.parent = &rdev->en_dev->pdev->dev;
703 ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY;
704
705 rdma_set_device_sysfs_group(ibdev, &bnxt_re_dev_attr_group);
706 ib_set_device_ops(ibdev, &bnxt_re_dev_ops);
707 ret = ib_device_set_netdev(&rdev->ibdev, rdev->netdev, 1);
708 if (ret)
709 return ret;
710
711 dma_set_max_seg_size(&rdev->en_dev->pdev->dev, UINT_MAX);
712 return ib_register_device(ibdev, "bnxt_re%d", &rdev->en_dev->pdev->dev);
713 }
714
715 static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev)
716 {
717 dev_put(rdev->netdev);
718 rdev->netdev = NULL;
719 mutex_lock(&bnxt_re_dev_lock);
720 list_del_rcu(&rdev->list);
721 mutex_unlock(&bnxt_re_dev_lock);
722
723 synchronize_rcu();
724 }
725
726 static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev,
727 struct bnxt_en_dev *en_dev)
728 {
729 struct bnxt_re_dev *rdev;
730
731 /* Allocate bnxt_re_dev instance here */
732 rdev = ib_alloc_device(bnxt_re_dev, ibdev);
733 if (!rdev) {
734 ibdev_err(NULL, "%s: bnxt_re_dev allocation failure!",
735 ROCE_DRV_MODULE_NAME);
736 return NULL;
737 }
738 /* Default values */
739 rdev->netdev = netdev;
740 dev_hold(rdev->netdev);
741 rdev->en_dev = en_dev;
742 rdev->id = rdev->en_dev->pdev->devfn;
743 INIT_LIST_HEAD(&rdev->qp_list);
744 mutex_init(&rdev->qp_lock);
745 atomic_set(&rdev->qp_count, 0);
746 atomic_set(&rdev->cq_count, 0);
747 atomic_set(&rdev->srq_count, 0);
748 atomic_set(&rdev->mr_count, 0);
749 atomic_set(&rdev->mw_count, 0);
750 rdev->cosq[0] = 0xFFFF;
751 rdev->cosq[1] = 0xFFFF;
752
753 mutex_lock(&bnxt_re_dev_lock);
754 list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list);
755 mutex_unlock(&bnxt_re_dev_lock);
756 return rdev;
757 }
758
759 static int bnxt_re_handle_unaffi_async_event(struct creq_func_event
760 *unaffi_async)
761 {
762 switch (unaffi_async->event) {
763 case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR:
764 break;
765 case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR:
766 break;
767 case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR:
768 break;
769 case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR:
770 break;
771 case CREQ_FUNC_EVENT_EVENT_CQ_ERROR:
772 break;
773 case CREQ_FUNC_EVENT_EVENT_TQM_ERROR:
774 break;
775 case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR:
776 break;
777 case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR:
778 break;
779 case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR:
780 break;
781 case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR:
782 break;
783 case CREQ_FUNC_EVENT_EVENT_TIM_ERROR:
784 break;
785 default:
786 return -EINVAL;
787 }
788 return 0;
789 }
790
791 static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event,
792 struct bnxt_re_qp *qp)
793 {
794 struct ib_event event;
795 unsigned int flags;
796
797 if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR &&
798 rdma_is_kernel_res(&qp->ib_qp.res)) {
799 flags = bnxt_re_lock_cqs(qp);
800 bnxt_qplib_add_flush_qp(&qp->qplib_qp);
801 bnxt_re_unlock_cqs(qp, flags);
802 }
803
804 memset(&event, 0, sizeof(event));
805 if (qp->qplib_qp.srq) {
806 event.device = &qp->rdev->ibdev;
807 event.element.qp = &qp->ib_qp;
808 event.event = IB_EVENT_QP_LAST_WQE_REACHED;
809 }
810
811 if (event.device && qp->ib_qp.event_handler)
812 qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context);
813
814 return 0;
815 }
816
817 static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async,
818 void *obj)
819 {
820 int rc = 0;
821 u8 event;
822
823 if (!obj)
824 return rc; /* QP was already dead, still return success */
825
826 event = affi_async->event;
827 if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) {
828 struct bnxt_qplib_qp *lib_qp = obj;
829 struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp,
830 qplib_qp);
831 rc = bnxt_re_handle_qp_async_event(affi_async, qp);
832 }
833 return rc;
834 }
835
836 static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw,
837 void *aeqe, void *obj)
838 {
839 struct creq_qp_event *affi_async;
840 struct creq_func_event *unaffi_async;
841 u8 type;
842 int rc;
843
844 type = ((struct creq_base *)aeqe)->type;
845 if (type == CREQ_BASE_TYPE_FUNC_EVENT) {
846 unaffi_async = aeqe;
847 rc = bnxt_re_handle_unaffi_async_event(unaffi_async);
848 } else {
849 affi_async = aeqe;
850 rc = bnxt_re_handle_affi_async_event(affi_async, obj);
851 }
852
853 return rc;
854 }
855
856 static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq,
857 struct bnxt_qplib_srq *handle, u8 event)
858 {
859 struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq,
860 qplib_srq);
861 struct ib_event ib_event;
862 int rc = 0;
863
864 if (!srq) {
865 ibdev_err(NULL, "%s: SRQ is NULL, SRQN not handled",
866 ROCE_DRV_MODULE_NAME);
867 rc = -EINVAL;
868 goto done;
869 }
870 ib_event.device = &srq->rdev->ibdev;
871 ib_event.element.srq = &srq->ib_srq;
872 if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT)
873 ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED;
874 else
875 ib_event.event = IB_EVENT_SRQ_ERR;
876
877 if (srq->ib_srq.event_handler) {
878 /* Lock event_handler? */
879 (*srq->ib_srq.event_handler)(&ib_event,
880 srq->ib_srq.srq_context);
881 }
882 done:
883 return rc;
884 }
885
886 static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq,
887 struct bnxt_qplib_cq *handle)
888 {
889 struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq,
890 qplib_cq);
891
892 if (!cq) {
893 ibdev_err(NULL, "%s: CQ is NULL, CQN not handled",
894 ROCE_DRV_MODULE_NAME);
895 return -EINVAL;
896 }
897 if (cq->ib_cq.comp_handler) {
898 /* Lock comp_handler? */
899 (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context);
900 }
901
902 return 0;
903 }
904
905 #define BNXT_RE_GEN_P5_PF_NQ_DB 0x10000
906 #define BNXT_RE_GEN_P5_VF_NQ_DB 0x4000
907 static u32 bnxt_re_get_nqdb_offset(struct bnxt_re_dev *rdev, u16 indx)
908 {
909 return bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ?
910 (rdev->is_virtfn ? BNXT_RE_GEN_P5_VF_NQ_DB :
911 BNXT_RE_GEN_P5_PF_NQ_DB) :
912 rdev->msix_entries[indx].db_offset;
913 }
914
915 static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev)
916 {
917 int i;
918
919 for (i = 1; i < rdev->num_msix; i++)
920 bnxt_qplib_disable_nq(&rdev->nq[i - 1]);
921
922 if (rdev->qplib_res.rcfw)
923 bnxt_qplib_cleanup_res(&rdev->qplib_res);
924 }
925
926 static int bnxt_re_init_res(struct bnxt_re_dev *rdev)
927 {
928 int num_vec_enabled = 0;
929 int rc = 0, i;
930 u32 db_offt;
931
932 bnxt_qplib_init_res(&rdev->qplib_res);
933
934 for (i = 1; i < rdev->num_msix ; i++) {
935 db_offt = bnxt_re_get_nqdb_offset(rdev, i);
936 rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1],
937 i - 1, rdev->msix_entries[i].vector,
938 db_offt, &bnxt_re_cqn_handler,
939 &bnxt_re_srqn_handler);
940 if (rc) {
941 ibdev_err(&rdev->ibdev,
942 "Failed to enable NQ with rc = 0x%x", rc);
943 goto fail;
944 }
945 num_vec_enabled++;
946 }
947 return 0;
948 fail:
949 for (i = num_vec_enabled; i >= 0; i--)
950 bnxt_qplib_disable_nq(&rdev->nq[i]);
951 return rc;
952 }
953
954 static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev)
955 {
956 u8 type;
957 int i;
958
959 for (i = 0; i < rdev->num_msix - 1; i++) {
960 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
961 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
962 bnxt_qplib_free_nq(&rdev->nq[i]);
963 rdev->nq[i].res = NULL;
964 }
965 }
966
967 static void bnxt_re_free_res(struct bnxt_re_dev *rdev)
968 {
969 bnxt_re_free_nq_res(rdev);
970
971 if (rdev->qplib_res.dpi_tbl.max) {
972 bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
973 &rdev->qplib_res.dpi_tbl,
974 &rdev->dpi_privileged);
975 }
976 if (rdev->qplib_res.rcfw) {
977 bnxt_qplib_free_res(&rdev->qplib_res);
978 rdev->qplib_res.rcfw = NULL;
979 }
980 }
981
982 static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
983 {
984 struct bnxt_re_ring_attr rattr = {};
985 int num_vec_created = 0;
986 int rc = 0, i;
987 u8 type;
988
989 /* Configure and allocate resources for qplib */
990 rdev->qplib_res.rcfw = &rdev->rcfw;
991 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
992 rdev->is_virtfn);
993 if (rc)
994 goto fail;
995
996 rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev,
997 rdev->netdev, &rdev->dev_attr);
998 if (rc)
999 goto fail;
1000
1001 rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl,
1002 &rdev->dpi_privileged,
1003 rdev);
1004 if (rc)
1005 goto dealloc_res;
1006
1007 for (i = 0; i < rdev->num_msix - 1; i++) {
1008 struct bnxt_qplib_nq *nq;
1009
1010 nq = &rdev->nq[i];
1011 nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT;
1012 rc = bnxt_qplib_alloc_nq(&rdev->qplib_res, &rdev->nq[i]);
1013 if (rc) {
1014 ibdev_err(&rdev->ibdev, "Alloc Failed NQ%d rc:%#x",
1015 i, rc);
1016 goto free_nq;
1017 }
1018 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1019 rattr.dma_arr = nq->hwq.pbl[PBL_LVL_0].pg_map_arr;
1020 rattr.pages = nq->hwq.pbl[rdev->nq[i].hwq.level].pg_count;
1021 rattr.type = type;
1022 rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX;
1023 rattr.depth = BNXT_QPLIB_NQE_MAX_CNT - 1;
1024 rattr.lrid = rdev->msix_entries[i + 1].ring_idx;
1025 rc = bnxt_re_net_ring_alloc(rdev, &rattr, &nq->ring_id);
1026 if (rc) {
1027 ibdev_err(&rdev->ibdev,
1028 "Failed to allocate NQ fw id with rc = 0x%x",
1029 rc);
1030 bnxt_qplib_free_nq(&rdev->nq[i]);
1031 goto free_nq;
1032 }
1033 num_vec_created++;
1034 }
1035 return 0;
1036 free_nq:
1037 for (i = num_vec_created - 1; i >= 0; i--) {
1038 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1039 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
1040 bnxt_qplib_free_nq(&rdev->nq[i]);
1041 }
1042 bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
1043 &rdev->qplib_res.dpi_tbl,
1044 &rdev->dpi_privileged);
1045 dealloc_res:
1046 bnxt_qplib_free_res(&rdev->qplib_res);
1047
1048 fail:
1049 rdev->qplib_res.rcfw = NULL;
1050 return rc;
1051 }
1052
1053 static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp,
1054 u8 port_num, enum ib_event_type event)
1055 {
1056 struct ib_event ib_event;
1057
1058 ib_event.device = ibdev;
1059 if (qp) {
1060 ib_event.element.qp = qp;
1061 ib_event.event = event;
1062 if (qp->event_handler)
1063 qp->event_handler(&ib_event, qp->qp_context);
1064
1065 } else {
1066 ib_event.element.port_num = port_num;
1067 ib_event.event = event;
1068 ib_dispatch_event(&ib_event);
1069 }
1070 }
1071
1072 #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02
1073 static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir,
1074 u64 *cid_map)
1075 {
1076 struct hwrm_queue_pri2cos_qcfg_input req = {0};
1077 struct bnxt *bp = netdev_priv(rdev->netdev);
1078 struct hwrm_queue_pri2cos_qcfg_output resp;
1079 struct bnxt_en_dev *en_dev = rdev->en_dev;
1080 struct bnxt_fw_msg fw_msg;
1081 u32 flags = 0;
1082 u8 *qcfgmap, *tmp_map;
1083 int rc = 0, i;
1084
1085 if (!cid_map)
1086 return -EINVAL;
1087
1088 memset(&fw_msg, 0, sizeof(fw_msg));
1089 bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
1090 HWRM_QUEUE_PRI2COS_QCFG, -1, -1);
1091 flags |= (dir & 0x01);
1092 flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN;
1093 req.flags = cpu_to_le32(flags);
1094 req.port_id = bp->pf.port_id;
1095
1096 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
1097 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
1098 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
1099 if (rc)
1100 return rc;
1101
1102 if (resp.queue_cfg_info) {
1103 ibdev_warn(&rdev->ibdev,
1104 "Asymmetric cos queue configuration detected");
1105 ibdev_warn(&rdev->ibdev,
1106 " on device, QoS may not be fully functional\n");
1107 }
1108 qcfgmap = &resp.pri0_cos_queue_id;
1109 tmp_map = (u8 *)cid_map;
1110 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1111 tmp_map[i] = qcfgmap[i];
1112
1113 return rc;
1114 }
1115
1116 static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev,
1117 struct bnxt_re_qp *qp)
1118 {
1119 return (qp->ib_qp.qp_type == IB_QPT_GSI) ||
1120 (qp == rdev->gsi_ctx.gsi_sqp);
1121 }
1122
1123 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev)
1124 {
1125 int mask = IB_QP_STATE;
1126 struct ib_qp_attr qp_attr;
1127 struct bnxt_re_qp *qp;
1128
1129 qp_attr.qp_state = IB_QPS_ERR;
1130 mutex_lock(&rdev->qp_lock);
1131 list_for_each_entry(qp, &rdev->qp_list, list) {
1132 /* Modify the state of all QPs except QP1/Shadow QP */
1133 if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) {
1134 if (qp->qplib_qp.state !=
1135 CMDQ_MODIFY_QP_NEW_STATE_RESET &&
1136 qp->qplib_qp.state !=
1137 CMDQ_MODIFY_QP_NEW_STATE_ERR) {
1138 bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp,
1139 1, IB_EVENT_QP_FATAL);
1140 bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask,
1141 NULL);
1142 }
1143 }
1144 }
1145 mutex_unlock(&rdev->qp_lock);
1146 }
1147
1148 static int bnxt_re_update_gid(struct bnxt_re_dev *rdev)
1149 {
1150 struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl;
1151 struct bnxt_qplib_gid gid;
1152 u16 gid_idx, index;
1153 int rc = 0;
1154
1155 if (!ib_device_try_get(&rdev->ibdev))
1156 return 0;
1157
1158 if (!sgid_tbl) {
1159 ibdev_err(&rdev->ibdev, "QPLIB: SGID table not allocated");
1160 rc = -EINVAL;
1161 goto out;
1162 }
1163
1164 for (index = 0; index < sgid_tbl->active; index++) {
1165 gid_idx = sgid_tbl->hw_id[index];
1166
1167 if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero,
1168 sizeof(bnxt_qplib_gid_zero)))
1169 continue;
1170 /* need to modify the VLAN enable setting of non VLAN GID only
1171 * as setting is done for VLAN GID while adding GID
1172 */
1173 if (sgid_tbl->vlan[index])
1174 continue;
1175
1176 memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid));
1177
1178 rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx,
1179 rdev->qplib_res.netdev->dev_addr);
1180 }
1181 out:
1182 ib_device_put(&rdev->ibdev);
1183 return rc;
1184 }
1185
1186 static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev)
1187 {
1188 u32 prio_map = 0, tmp_map = 0;
1189 struct net_device *netdev;
1190 struct dcb_app app;
1191
1192 netdev = rdev->netdev;
1193
1194 memset(&app, 0, sizeof(app));
1195 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
1196 app.protocol = ETH_P_IBOE;
1197 tmp_map = dcb_ieee_getapp_mask(netdev, &app);
1198 prio_map = tmp_map;
1199
1200 app.selector = IEEE_8021QAZ_APP_SEL_DGRAM;
1201 app.protocol = ROCE_V2_UDP_DPORT;
1202 tmp_map = dcb_ieee_getapp_mask(netdev, &app);
1203 prio_map |= tmp_map;
1204
1205 return prio_map;
1206 }
1207
1208 static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq)
1209 {
1210 u16 prio;
1211 u8 id;
1212
1213 for (prio = 0, id = 0; prio < 8; prio++) {
1214 if (prio_map & (1 << prio)) {
1215 cosq[id] = cid_map[prio];
1216 id++;
1217 if (id == 2) /* Max 2 tcs supported */
1218 break;
1219 }
1220 }
1221 }
1222
1223 static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev)
1224 {
1225 u8 prio_map = 0;
1226 u64 cid_map;
1227 int rc;
1228
1229 /* Get priority for roce */
1230 prio_map = bnxt_re_get_priority_mask(rdev);
1231
1232 if (prio_map == rdev->cur_prio_map)
1233 return 0;
1234 rdev->cur_prio_map = prio_map;
1235 /* Get cosq id for this priority */
1236 rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map);
1237 if (rc) {
1238 ibdev_warn(&rdev->ibdev, "no cos for p_mask %x\n", prio_map);
1239 return rc;
1240 }
1241 /* Parse CoS IDs for app priority */
1242 bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq);
1243
1244 /* Config BONO. */
1245 rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq);
1246 if (rc) {
1247 ibdev_warn(&rdev->ibdev, "no tc for cos{%x, %x}\n",
1248 rdev->cosq[0], rdev->cosq[1]);
1249 return rc;
1250 }
1251
1252 /* Actual priorities are not programmed as they are already
1253 * done by L2 driver; just enable or disable priority vlan tagging
1254 */
1255 if ((prio_map == 0 && rdev->qplib_res.prio) ||
1256 (prio_map != 0 && !rdev->qplib_res.prio)) {
1257 rdev->qplib_res.prio = prio_map ? true : false;
1258
1259 bnxt_re_update_gid(rdev);
1260 }
1261
1262 return 0;
1263 }
1264
1265 static void bnxt_re_query_hwrm_intf_version(struct bnxt_re_dev *rdev)
1266 {
1267 struct bnxt_en_dev *en_dev = rdev->en_dev;
1268 struct hwrm_ver_get_output resp = {0};
1269 struct hwrm_ver_get_input req = {0};
1270 struct bnxt_fw_msg fw_msg;
1271 int rc = 0;
1272
1273 memset(&fw_msg, 0, sizeof(fw_msg));
1274 bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
1275 HWRM_VER_GET, -1, -1);
1276 req.hwrm_intf_maj = HWRM_VERSION_MAJOR;
1277 req.hwrm_intf_min = HWRM_VERSION_MINOR;
1278 req.hwrm_intf_upd = HWRM_VERSION_UPDATE;
1279 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
1280 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
1281 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
1282 if (rc) {
1283 ibdev_err(&rdev->ibdev, "Failed to query HW version, rc = 0x%x",
1284 rc);
1285 return;
1286 }
1287 rdev->qplib_ctx.hwrm_intf_ver =
1288 (u64)le16_to_cpu(resp.hwrm_intf_major) << 48 |
1289 (u64)le16_to_cpu(resp.hwrm_intf_minor) << 32 |
1290 (u64)le16_to_cpu(resp.hwrm_intf_build) << 16 |
1291 le16_to_cpu(resp.hwrm_intf_patch);
1292 }
1293
1294 static int bnxt_re_ib_init(struct bnxt_re_dev *rdev)
1295 {
1296 int rc = 0;
1297 u32 event;
1298
1299 /* Register ib dev */
1300 rc = bnxt_re_register_ib(rdev);
1301 if (rc) {
1302 pr_err("Failed to register with IB: %#x\n", rc);
1303 return rc;
1304 }
1305 dev_info(rdev_to_dev(rdev), "Device registered successfully");
1306 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
1307 &rdev->active_width);
1308 set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags);
1309
1310 event = netif_running(rdev->netdev) && netif_carrier_ok(rdev->netdev) ?
1311 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
1312
1313 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, event);
1314
1315 return rc;
1316 }
1317
1318 static void bnxt_re_dev_uninit(struct bnxt_re_dev *rdev)
1319 {
1320 u8 type;
1321 int rc;
1322
1323 if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags))
1324 cancel_delayed_work_sync(&rdev->worker);
1325
1326 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED,
1327 &rdev->flags))
1328 bnxt_re_cleanup_res(rdev);
1329 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags))
1330 bnxt_re_free_res(rdev);
1331
1332 if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) {
1333 rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw);
1334 if (rc)
1335 ibdev_warn(&rdev->ibdev,
1336 "Failed to deinitialize RCFW: %#x", rc);
1337 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
1338 bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx);
1339 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
1340 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1341 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type);
1342 bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
1343 }
1344 if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) {
1345 rc = bnxt_re_free_msix(rdev);
1346 if (rc)
1347 ibdev_warn(&rdev->ibdev,
1348 "Failed to free MSI-X vectors: %#x", rc);
1349 }
1350
1351 bnxt_re_destroy_chip_ctx(rdev);
1352 if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) {
1353 rc = bnxt_re_unregister_netdev(rdev);
1354 if (rc)
1355 ibdev_warn(&rdev->ibdev,
1356 "Failed to unregister with netdev: %#x", rc);
1357 }
1358 }
1359
1360 /* worker thread for polling periodic events. Now used for QoS programming*/
1361 static void bnxt_re_worker(struct work_struct *work)
1362 {
1363 struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev,
1364 worker.work);
1365
1366 bnxt_re_setup_qos(rdev);
1367 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
1368 }
1369
1370 static int bnxt_re_dev_init(struct bnxt_re_dev *rdev, u8 wqe_mode)
1371 {
1372 struct bnxt_qplib_creq_ctx *creq;
1373 struct bnxt_re_ring_attr rattr;
1374 u32 db_offt;
1375 int vid;
1376 u8 type;
1377 int rc;
1378
1379 /* Registered a new RoCE device instance to netdev */
1380 memset(&rattr, 0, sizeof(rattr));
1381 rc = bnxt_re_register_netdev(rdev);
1382 if (rc) {
1383 rtnl_unlock();
1384 ibdev_err(&rdev->ibdev,
1385 "Failed to register with netedev: %#x\n", rc);
1386 return -EINVAL;
1387 }
1388 set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
1389
1390 rc = bnxt_re_setup_chip_ctx(rdev, wqe_mode);
1391 if (rc) {
1392 ibdev_err(&rdev->ibdev, "Failed to get chip context\n");
1393 return -EINVAL;
1394 }
1395
1396 /* Check whether VF or PF */
1397 bnxt_re_get_sriov_func_type(rdev);
1398
1399 rc = bnxt_re_request_msix(rdev);
1400 if (rc) {
1401 ibdev_err(&rdev->ibdev,
1402 "Failed to get MSI-X vectors: %#x\n", rc);
1403 rc = -EINVAL;
1404 goto fail;
1405 }
1406 set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags);
1407
1408 bnxt_re_query_hwrm_intf_version(rdev);
1409
1410 /* Establish RCFW Communication Channel to initialize the context
1411 * memory for the function and all child VFs
1412 */
1413 rc = bnxt_qplib_alloc_rcfw_channel(&rdev->qplib_res, &rdev->rcfw,
1414 &rdev->qplib_ctx,
1415 BNXT_RE_MAX_QPC_COUNT);
1416 if (rc) {
1417 ibdev_err(&rdev->ibdev,
1418 "Failed to allocate RCFW Channel: %#x\n", rc);
1419 goto fail;
1420 }
1421
1422 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1423 creq = &rdev->rcfw.creq;
1424 rattr.dma_arr = creq->hwq.pbl[PBL_LVL_0].pg_map_arr;
1425 rattr.pages = creq->hwq.pbl[creq->hwq.level].pg_count;
1426 rattr.type = type;
1427 rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX;
1428 rattr.depth = BNXT_QPLIB_CREQE_MAX_CNT - 1;
1429 rattr.lrid = rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx;
1430 rc = bnxt_re_net_ring_alloc(rdev, &rattr, &creq->ring_id);
1431 if (rc) {
1432 ibdev_err(&rdev->ibdev, "Failed to allocate CREQ: %#x\n", rc);
1433 goto free_rcfw;
1434 }
1435 db_offt = bnxt_re_get_nqdb_offset(rdev, BNXT_RE_AEQ_IDX);
1436 vid = rdev->msix_entries[BNXT_RE_AEQ_IDX].vector;
1437 rc = bnxt_qplib_enable_rcfw_channel(&rdev->rcfw,
1438 vid, db_offt, rdev->is_virtfn,
1439 &bnxt_re_aeq_handler);
1440 if (rc) {
1441 ibdev_err(&rdev->ibdev, "Failed to enable RCFW channel: %#x\n",
1442 rc);
1443 goto free_ring;
1444 }
1445
1446 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
1447 rdev->is_virtfn);
1448 if (rc)
1449 goto disable_rcfw;
1450
1451 bnxt_re_set_resource_limits(rdev);
1452
1453 rc = bnxt_qplib_alloc_ctx(&rdev->qplib_res, &rdev->qplib_ctx, 0,
1454 bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx));
1455 if (rc) {
1456 ibdev_err(&rdev->ibdev,
1457 "Failed to allocate QPLIB context: %#x\n", rc);
1458 goto disable_rcfw;
1459 }
1460 rc = bnxt_re_net_stats_ctx_alloc(rdev,
1461 rdev->qplib_ctx.stats.dma_map,
1462 &rdev->qplib_ctx.stats.fw_id);
1463 if (rc) {
1464 ibdev_err(&rdev->ibdev,
1465 "Failed to allocate stats context: %#x\n", rc);
1466 goto free_ctx;
1467 }
1468
1469 rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx,
1470 rdev->is_virtfn);
1471 if (rc) {
1472 ibdev_err(&rdev->ibdev,
1473 "Failed to initialize RCFW: %#x\n", rc);
1474 goto free_sctx;
1475 }
1476 set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags);
1477
1478 /* Resources based on the 'new' device caps */
1479 rc = bnxt_re_alloc_res(rdev);
1480 if (rc) {
1481 ibdev_err(&rdev->ibdev,
1482 "Failed to allocate resources: %#x\n", rc);
1483 goto fail;
1484 }
1485 set_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags);
1486 rc = bnxt_re_init_res(rdev);
1487 if (rc) {
1488 ibdev_err(&rdev->ibdev,
1489 "Failed to initialize resources: %#x\n", rc);
1490 goto fail;
1491 }
1492
1493 set_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, &rdev->flags);
1494
1495 if (!rdev->is_virtfn) {
1496 rc = bnxt_re_setup_qos(rdev);
1497 if (rc)
1498 ibdev_info(&rdev->ibdev,
1499 "RoCE priority not yet configured\n");
1500
1501 INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker);
1502 set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags);
1503 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
1504 }
1505
1506 return 0;
1507 free_sctx:
1508 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
1509 free_ctx:
1510 bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx);
1511 disable_rcfw:
1512 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
1513 free_ring:
1514 type = bnxt_qplib_get_ring_type(rdev->chip_ctx);
1515 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type);
1516 free_rcfw:
1517 bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
1518 fail:
1519 bnxt_re_dev_uninit(rdev);
1520
1521 return rc;
1522 }
1523
1524 static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev)
1525 {
1526 struct bnxt_en_dev *en_dev = rdev->en_dev;
1527 struct net_device *netdev = rdev->netdev;
1528
1529 bnxt_re_dev_remove(rdev);
1530
1531 if (netdev)
1532 bnxt_re_dev_unprobe(netdev, en_dev);
1533 }
1534
1535 static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev)
1536 {
1537 struct bnxt_en_dev *en_dev;
1538 int rc = 0;
1539
1540 if (!is_bnxt_re_dev(netdev))
1541 return -ENODEV;
1542
1543 en_dev = bnxt_re_dev_probe(netdev);
1544 if (IS_ERR(en_dev)) {
1545 if (en_dev != ERR_PTR(-ENODEV))
1546 ibdev_err(&(*rdev)->ibdev, "%s: Failed to probe\n",
1547 ROCE_DRV_MODULE_NAME);
1548 rc = PTR_ERR(en_dev);
1549 goto exit;
1550 }
1551 *rdev = bnxt_re_dev_add(netdev, en_dev);
1552 if (!*rdev) {
1553 rc = -ENOMEM;
1554 bnxt_re_dev_unprobe(netdev, en_dev);
1555 goto exit;
1556 }
1557 exit:
1558 return rc;
1559 }
1560
1561 static void bnxt_re_remove_device(struct bnxt_re_dev *rdev)
1562 {
1563 bnxt_re_dev_uninit(rdev);
1564 pci_dev_put(rdev->en_dev->pdev);
1565 bnxt_re_dev_unreg(rdev);
1566 }
1567
1568 static int bnxt_re_add_device(struct bnxt_re_dev **rdev,
1569 struct net_device *netdev, u8 wqe_mode)
1570 {
1571 int rc;
1572
1573 rc = bnxt_re_dev_reg(rdev, netdev);
1574 if (rc == -ENODEV)
1575 return rc;
1576 if (rc) {
1577 pr_err("Failed to register with the device %s: %#x\n",
1578 netdev->name, rc);
1579 return rc;
1580 }
1581
1582 pci_dev_get((*rdev)->en_dev->pdev);
1583 rc = bnxt_re_dev_init(*rdev, wqe_mode);
1584 if (rc) {
1585 pci_dev_put((*rdev)->en_dev->pdev);
1586 bnxt_re_dev_unreg(*rdev);
1587 }
1588
1589 return rc;
1590 }
1591
1592 static void bnxt_re_dealloc_driver(struct ib_device *ib_dev)
1593 {
1594 struct bnxt_re_dev *rdev =
1595 container_of(ib_dev, struct bnxt_re_dev, ibdev);
1596
1597 dev_info(rdev_to_dev(rdev), "Unregistering Device");
1598
1599 rtnl_lock();
1600 bnxt_re_remove_device(rdev);
1601 rtnl_unlock();
1602 }
1603
1604 /* Handle all deferred netevents tasks */
1605 static void bnxt_re_task(struct work_struct *work)
1606 {
1607 struct bnxt_re_work *re_work;
1608 struct bnxt_re_dev *rdev;
1609 int rc = 0;
1610
1611 re_work = container_of(work, struct bnxt_re_work, work);
1612 rdev = re_work->rdev;
1613
1614 if (re_work->event == NETDEV_REGISTER) {
1615 rc = bnxt_re_ib_init(rdev);
1616 if (rc) {
1617 ibdev_err(&rdev->ibdev,
1618 "Failed to register with IB: %#x", rc);
1619 rtnl_lock();
1620 bnxt_re_remove_device(rdev);
1621 rtnl_unlock();
1622 goto exit;
1623 }
1624 goto exit;
1625 }
1626
1627 if (!ib_device_try_get(&rdev->ibdev))
1628 goto exit;
1629
1630 switch (re_work->event) {
1631 case NETDEV_UP:
1632 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
1633 IB_EVENT_PORT_ACTIVE);
1634 break;
1635 case NETDEV_DOWN:
1636 bnxt_re_dev_stop(rdev);
1637 break;
1638 case NETDEV_CHANGE:
1639 if (!netif_carrier_ok(rdev->netdev))
1640 bnxt_re_dev_stop(rdev);
1641 else if (netif_carrier_ok(rdev->netdev))
1642 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
1643 IB_EVENT_PORT_ACTIVE);
1644 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
1645 &rdev->active_width);
1646 break;
1647 default:
1648 break;
1649 }
1650 ib_device_put(&rdev->ibdev);
1651 exit:
1652 put_device(&rdev->ibdev.dev);
1653 kfree(re_work);
1654 }
1655
1656 /*
1657 * "Notifier chain callback can be invoked for the same chain from
1658 * different CPUs at the same time".
1659 *
1660 * For cases when the netdev is already present, our call to the
1661 * register_netdevice_notifier() will actually get the rtnl_lock()
1662 * before sending NETDEV_REGISTER and (if up) NETDEV_UP
1663 * events.
1664 *
1665 * But for cases when the netdev is not already present, the notifier
1666 * chain is subjected to be invoked from different CPUs simultaneously.
1667 *
1668 * This is protected by the netdev_mutex.
1669 */
1670 static int bnxt_re_netdev_event(struct notifier_block *notifier,
1671 unsigned long event, void *ptr)
1672 {
1673 struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr);
1674 struct bnxt_re_work *re_work;
1675 struct bnxt_re_dev *rdev;
1676 int rc = 0;
1677 bool sch_work = false;
1678 bool release = true;
1679
1680 real_dev = rdma_vlan_dev_real_dev(netdev);
1681 if (!real_dev)
1682 real_dev = netdev;
1683
1684 rdev = bnxt_re_from_netdev(real_dev);
1685 if (!rdev && event != NETDEV_REGISTER)
1686 return NOTIFY_OK;
1687
1688 if (real_dev != netdev)
1689 goto exit;
1690
1691 switch (event) {
1692 case NETDEV_REGISTER:
1693 if (rdev)
1694 break;
1695 rc = bnxt_re_add_device(&rdev, real_dev,
1696 BNXT_QPLIB_WQE_MODE_STATIC);
1697 if (!rc)
1698 sch_work = true;
1699 release = false;
1700 break;
1701
1702 case NETDEV_UNREGISTER:
1703 ib_unregister_device_queued(&rdev->ibdev);
1704 break;
1705
1706 default:
1707 sch_work = true;
1708 break;
1709 }
1710 if (sch_work) {
1711 /* Allocate for the deferred task */
1712 re_work = kzalloc(sizeof(*re_work), GFP_ATOMIC);
1713 if (re_work) {
1714 get_device(&rdev->ibdev.dev);
1715 re_work->rdev = rdev;
1716 re_work->event = event;
1717 re_work->vlan_dev = (real_dev == netdev ?
1718 NULL : netdev);
1719 INIT_WORK(&re_work->work, bnxt_re_task);
1720 queue_work(bnxt_re_wq, &re_work->work);
1721 }
1722 }
1723
1724 exit:
1725 if (rdev && release)
1726 ib_device_put(&rdev->ibdev);
1727 return NOTIFY_DONE;
1728 }
1729
1730 static struct notifier_block bnxt_re_netdev_notifier = {
1731 .notifier_call = bnxt_re_netdev_event
1732 };
1733
1734 static int __init bnxt_re_mod_init(void)
1735 {
1736 int rc = 0;
1737
1738 pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version);
1739
1740 bnxt_re_wq = create_singlethread_workqueue("bnxt_re");
1741 if (!bnxt_re_wq)
1742 return -ENOMEM;
1743
1744 INIT_LIST_HEAD(&bnxt_re_dev_list);
1745
1746 rc = register_netdevice_notifier(&bnxt_re_netdev_notifier);
1747 if (rc) {
1748 pr_err("%s: Cannot register to netdevice_notifier",
1749 ROCE_DRV_MODULE_NAME);
1750 goto err_netdev;
1751 }
1752 return 0;
1753
1754 err_netdev:
1755 destroy_workqueue(bnxt_re_wq);
1756
1757 return rc;
1758 }
1759
1760 static void __exit bnxt_re_mod_exit(void)
1761 {
1762 struct bnxt_re_dev *rdev;
1763
1764 unregister_netdevice_notifier(&bnxt_re_netdev_notifier);
1765 if (bnxt_re_wq)
1766 destroy_workqueue(bnxt_re_wq);
1767 list_for_each_entry(rdev, &bnxt_re_dev_list, list) {
1768 /* VF device removal should be called before the removal
1769 * of PF device. Queue VFs unregister first, so that VFs
1770 * shall be removed before the PF during the call of
1771 * ib_unregister_driver.
1772 */
1773 if (rdev->is_virtfn)
1774 ib_unregister_device(&rdev->ibdev);
1775 }
1776 ib_unregister_driver(RDMA_DRIVER_BNXT_RE);
1777 }
1778
1779 module_init(bnxt_re_mod_init);
1780 module_exit(bnxt_re_mod_exit);
Linux with added FPC-III support