1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Driver for ST STV0367 DVB-T & DVB-C demodulator IC.
7 * Copyright (C) ST Microelectronics.
8 * Copyright (C) 2010,2011 NetUP Inc.
9 * Copyright (C) 2010,2011 Igor M. Liplianin <liplianin@netup.ru>
11 /* Common driver error constants */
13 #ifndef STV0367_PRIV_H
14 #define STV0367_PRIV_H
27 /* MACRO definitions */
28 #define MAX(X, Y) ((X) >= (Y) ? (X) : (Y))
29 #define MIN(X, Y) ((X) <= (Y) ? (X) : (Y))
30 #define INRANGE(X, Y, Z) \
31 ((((X) <= (Y)) && ((Y) <= (Z))) || \
32 (((Z) <= (Y)) && ((Y) <= (X))) ? 1 : 0)
35 #define MAKEWORD(X, Y) (((X) << 8) + (Y))
38 #define LSB(X) (((X) & 0xff))
39 #define MSB(Y) (((Y) >> 8) & 0xff)
40 #define MMSB(Y)(((Y) >> 16) & 0xff)
42 enum stv0367_ter_signal_type
{
49 FE_TER_PRFOUNDOK
= 10,
50 FE_TER_NOPRFOUND
= 11,
59 enum stv0367_ts_mode
{
60 STV0367_OUTPUTMODE_DEFAULT
,
61 STV0367_SERIAL_PUNCT_CLOCK
,
62 STV0367_SERIAL_CONT_CLOCK
,
63 STV0367_PARALLEL_PUNCT_CLOCK
,
67 enum stv0367_clk_pol
{
68 STV0367_CLOCKPOLARITY_DEFAULT
,
69 STV0367_RISINGEDGE_CLOCK
,
70 STV0367_FALLINGEDGE_CLOCK
74 FE_TER_CHAN_BW_6M
= 6,
75 FE_TER_CHAN_BW_7M
= 7,
80 enum FE_TER_Rate_TPS
{
89 enum stv0367_ter_mode
{
95 enum FE_TER_Hierarchy_Alpha
{
96 FE_TER_HIER_ALPHA_NONE
, /* Regular modulation */
97 FE_TER_HIER_ALPHA_1
, /* Hierarchical modulation a = 1*/
98 FE_TER_HIER_ALPHA_2
, /* Hierarchical modulation a = 2*/
99 FE_TER_HIER_ALPHA_4
/* Hierarchical modulation a = 4*/
102 enum stv0367_ter_hierarchy
{
103 FE_TER_HIER_NONE
, /*Hierarchy None*/
104 FE_TER_HIER_LOW_PRIO
, /*Hierarchy : Low Priority*/
105 FE_TER_HIER_HIGH_PRIO
, /*Hierarchy : High Priority*/
106 FE_TER_HIER_PRIO_ANY
/*Hierarchy :Any*/
110 enum fe_stv0367_ter_spec
{
111 FE_TER_INVERSION_NONE
= 0,
112 FE_TER_INVERSION
= 1,
113 FE_TER_INVERSION_AUTO
= 2,
114 FE_TER_INVERSION_UNK
= 4
118 enum stv0367_ter_if_iq_mode
{
119 FE_TER_NORMAL_IF_TUNER
= 0,
120 FE_TER_LONGPATH_IF_TUNER
= 1,
126 enum FE_TER_FECRate
{
127 FE_TER_FEC_NONE
= 0x00, /* no FEC rate specified */
128 FE_TER_FEC_ALL
= 0xFF, /* Logical OR of all FECs */
130 FE_TER_FEC_2_3
= (1 << 1),
131 FE_TER_FEC_3_4
= (1 << 2),
132 FE_TER_FEC_4_5
= (1 << 3),
133 FE_TER_FEC_5_6
= (1 << 4),
134 FE_TER_FEC_6_7
= (1 << 5),
135 FE_TER_FEC_7_8
= (1 << 6),
136 FE_TER_FEC_8_9
= (1 << 7)
149 enum stv0367_ter_force
{
150 FE_TER_FORCENONE
= 0,
154 enum stv0367cab_mod
{
166 FE_CAB_FEC_A
= 1, /* J83 Annex A */
167 FE_CAB_FEC_B
= (1 << 1),/* J83 Annex B */
168 FE_CAB_FEC_C
= (1 << 2) /* J83 Annex C */
171 struct stv0367_cab_signal_info
{
173 u32 frequency
; /* kHz */
174 u32 symbol_rate
; /* Mbds */
175 enum stv0367cab_mod modulation
;
176 enum fe_spectral_inversion spect_inv
;
177 s32 Power_dBmx10
; /* Power of the RF signal (dBm x 10) */
178 u32 CN_dBx10
; /* Carrier to noise ratio (dB x 10) */
179 u32 BER
; /* Bit error rate (x 10000000) */
182 enum stv0367_cab_signal_type
{