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WIP FPC-III support
[linux/fpc-iii.git] / drivers / media / i2c / imx219.c
blobe7791a0848b39ad57c118c56358c064277db969d
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * A V4L2 driver for Sony IMX219 cameras.
4 * Copyright (C) 2019, Raspberry Pi (Trading) Ltd
5 *
6 * Based on Sony imx258 camera driver
7 * Copyright (C) 2018 Intel Corporation
8 *
9 * DT / fwnode changes, and regulator / GPIO control taken from imx214 driver
10 * Copyright 2018 Qtechnology A/S
11 *
12 * Flip handling taken from the Sony IMX319 driver.
13 * Copyright (C) 2018 Intel Corporation
14 *
15 */
16
17 #include <linux/clk.h>
18 #include <linux/delay.h>
19 #include <linux/gpio/consumer.h>
20 #include <linux/i2c.h>
21 #include <linux/module.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regulator/consumer.h>
24 #include <media/v4l2-ctrls.h>
25 #include <media/v4l2-device.h>
26 #include <media/v4l2-event.h>
27 #include <media/v4l2-fwnode.h>
28 #include <media/v4l2-mediabus.h>
29 #include <asm/unaligned.h>
30
31 #define IMX219_REG_VALUE_08BIT 1
32 #define IMX219_REG_VALUE_16BIT 2
33
34 #define IMX219_REG_MODE_SELECT 0x0100
35 #define IMX219_MODE_STANDBY 0x00
36 #define IMX219_MODE_STREAMING 0x01
37
38 /* Chip ID */
39 #define IMX219_REG_CHIP_ID 0x0000
40 #define IMX219_CHIP_ID 0x0219
41
42 /* External clock frequency is 24.0M */
43 #define IMX219_XCLK_FREQ 24000000
44
45 /* Pixel rate is fixed at 182.4M for all the modes */
46 #define IMX219_PIXEL_RATE 182400000
47
48 #define IMX219_DEFAULT_LINK_FREQ 456000000
49
50 /* V_TIMING internal */
51 #define IMX219_REG_VTS 0x0160
52 #define IMX219_VTS_15FPS 0x0dc6
53 #define IMX219_VTS_30FPS_1080P 0x06e3
54 #define IMX219_VTS_30FPS_BINNED 0x06e3
55 #define IMX219_VTS_30FPS_640x480 0x06e3
56 #define IMX219_VTS_MAX 0xffff
57
58 #define IMX219_VBLANK_MIN 4
59
60 /*Frame Length Line*/
61 #define IMX219_FLL_MIN 0x08a6
62 #define IMX219_FLL_MAX 0xffff
63 #define IMX219_FLL_STEP 1
64 #define IMX219_FLL_DEFAULT 0x0c98
65
66 /* HBLANK control - read only */
67 #define IMX219_PPL_DEFAULT 3448
68
69 /* Exposure control */
70 #define IMX219_REG_EXPOSURE 0x015a
71 #define IMX219_EXPOSURE_MIN 4
72 #define IMX219_EXPOSURE_STEP 1
73 #define IMX219_EXPOSURE_DEFAULT 0x640
74 #define IMX219_EXPOSURE_MAX 65535
75
76 /* Analog gain control */
77 #define IMX219_REG_ANALOG_GAIN 0x0157
78 #define IMX219_ANA_GAIN_MIN 0
79 #define IMX219_ANA_GAIN_MAX 232
80 #define IMX219_ANA_GAIN_STEP 1
81 #define IMX219_ANA_GAIN_DEFAULT 0x0
82
83 /* Digital gain control */
84 #define IMX219_REG_DIGITAL_GAIN 0x0158
85 #define IMX219_DGTL_GAIN_MIN 0x0100
86 #define IMX219_DGTL_GAIN_MAX 0x0fff
87 #define IMX219_DGTL_GAIN_DEFAULT 0x0100
88 #define IMX219_DGTL_GAIN_STEP 1
89
90 #define IMX219_REG_ORIENTATION 0x0172
91
92 /* Test Pattern Control */
93 #define IMX219_REG_TEST_PATTERN 0x0600
94 #define IMX219_TEST_PATTERN_DISABLE 0
95 #define IMX219_TEST_PATTERN_SOLID_COLOR 1
96 #define IMX219_TEST_PATTERN_COLOR_BARS 2
97 #define IMX219_TEST_PATTERN_GREY_COLOR 3
98 #define IMX219_TEST_PATTERN_PN9 4
99
100 /* Test pattern colour components */
101 #define IMX219_REG_TESTP_RED 0x0602
102 #define IMX219_REG_TESTP_GREENR 0x0604
103 #define IMX219_REG_TESTP_BLUE 0x0606
104 #define IMX219_REG_TESTP_GREENB 0x0608
105 #define IMX219_TESTP_COLOUR_MIN 0
106 #define IMX219_TESTP_COLOUR_MAX 0x03ff
107 #define IMX219_TESTP_COLOUR_STEP 1
108 #define IMX219_TESTP_RED_DEFAULT IMX219_TESTP_COLOUR_MAX
109 #define IMX219_TESTP_GREENR_DEFAULT 0
110 #define IMX219_TESTP_BLUE_DEFAULT 0
111 #define IMX219_TESTP_GREENB_DEFAULT 0
112
113 /* IMX219 native and active pixel array size. */
114 #define IMX219_NATIVE_WIDTH 3296U
115 #define IMX219_NATIVE_HEIGHT 2480U
116 #define IMX219_PIXEL_ARRAY_LEFT 8U
117 #define IMX219_PIXEL_ARRAY_TOP 8U
118 #define IMX219_PIXEL_ARRAY_WIDTH 3280U
119 #define IMX219_PIXEL_ARRAY_HEIGHT 2464U
120
121 struct imx219_reg {
122 u16 address;
123 u8 val;
124 };
125
126 struct imx219_reg_list {
127 unsigned int num_of_regs;
128 const struct imx219_reg *regs;
129 };
130
131 /* Mode : resolution and related config&values */
132 struct imx219_mode {
133 /* Frame width */
134 unsigned int width;
135 /* Frame height */
136 unsigned int height;
137
138 /* Analog crop rectangle. */
139 struct v4l2_rect crop;
140
141 /* V-timing */
142 unsigned int vts_def;
143
144 /* Default register values */
145 struct imx219_reg_list reg_list;
146 };
147
148 /*
149 * Register sets lifted off the i2C interface from the Raspberry Pi firmware
150 * driver.
151 * 3280x2464 = mode 2, 1920x1080 = mode 1, 1640x1232 = mode 4, 640x480 = mode 7.
152 */
153 static const struct imx219_reg mode_3280x2464_regs[] = {
154 {0x0100, 0x00},
155 {0x30eb, 0x0c},
156 {0x30eb, 0x05},
157 {0x300a, 0xff},
158 {0x300b, 0xff},
159 {0x30eb, 0x05},
160 {0x30eb, 0x09},
161 {0x0114, 0x01},
162 {0x0128, 0x00},
163 {0x012a, 0x18},
164 {0x012b, 0x00},
165 {0x0164, 0x00},
166 {0x0165, 0x00},
167 {0x0166, 0x0c},
168 {0x0167, 0xcf},
169 {0x0168, 0x00},
170 {0x0169, 0x00},
171 {0x016a, 0x09},
172 {0x016b, 0x9f},
173 {0x016c, 0x0c},
174 {0x016d, 0xd0},
175 {0x016e, 0x09},
176 {0x016f, 0xa0},
177 {0x0170, 0x01},
178 {0x0171, 0x01},
179 {0x0174, 0x00},
180 {0x0175, 0x00},
181 {0x0301, 0x05},
182 {0x0303, 0x01},
183 {0x0304, 0x03},
184 {0x0305, 0x03},
185 {0x0306, 0x00},
186 {0x0307, 0x39},
187 {0x030b, 0x01},
188 {0x030c, 0x00},
189 {0x030d, 0x72},
190 {0x0624, 0x0c},
191 {0x0625, 0xd0},
192 {0x0626, 0x09},
193 {0x0627, 0xa0},
194 {0x455e, 0x00},
195 {0x471e, 0x4b},
196 {0x4767, 0x0f},
197 {0x4750, 0x14},
198 {0x4540, 0x00},
199 {0x47b4, 0x14},
200 {0x4713, 0x30},
201 {0x478b, 0x10},
202 {0x478f, 0x10},
203 {0x4793, 0x10},
204 {0x4797, 0x0e},
205 {0x479b, 0x0e},
206 {0x0162, 0x0d},
207 {0x0163, 0x78},
208 };
209
210 static const struct imx219_reg mode_1920_1080_regs[] = {
211 {0x0100, 0x00},
212 {0x30eb, 0x05},
213 {0x30eb, 0x0c},
214 {0x300a, 0xff},
215 {0x300b, 0xff},
216 {0x30eb, 0x05},
217 {0x30eb, 0x09},
218 {0x0114, 0x01},
219 {0x0128, 0x00},
220 {0x012a, 0x18},
221 {0x012b, 0x00},
222 {0x0162, 0x0d},
223 {0x0163, 0x78},
224 {0x0164, 0x02},
225 {0x0165, 0xa8},
226 {0x0166, 0x0a},
227 {0x0167, 0x27},
228 {0x0168, 0x02},
229 {0x0169, 0xb4},
230 {0x016a, 0x06},
231 {0x016b, 0xeb},
232 {0x016c, 0x07},
233 {0x016d, 0x80},
234 {0x016e, 0x04},
235 {0x016f, 0x38},
236 {0x0170, 0x01},
237 {0x0171, 0x01},
238 {0x0174, 0x00},
239 {0x0175, 0x00},
240 {0x0301, 0x05},
241 {0x0303, 0x01},
242 {0x0304, 0x03},
243 {0x0305, 0x03},
244 {0x0306, 0x00},
245 {0x0307, 0x39},
246 {0x030b, 0x01},
247 {0x030c, 0x00},
248 {0x030d, 0x72},
249 {0x0624, 0x07},
250 {0x0625, 0x80},
251 {0x0626, 0x04},
252 {0x0627, 0x38},
253 {0x455e, 0x00},
254 {0x471e, 0x4b},
255 {0x4767, 0x0f},
256 {0x4750, 0x14},
257 {0x4540, 0x00},
258 {0x47b4, 0x14},
259 {0x4713, 0x30},
260 {0x478b, 0x10},
261 {0x478f, 0x10},
262 {0x4793, 0x10},
263 {0x4797, 0x0e},
264 {0x479b, 0x0e},
265 };
266
267 static const struct imx219_reg mode_1640_1232_regs[] = {
268 {0x0100, 0x00},
269 {0x30eb, 0x0c},
270 {0x30eb, 0x05},
271 {0x300a, 0xff},
272 {0x300b, 0xff},
273 {0x30eb, 0x05},
274 {0x30eb, 0x09},
275 {0x0114, 0x01},
276 {0x0128, 0x00},
277 {0x012a, 0x18},
278 {0x012b, 0x00},
279 {0x0164, 0x00},
280 {0x0165, 0x00},
281 {0x0166, 0x0c},
282 {0x0167, 0xcf},
283 {0x0168, 0x00},
284 {0x0169, 0x00},
285 {0x016a, 0x09},
286 {0x016b, 0x9f},
287 {0x016c, 0x06},
288 {0x016d, 0x68},
289 {0x016e, 0x04},
290 {0x016f, 0xd0},
291 {0x0170, 0x01},
292 {0x0171, 0x01},
293 {0x0174, 0x01},
294 {0x0175, 0x01},
295 {0x0301, 0x05},
296 {0x0303, 0x01},
297 {0x0304, 0x03},
298 {0x0305, 0x03},
299 {0x0306, 0x00},
300 {0x0307, 0x39},
301 {0x030b, 0x01},
302 {0x030c, 0x00},
303 {0x030d, 0x72},
304 {0x0624, 0x06},
305 {0x0625, 0x68},
306 {0x0626, 0x04},
307 {0x0627, 0xd0},
308 {0x455e, 0x00},
309 {0x471e, 0x4b},
310 {0x4767, 0x0f},
311 {0x4750, 0x14},
312 {0x4540, 0x00},
313 {0x47b4, 0x14},
314 {0x4713, 0x30},
315 {0x478b, 0x10},
316 {0x478f, 0x10},
317 {0x4793, 0x10},
318 {0x4797, 0x0e},
319 {0x479b, 0x0e},
320 {0x0162, 0x0d},
321 {0x0163, 0x78},
322 };
323
324 static const struct imx219_reg mode_640_480_regs[] = {
325 {0x0100, 0x00},
326 {0x30eb, 0x05},
327 {0x30eb, 0x0c},
328 {0x300a, 0xff},
329 {0x300b, 0xff},
330 {0x30eb, 0x05},
331 {0x30eb, 0x09},
332 {0x0114, 0x01},
333 {0x0128, 0x00},
334 {0x012a, 0x18},
335 {0x012b, 0x00},
336 {0x0162, 0x0d},
337 {0x0163, 0x78},
338 {0x0164, 0x03},
339 {0x0165, 0xe8},
340 {0x0166, 0x08},
341 {0x0167, 0xe7},
342 {0x0168, 0x02},
343 {0x0169, 0xf0},
344 {0x016a, 0x06},
345 {0x016b, 0xaf},
346 {0x016c, 0x02},
347 {0x016d, 0x80},
348 {0x016e, 0x01},
349 {0x016f, 0xe0},
350 {0x0170, 0x01},
351 {0x0171, 0x01},
352 {0x0174, 0x03},
353 {0x0175, 0x03},
354 {0x0301, 0x05},
355 {0x0303, 0x01},
356 {0x0304, 0x03},
357 {0x0305, 0x03},
358 {0x0306, 0x00},
359 {0x0307, 0x39},
360 {0x030b, 0x01},
361 {0x030c, 0x00},
362 {0x030d, 0x72},
363 {0x0624, 0x06},
364 {0x0625, 0x68},
365 {0x0626, 0x04},
366 {0x0627, 0xd0},
367 {0x455e, 0x00},
368 {0x471e, 0x4b},
369 {0x4767, 0x0f},
370 {0x4750, 0x14},
371 {0x4540, 0x00},
372 {0x47b4, 0x14},
373 {0x4713, 0x30},
374 {0x478b, 0x10},
375 {0x478f, 0x10},
376 {0x4793, 0x10},
377 {0x4797, 0x0e},
378 {0x479b, 0x0e},
379 };
380
381 static const struct imx219_reg raw8_framefmt_regs[] = {
382 {0x018c, 0x08},
383 {0x018d, 0x08},
384 {0x0309, 0x08},
385 };
386
387 static const struct imx219_reg raw10_framefmt_regs[] = {
388 {0x018c, 0x0a},
389 {0x018d, 0x0a},
390 {0x0309, 0x0a},
391 };
392
393 static const char * const imx219_test_pattern_menu[] = {
394 "Disabled",
395 "Color Bars",
396 "Solid Color",
397 "Grey Color Bars",
398 "PN9"
399 };
400
401 static const int imx219_test_pattern_val[] = {
402 IMX219_TEST_PATTERN_DISABLE,
403 IMX219_TEST_PATTERN_COLOR_BARS,
404 IMX219_TEST_PATTERN_SOLID_COLOR,
405 IMX219_TEST_PATTERN_GREY_COLOR,
406 IMX219_TEST_PATTERN_PN9,
407 };
408
409 /* regulator supplies */
410 static const char * const imx219_supply_name[] = {
411 /* Supplies can be enabled in any order */
412 "VANA", /* Analog (2.8V) supply */
413 "VDIG", /* Digital Core (1.8V) supply */
414 "VDDL", /* IF (1.2V) supply */
415 };
416
417 #define IMX219_NUM_SUPPLIES ARRAY_SIZE(imx219_supply_name)
418
419 /*
420 * The supported formats.
421 * This table MUST contain 4 entries per format, to cover the various flip
422 * combinations in the order
423 * - no flip
424 * - h flip
425 * - v flip
426 * - h&v flips
427 */
428 static const u32 codes[] = {
429 MEDIA_BUS_FMT_SRGGB10_1X10,
430 MEDIA_BUS_FMT_SGRBG10_1X10,
431 MEDIA_BUS_FMT_SGBRG10_1X10,
432 MEDIA_BUS_FMT_SBGGR10_1X10,
433
434 MEDIA_BUS_FMT_SRGGB8_1X8,
435 MEDIA_BUS_FMT_SGRBG8_1X8,
436 MEDIA_BUS_FMT_SGBRG8_1X8,
437 MEDIA_BUS_FMT_SBGGR8_1X8,
438 };
439
440 /*
441 * Initialisation delay between XCLR low->high and the moment when the sensor
442 * can start capture (i.e. can leave software stanby) must be not less than:
443 * t4 + max(t5, t6 + <time to initialize the sensor register over I2C>)
444 * where
445 * t4 is fixed, and is max 200uS,
446 * t5 is fixed, and is 6000uS,
447 * t6 depends on the sensor external clock, and is max 32000 clock periods.
448 * As per sensor datasheet, the external clock must be from 6MHz to 27MHz.
449 * So for any acceptable external clock t6 is always within the range of
450 * 1185 to 5333 uS, and is always less than t5.
451 * For this reason this is always safe to wait (t4 + t5) = 6200 uS, then
452 * initialize the sensor over I2C, and then exit the software standby.
453 *
454 * This start-up time can be optimized a bit more, if we start the writes
455 * over I2C after (t4+t6), but before (t4+t5) expires. But then sensor
456 * initialization over I2C may complete before (t4+t5) expires, and we must
457 * ensure that capture is not started before (t4+t5).
458 *
459 * This delay doesn't account for the power supply startup time. If needed,
460 * this should be taken care of via the regulator framework. E.g. in the
461 * case of DT for regulator-fixed one should define the startup-delay-us
462 * property.
463 */
464 #define IMX219_XCLR_MIN_DELAY_US 6200
465 #define IMX219_XCLR_DELAY_RANGE_US 1000
466
467 /* Mode configs */
468 static const struct imx219_mode supported_modes[] = {
469 {
470 /* 8MPix 15fps mode */
471 .width = 3280,
472 .height = 2464,
473 .crop = {
474 .left = IMX219_PIXEL_ARRAY_LEFT,
475 .top = IMX219_PIXEL_ARRAY_TOP,
476 .width = 3280,
477 .height = 2464
478 },
479 .vts_def = IMX219_VTS_15FPS,
480 .reg_list = {
481 .num_of_regs = ARRAY_SIZE(mode_3280x2464_regs),
482 .regs = mode_3280x2464_regs,
483 },
484 },
485 {
486 /* 1080P 30fps cropped */
487 .width = 1920,
488 .height = 1080,
489 .crop = {
490 .left = 688,
491 .top = 700,
492 .width = 1920,
493 .height = 1080
494 },
495 .vts_def = IMX219_VTS_30FPS_1080P,
496 .reg_list = {
497 .num_of_regs = ARRAY_SIZE(mode_1920_1080_regs),
498 .regs = mode_1920_1080_regs,
499 },
500 },
501 {
502 /* 2x2 binned 30fps mode */
503 .width = 1640,
504 .height = 1232,
505 .crop = {
506 .left = IMX219_PIXEL_ARRAY_LEFT,
507 .top = IMX219_PIXEL_ARRAY_TOP,
508 .width = 3280,
509 .height = 2464
510 },
511 .vts_def = IMX219_VTS_30FPS_BINNED,
512 .reg_list = {
513 .num_of_regs = ARRAY_SIZE(mode_1640_1232_regs),
514 .regs = mode_1640_1232_regs,
515 },
516 },
517 {
518 /* 640x480 30fps mode */
519 .width = 640,
520 .height = 480,
521 .crop = {
522 .left = 1008,
523 .top = 760,
524 .width = 1280,
525 .height = 960
526 },
527 .vts_def = IMX219_VTS_30FPS_640x480,
528 .reg_list = {
529 .num_of_regs = ARRAY_SIZE(mode_640_480_regs),
530 .regs = mode_640_480_regs,
531 },
532 },
533 };
534
535 struct imx219 {
536 struct v4l2_subdev sd;
537 struct media_pad pad;
538
539 struct v4l2_mbus_framefmt fmt;
540
541 struct clk *xclk; /* system clock to IMX219 */
542 u32 xclk_freq;
543
544 struct gpio_desc *reset_gpio;
545 struct regulator_bulk_data supplies[IMX219_NUM_SUPPLIES];
546
547 struct v4l2_ctrl_handler ctrl_handler;
548 /* V4L2 Controls */
549 struct v4l2_ctrl *pixel_rate;
550 struct v4l2_ctrl *exposure;
551 struct v4l2_ctrl *vflip;
552 struct v4l2_ctrl *hflip;
553 struct v4l2_ctrl *vblank;
554 struct v4l2_ctrl *hblank;
555
556 /* Current mode */
557 const struct imx219_mode *mode;
558
559 /*
560 * Mutex for serialized access:
561 * Protect sensor module set pad format and start/stop streaming safely.
562 */
563 struct mutex mutex;
564
565 /* Streaming on/off */
566 bool streaming;
567 };
568
569 static inline struct imx219 *to_imx219(struct v4l2_subdev *_sd)
570 {
571 return container_of(_sd, struct imx219, sd);
572 }
573
574 /* Read registers up to 2 at a time */
575 static int imx219_read_reg(struct imx219 *imx219, u16 reg, u32 len, u32 *val)
576 {
577 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
578 struct i2c_msg msgs[2];
579 u8 addr_buf[2] = { reg >> 8, reg & 0xff };
580 u8 data_buf[4] = { 0, };
581 int ret;
582
583 if (len > 4)
584 return -EINVAL;
585
586 /* Write register address */
587 msgs[0].addr = client->addr;
588 msgs[0].flags = 0;
589 msgs[0].len = ARRAY_SIZE(addr_buf);
590 msgs[0].buf = addr_buf;
591
592 /* Read data from register */
593 msgs[1].addr = client->addr;
594 msgs[1].flags = I2C_M_RD;
595 msgs[1].len = len;
596 msgs[1].buf = &data_buf[4 - len];
597
598 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
599 if (ret != ARRAY_SIZE(msgs))
600 return -EIO;
601
602 *val = get_unaligned_be32(data_buf);
603
604 return 0;
605 }
606
607 /* Write registers up to 2 at a time */
608 static int imx219_write_reg(struct imx219 *imx219, u16 reg, u32 len, u32 val)
609 {
610 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
611 u8 buf[6];
612
613 if (len > 4)
614 return -EINVAL;
615
616 put_unaligned_be16(reg, buf);
617 put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
618 if (i2c_master_send(client, buf, len + 2) != len + 2)
619 return -EIO;
620
621 return 0;
622 }
623
624 /* Write a list of registers */
625 static int imx219_write_regs(struct imx219 *imx219,
626 const struct imx219_reg *regs, u32 len)
627 {
628 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
629 unsigned int i;
630 int ret;
631
632 for (i = 0; i < len; i++) {
633 ret = imx219_write_reg(imx219, regs[i].address, 1, regs[i].val);
634 if (ret) {
635 dev_err_ratelimited(&client->dev,
636 "Failed to write reg 0x%4.4x. error = %d\n",
637 regs[i].address, ret);
638
639 return ret;
640 }
641 }
642
643 return 0;
644 }
645
646 /* Get bayer order based on flip setting. */
647 static u32 imx219_get_format_code(struct imx219 *imx219, u32 code)
648 {
649 unsigned int i;
650
651 lockdep_assert_held(&imx219->mutex);
652
653 for (i = 0; i < ARRAY_SIZE(codes); i++)
654 if (codes[i] == code)
655 break;
656
657 if (i >= ARRAY_SIZE(codes))
658 i = 0;
659
660 i = (i & ~3) | (imx219->vflip->val ? 2 : 0) |
661 (imx219->hflip->val ? 1 : 0);
662
663 return codes[i];
664 }
665
666 static void imx219_set_default_format(struct imx219 *imx219)
667 {
668 struct v4l2_mbus_framefmt *fmt;
669
670 fmt = &imx219->fmt;
671 fmt->code = MEDIA_BUS_FMT_SRGGB10_1X10;
672 fmt->colorspace = V4L2_COLORSPACE_SRGB;
673 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
674 fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true,
675 fmt->colorspace,
676 fmt->ycbcr_enc);
677 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
678 fmt->width = supported_modes[0].width;
679 fmt->height = supported_modes[0].height;
680 fmt->field = V4L2_FIELD_NONE;
681 }
682
683 static int imx219_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
684 {
685 struct imx219 *imx219 = to_imx219(sd);
686 struct v4l2_mbus_framefmt *try_fmt =
687 v4l2_subdev_get_try_format(sd, fh->pad, 0);
688 struct v4l2_rect *try_crop;
689
690 mutex_lock(&imx219->mutex);
691
692 /* Initialize try_fmt */
693 try_fmt->width = supported_modes[0].width;
694 try_fmt->height = supported_modes[0].height;
695 try_fmt->code = imx219_get_format_code(imx219,
696 MEDIA_BUS_FMT_SRGGB10_1X10);
697 try_fmt->field = V4L2_FIELD_NONE;
698
699 /* Initialize try_crop rectangle. */
700 try_crop = v4l2_subdev_get_try_crop(sd, fh->pad, 0);
701 try_crop->top = IMX219_PIXEL_ARRAY_TOP;
702 try_crop->left = IMX219_PIXEL_ARRAY_LEFT;
703 try_crop->width = IMX219_PIXEL_ARRAY_WIDTH;
704 try_crop->height = IMX219_PIXEL_ARRAY_HEIGHT;
705
706 mutex_unlock(&imx219->mutex);
707
708 return 0;
709 }
710
711 static int imx219_set_ctrl(struct v4l2_ctrl *ctrl)
712 {
713 struct imx219 *imx219 =
714 container_of(ctrl->handler, struct imx219, ctrl_handler);
715 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
716 int ret;
717
718 if (ctrl->id == V4L2_CID_VBLANK) {
719 int exposure_max, exposure_def;
720
721 /* Update max exposure while meeting expected vblanking */
722 exposure_max = imx219->mode->height + ctrl->val - 4;
723 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
724 exposure_max : IMX219_EXPOSURE_DEFAULT;
725 __v4l2_ctrl_modify_range(imx219->exposure,
726 imx219->exposure->minimum,
727 exposure_max, imx219->exposure->step,
728 exposure_def);
729 }
730
731 /*
732 * Applying V4L2 control value only happens
733 * when power is up for streaming
734 */
735 if (pm_runtime_get_if_in_use(&client->dev) == 0)
736 return 0;
737
738 switch (ctrl->id) {
739 case V4L2_CID_ANALOGUE_GAIN:
740 ret = imx219_write_reg(imx219, IMX219_REG_ANALOG_GAIN,
741 IMX219_REG_VALUE_08BIT, ctrl->val);
742 break;
743 case V4L2_CID_EXPOSURE:
744 ret = imx219_write_reg(imx219, IMX219_REG_EXPOSURE,
745 IMX219_REG_VALUE_16BIT, ctrl->val);
746 break;
747 case V4L2_CID_DIGITAL_GAIN:
748 ret = imx219_write_reg(imx219, IMX219_REG_DIGITAL_GAIN,
749 IMX219_REG_VALUE_16BIT, ctrl->val);
750 break;
751 case V4L2_CID_TEST_PATTERN:
752 ret = imx219_write_reg(imx219, IMX219_REG_TEST_PATTERN,
753 IMX219_REG_VALUE_16BIT,
754 imx219_test_pattern_val[ctrl->val]);
755 break;
756 case V4L2_CID_HFLIP:
757 case V4L2_CID_VFLIP:
758 ret = imx219_write_reg(imx219, IMX219_REG_ORIENTATION, 1,
759 imx219->hflip->val |
760 imx219->vflip->val << 1);
761 break;
762 case V4L2_CID_VBLANK:
763 ret = imx219_write_reg(imx219, IMX219_REG_VTS,
764 IMX219_REG_VALUE_16BIT,
765 imx219->mode->height + ctrl->val);
766 break;
767 case V4L2_CID_TEST_PATTERN_RED:
768 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_RED,
769 IMX219_REG_VALUE_16BIT, ctrl->val);
770 break;
771 case V4L2_CID_TEST_PATTERN_GREENR:
772 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENR,
773 IMX219_REG_VALUE_16BIT, ctrl->val);
774 break;
775 case V4L2_CID_TEST_PATTERN_BLUE:
776 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_BLUE,
777 IMX219_REG_VALUE_16BIT, ctrl->val);
778 break;
779 case V4L2_CID_TEST_PATTERN_GREENB:
780 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENB,
781 IMX219_REG_VALUE_16BIT, ctrl->val);
782 break;
783 default:
784 dev_info(&client->dev,
785 "ctrl(id:0x%x,val:0x%x) is not handled\n",
786 ctrl->id, ctrl->val);
787 ret = -EINVAL;
788 break;
789 }
790
791 pm_runtime_put(&client->dev);
792
793 return ret;
794 }
795
796 static const struct v4l2_ctrl_ops imx219_ctrl_ops = {
797 .s_ctrl = imx219_set_ctrl,
798 };
799
800 static int imx219_enum_mbus_code(struct v4l2_subdev *sd,
801 struct v4l2_subdev_pad_config *cfg,
802 struct v4l2_subdev_mbus_code_enum *code)
803 {
804 struct imx219 *imx219 = to_imx219(sd);
805
806 if (code->index >= (ARRAY_SIZE(codes) / 4))
807 return -EINVAL;
808
809 code->code = imx219_get_format_code(imx219, codes[code->index * 4]);
810
811 return 0;
812 }
813
814 static int imx219_enum_frame_size(struct v4l2_subdev *sd,
815 struct v4l2_subdev_pad_config *cfg,
816 struct v4l2_subdev_frame_size_enum *fse)
817 {
818 struct imx219 *imx219 = to_imx219(sd);
819
820 if (fse->index >= ARRAY_SIZE(supported_modes))
821 return -EINVAL;
822
823 if (fse->code != imx219_get_format_code(imx219, fse->code))
824 return -EINVAL;
825
826 fse->min_width = supported_modes[fse->index].width;
827 fse->max_width = fse->min_width;
828 fse->min_height = supported_modes[fse->index].height;
829 fse->max_height = fse->min_height;
830
831 return 0;
832 }
833
834 static void imx219_reset_colorspace(struct v4l2_mbus_framefmt *fmt)
835 {
836 fmt->colorspace = V4L2_COLORSPACE_SRGB;
837 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
838 fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true,
839 fmt->colorspace,
840 fmt->ycbcr_enc);
841 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
842 }
843
844 static void imx219_update_pad_format(struct imx219 *imx219,
845 const struct imx219_mode *mode,
846 struct v4l2_subdev_format *fmt)
847 {
848 fmt->format.width = mode->width;
849 fmt->format.height = mode->height;
850 fmt->format.field = V4L2_FIELD_NONE;
851 imx219_reset_colorspace(&fmt->format);
852 }
853
854 static int __imx219_get_pad_format(struct imx219 *imx219,
855 struct v4l2_subdev_pad_config *cfg,
856 struct v4l2_subdev_format *fmt)
857 {
858 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
859 struct v4l2_mbus_framefmt *try_fmt =
860 v4l2_subdev_get_try_format(&imx219->sd, cfg, fmt->pad);
861 /* update the code which could change due to vflip or hflip: */
862 try_fmt->code = imx219_get_format_code(imx219, try_fmt->code);
863 fmt->format = *try_fmt;
864 } else {
865 imx219_update_pad_format(imx219, imx219->mode, fmt);
866 fmt->format.code = imx219_get_format_code(imx219,
867 imx219->fmt.code);
868 }
869
870 return 0;
871 }
872
873 static int imx219_get_pad_format(struct v4l2_subdev *sd,
874 struct v4l2_subdev_pad_config *cfg,
875 struct v4l2_subdev_format *fmt)
876 {
877 struct imx219 *imx219 = to_imx219(sd);
878 int ret;
879
880 mutex_lock(&imx219->mutex);
881 ret = __imx219_get_pad_format(imx219, cfg, fmt);
882 mutex_unlock(&imx219->mutex);
883
884 return ret;
885 }
886
887 static int imx219_set_pad_format(struct v4l2_subdev *sd,
888 struct v4l2_subdev_pad_config *cfg,
889 struct v4l2_subdev_format *fmt)
890 {
891 struct imx219 *imx219 = to_imx219(sd);
892 const struct imx219_mode *mode;
893 struct v4l2_mbus_framefmt *framefmt;
894 int exposure_max, exposure_def, hblank;
895 unsigned int i;
896
897 mutex_lock(&imx219->mutex);
898
899 for (i = 0; i < ARRAY_SIZE(codes); i++)
900 if (codes[i] == fmt->format.code)
901 break;
902 if (i >= ARRAY_SIZE(codes))
903 i = 0;
904
905 /* Bayer order varies with flips */
906 fmt->format.code = imx219_get_format_code(imx219, codes[i]);
907
908 mode = v4l2_find_nearest_size(supported_modes,
909 ARRAY_SIZE(supported_modes),
910 width, height,
911 fmt->format.width, fmt->format.height);
912 imx219_update_pad_format(imx219, mode, fmt);
913 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
914 framefmt = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
915 *framefmt = fmt->format;
916 } else if (imx219->mode != mode ||
917 imx219->fmt.code != fmt->format.code) {
918 imx219->fmt = fmt->format;
919 imx219->mode = mode;
920 /* Update limits and set FPS to default */
921 __v4l2_ctrl_modify_range(imx219->vblank, IMX219_VBLANK_MIN,
922 IMX219_VTS_MAX - mode->height, 1,
923 mode->vts_def - mode->height);
924 __v4l2_ctrl_s_ctrl(imx219->vblank,
925 mode->vts_def - mode->height);
926 /* Update max exposure while meeting expected vblanking */
927 exposure_max = mode->vts_def - 4;
928 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
929 exposure_max : IMX219_EXPOSURE_DEFAULT;
930 __v4l2_ctrl_modify_range(imx219->exposure,
931 imx219->exposure->minimum,
932 exposure_max, imx219->exposure->step,
933 exposure_def);
934 /*
935 * Currently PPL is fixed to IMX219_PPL_DEFAULT, so hblank
936 * depends on mode->width only, and is not changeble in any
937 * way other than changing the mode.
938 */
939 hblank = IMX219_PPL_DEFAULT - mode->width;
940 __v4l2_ctrl_modify_range(imx219->hblank, hblank, hblank, 1,
941 hblank);
942 }
943
944 mutex_unlock(&imx219->mutex);
945
946 return 0;
947 }
948
949 static int imx219_set_framefmt(struct imx219 *imx219)
950 {
951 switch (imx219->fmt.code) {
952 case MEDIA_BUS_FMT_SRGGB8_1X8:
953 case MEDIA_BUS_FMT_SGRBG8_1X8:
954 case MEDIA_BUS_FMT_SGBRG8_1X8:
955 case MEDIA_BUS_FMT_SBGGR8_1X8:
956 return imx219_write_regs(imx219, raw8_framefmt_regs,
957 ARRAY_SIZE(raw8_framefmt_regs));
958
959 case MEDIA_BUS_FMT_SRGGB10_1X10:
960 case MEDIA_BUS_FMT_SGRBG10_1X10:
961 case MEDIA_BUS_FMT_SGBRG10_1X10:
962 case MEDIA_BUS_FMT_SBGGR10_1X10:
963 return imx219_write_regs(imx219, raw10_framefmt_regs,
964 ARRAY_SIZE(raw10_framefmt_regs));
965 }
966
967 return -EINVAL;
968 }
969
970 static const struct v4l2_rect *
971 __imx219_get_pad_crop(struct imx219 *imx219, struct v4l2_subdev_pad_config *cfg,
972 unsigned int pad, enum v4l2_subdev_format_whence which)
973 {
974 switch (which) {
975 case V4L2_SUBDEV_FORMAT_TRY:
976 return v4l2_subdev_get_try_crop(&imx219->sd, cfg, pad);
977 case V4L2_SUBDEV_FORMAT_ACTIVE:
978 return &imx219->mode->crop;
979 }
980
981 return NULL;
982 }
983
984 static int imx219_get_selection(struct v4l2_subdev *sd,
985 struct v4l2_subdev_pad_config *cfg,
986 struct v4l2_subdev_selection *sel)
987 {
988 switch (sel->target) {
989 case V4L2_SEL_TGT_CROP: {
990 struct imx219 *imx219 = to_imx219(sd);
991
992 mutex_lock(&imx219->mutex);
993 sel->r = *__imx219_get_pad_crop(imx219, cfg, sel->pad,
994 sel->which);
995 mutex_unlock(&imx219->mutex);
996
997 return 0;
998 }
999
1000 case V4L2_SEL_TGT_NATIVE_SIZE:
1001 sel->r.top = 0;
1002 sel->r.left = 0;
1003 sel->r.width = IMX219_NATIVE_WIDTH;
1004 sel->r.height = IMX219_NATIVE_HEIGHT;
1005
1006 return 0;
1007
1008 case V4L2_SEL_TGT_CROP_DEFAULT:
1009 case V4L2_SEL_TGT_CROP_BOUNDS:
1010 sel->r.top = IMX219_PIXEL_ARRAY_TOP;
1011 sel->r.left = IMX219_PIXEL_ARRAY_LEFT;
1012 sel->r.width = IMX219_PIXEL_ARRAY_WIDTH;
1013 sel->r.height = IMX219_PIXEL_ARRAY_HEIGHT;
1014
1015 return 0;
1016 }
1017
1018 return -EINVAL;
1019 }
1020
1021 static int imx219_start_streaming(struct imx219 *imx219)
1022 {
1023 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1024 const struct imx219_reg_list *reg_list;
1025 int ret;
1026
1027 /* Apply default values of current mode */
1028 reg_list = &imx219->mode->reg_list;
1029 ret = imx219_write_regs(imx219, reg_list->regs, reg_list->num_of_regs);
1030 if (ret) {
1031 dev_err(&client->dev, "%s failed to set mode\n", __func__);
1032 return ret;
1033 }
1034
1035 ret = imx219_set_framefmt(imx219);
1036 if (ret) {
1037 dev_err(&client->dev, "%s failed to set frame format: %d\n",
1038 __func__, ret);
1039 return ret;
1040 }
1041
1042 /* Apply customized values from user */
1043 ret = __v4l2_ctrl_handler_setup(imx219->sd.ctrl_handler);
1044 if (ret)
1045 return ret;
1046
1047 /* set stream on register */
1048 return imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1049 IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING);
1050 }
1051
1052 static void imx219_stop_streaming(struct imx219 *imx219)
1053 {
1054 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1055 int ret;
1056
1057 /* set stream off register */
1058 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1059 IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY);
1060 if (ret)
1061 dev_err(&client->dev, "%s failed to set stream\n", __func__);
1062 }
1063
1064 static int imx219_set_stream(struct v4l2_subdev *sd, int enable)
1065 {
1066 struct imx219 *imx219 = to_imx219(sd);
1067 struct i2c_client *client = v4l2_get_subdevdata(sd);
1068 int ret = 0;
1069
1070 mutex_lock(&imx219->mutex);
1071 if (imx219->streaming == enable) {
1072 mutex_unlock(&imx219->mutex);
1073 return 0;
1074 }
1075
1076 if (enable) {
1077 ret = pm_runtime_get_sync(&client->dev);
1078 if (ret < 0) {
1079 pm_runtime_put_noidle(&client->dev);
1080 goto err_unlock;
1081 }
1082
1083 /*
1084 * Apply default & customized values
1085 * and then start streaming.
1086 */
1087 ret = imx219_start_streaming(imx219);
1088 if (ret)
1089 goto err_rpm_put;
1090 } else {
1091 imx219_stop_streaming(imx219);
1092 pm_runtime_put(&client->dev);
1093 }
1094
1095 imx219->streaming = enable;
1096
1097 /* vflip and hflip cannot change during streaming */
1098 __v4l2_ctrl_grab(imx219->vflip, enable);
1099 __v4l2_ctrl_grab(imx219->hflip, enable);
1100
1101 mutex_unlock(&imx219->mutex);
1102
1103 return ret;
1104
1105 err_rpm_put:
1106 pm_runtime_put(&client->dev);
1107 err_unlock:
1108 mutex_unlock(&imx219->mutex);
1109
1110 return ret;
1111 }
1112
1113 /* Power/clock management functions */
1114 static int imx219_power_on(struct device *dev)
1115 {
1116 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1117 struct imx219 *imx219 = to_imx219(sd);
1118 int ret;
1119
1120 ret = regulator_bulk_enable(IMX219_NUM_SUPPLIES,
1121 imx219->supplies);
1122 if (ret) {
1123 dev_err(dev, "%s: failed to enable regulators\n",
1124 __func__);
1125 return ret;
1126 }
1127
1128 ret = clk_prepare_enable(imx219->xclk);
1129 if (ret) {
1130 dev_err(dev, "%s: failed to enable clock\n",
1131 __func__);
1132 goto reg_off;
1133 }
1134
1135 gpiod_set_value_cansleep(imx219->reset_gpio, 1);
1136 usleep_range(IMX219_XCLR_MIN_DELAY_US,
1137 IMX219_XCLR_MIN_DELAY_US + IMX219_XCLR_DELAY_RANGE_US);
1138
1139 return 0;
1140
1141 reg_off:
1142 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
1143
1144 return ret;
1145 }
1146
1147 static int imx219_power_off(struct device *dev)
1148 {
1149 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1150 struct imx219 *imx219 = to_imx219(sd);
1151
1152 gpiod_set_value_cansleep(imx219->reset_gpio, 0);
1153 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
1154 clk_disable_unprepare(imx219->xclk);
1155
1156 return 0;
1157 }
1158
1159 static int __maybe_unused imx219_suspend(struct device *dev)
1160 {
1161 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1162 struct imx219 *imx219 = to_imx219(sd);
1163
1164 if (imx219->streaming)
1165 imx219_stop_streaming(imx219);
1166
1167 return 0;
1168 }
1169
1170 static int __maybe_unused imx219_resume(struct device *dev)
1171 {
1172 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1173 struct imx219 *imx219 = to_imx219(sd);
1174 int ret;
1175
1176 if (imx219->streaming) {
1177 ret = imx219_start_streaming(imx219);
1178 if (ret)
1179 goto error;
1180 }
1181
1182 return 0;
1183
1184 error:
1185 imx219_stop_streaming(imx219);
1186 imx219->streaming = false;
1187
1188 return ret;
1189 }
1190
1191 static int imx219_get_regulators(struct imx219 *imx219)
1192 {
1193 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1194 unsigned int i;
1195
1196 for (i = 0; i < IMX219_NUM_SUPPLIES; i++)
1197 imx219->supplies[i].supply = imx219_supply_name[i];
1198
1199 return devm_regulator_bulk_get(&client->dev,
1200 IMX219_NUM_SUPPLIES,
1201 imx219->supplies);
1202 }
1203
1204 /* Verify chip ID */
1205 static int imx219_identify_module(struct imx219 *imx219)
1206 {
1207 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1208 int ret;
1209 u32 val;
1210
1211 ret = imx219_read_reg(imx219, IMX219_REG_CHIP_ID,
1212 IMX219_REG_VALUE_16BIT, &val);
1213 if (ret) {
1214 dev_err(&client->dev, "failed to read chip id %x\n",
1215 IMX219_CHIP_ID);
1216 return ret;
1217 }
1218
1219 if (val != IMX219_CHIP_ID) {
1220 dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
1221 IMX219_CHIP_ID, val);
1222 return -EIO;
1223 }
1224
1225 return 0;
1226 }
1227
1228 static const struct v4l2_subdev_core_ops imx219_core_ops = {
1229 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
1230 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
1231 };
1232
1233 static const struct v4l2_subdev_video_ops imx219_video_ops = {
1234 .s_stream = imx219_set_stream,
1235 };
1236
1237 static const struct v4l2_subdev_pad_ops imx219_pad_ops = {
1238 .enum_mbus_code = imx219_enum_mbus_code,
1239 .get_fmt = imx219_get_pad_format,
1240 .set_fmt = imx219_set_pad_format,
1241 .get_selection = imx219_get_selection,
1242 .enum_frame_size = imx219_enum_frame_size,
1243 };
1244
1245 static const struct v4l2_subdev_ops imx219_subdev_ops = {
1246 .core = &imx219_core_ops,
1247 .video = &imx219_video_ops,
1248 .pad = &imx219_pad_ops,
1249 };
1250
1251 static const struct v4l2_subdev_internal_ops imx219_internal_ops = {
1252 .open = imx219_open,
1253 };
1254
1255 /* Initialize control handlers */
1256 static int imx219_init_controls(struct imx219 *imx219)
1257 {
1258 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1259 struct v4l2_ctrl_handler *ctrl_hdlr;
1260 unsigned int height = imx219->mode->height;
1261 struct v4l2_fwnode_device_properties props;
1262 int exposure_max, exposure_def, hblank;
1263 int i, ret;
1264
1265 ctrl_hdlr = &imx219->ctrl_handler;
1266 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 11);
1267 if (ret)
1268 return ret;
1269
1270 mutex_init(&imx219->mutex);
1271 ctrl_hdlr->lock = &imx219->mutex;
1272
1273 /* By default, PIXEL_RATE is read only */
1274 imx219->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1275 V4L2_CID_PIXEL_RATE,
1276 IMX219_PIXEL_RATE,
1277 IMX219_PIXEL_RATE, 1,
1278 IMX219_PIXEL_RATE);
1279
1280 /* Initial vblank/hblank/exposure parameters based on current mode */
1281 imx219->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1282 V4L2_CID_VBLANK, IMX219_VBLANK_MIN,
1283 IMX219_VTS_MAX - height, 1,
1284 imx219->mode->vts_def - height);
1285 hblank = IMX219_PPL_DEFAULT - imx219->mode->width;
1286 imx219->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1287 V4L2_CID_HBLANK, hblank, hblank,
1288 1, hblank);
1289 if (imx219->hblank)
1290 imx219->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1291 exposure_max = imx219->mode->vts_def - 4;
1292 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
1293 exposure_max : IMX219_EXPOSURE_DEFAULT;
1294 imx219->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1295 V4L2_CID_EXPOSURE,
1296 IMX219_EXPOSURE_MIN, exposure_max,
1297 IMX219_EXPOSURE_STEP,
1298 exposure_def);
1299
1300 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1301 IMX219_ANA_GAIN_MIN, IMX219_ANA_GAIN_MAX,
1302 IMX219_ANA_GAIN_STEP, IMX219_ANA_GAIN_DEFAULT);
1303
1304 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1305 IMX219_DGTL_GAIN_MIN, IMX219_DGTL_GAIN_MAX,
1306 IMX219_DGTL_GAIN_STEP, IMX219_DGTL_GAIN_DEFAULT);
1307
1308 imx219->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1309 V4L2_CID_HFLIP, 0, 1, 1, 0);
1310 if (imx219->hflip)
1311 imx219->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1312
1313 imx219->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1314 V4L2_CID_VFLIP, 0, 1, 1, 0);
1315 if (imx219->vflip)
1316 imx219->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1317
1318 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx219_ctrl_ops,
1319 V4L2_CID_TEST_PATTERN,
1320 ARRAY_SIZE(imx219_test_pattern_menu) - 1,
1321 0, 0, imx219_test_pattern_menu);
1322 for (i = 0; i < 4; i++) {
1323 /*
1324 * The assumption is that
1325 * V4L2_CID_TEST_PATTERN_GREENR == V4L2_CID_TEST_PATTERN_RED + 1
1326 * V4L2_CID_TEST_PATTERN_BLUE == V4L2_CID_TEST_PATTERN_RED + 2
1327 * V4L2_CID_TEST_PATTERN_GREENB == V4L2_CID_TEST_PATTERN_RED + 3
1328 */
1329 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1330 V4L2_CID_TEST_PATTERN_RED + i,
1331 IMX219_TESTP_COLOUR_MIN,
1332 IMX219_TESTP_COLOUR_MAX,
1333 IMX219_TESTP_COLOUR_STEP,
1334 IMX219_TESTP_COLOUR_MAX);
1335 /* The "Solid color" pattern is white by default */
1336 }
1337
1338 if (ctrl_hdlr->error) {
1339 ret = ctrl_hdlr->error;
1340 dev_err(&client->dev, "%s control init failed (%d)\n",
1341 __func__, ret);
1342 goto error;
1343 }
1344
1345 ret = v4l2_fwnode_device_parse(&client->dev, &props);
1346 if (ret)
1347 goto error;
1348
1349 ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx219_ctrl_ops,
1350 &props);
1351 if (ret)
1352 goto error;
1353
1354 imx219->sd.ctrl_handler = ctrl_hdlr;
1355
1356 return 0;
1357
1358 error:
1359 v4l2_ctrl_handler_free(ctrl_hdlr);
1360 mutex_destroy(&imx219->mutex);
1361
1362 return ret;
1363 }
1364
1365 static void imx219_free_controls(struct imx219 *imx219)
1366 {
1367 v4l2_ctrl_handler_free(imx219->sd.ctrl_handler);
1368 mutex_destroy(&imx219->mutex);
1369 }
1370
1371 static int imx219_check_hwcfg(struct device *dev)
1372 {
1373 struct fwnode_handle *endpoint;
1374 struct v4l2_fwnode_endpoint ep_cfg = {
1375 .bus_type = V4L2_MBUS_CSI2_DPHY
1376 };
1377 int ret = -EINVAL;
1378
1379 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
1380 if (!endpoint) {
1381 dev_err(dev, "endpoint node not found\n");
1382 return -EINVAL;
1383 }
1384
1385 if (v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep_cfg)) {
1386 dev_err(dev, "could not parse endpoint\n");
1387 goto error_out;
1388 }
1389
1390 /* Check the number of MIPI CSI2 data lanes */
1391 if (ep_cfg.bus.mipi_csi2.num_data_lanes != 2) {
1392 dev_err(dev, "only 2 data lanes are currently supported\n");
1393 goto error_out;
1394 }
1395
1396 /* Check the link frequency set in device tree */
1397 if (!ep_cfg.nr_of_link_frequencies) {
1398 dev_err(dev, "link-frequency property not found in DT\n");
1399 goto error_out;
1400 }
1401
1402 if (ep_cfg.nr_of_link_frequencies != 1 ||
1403 ep_cfg.link_frequencies[0] != IMX219_DEFAULT_LINK_FREQ) {
1404 dev_err(dev, "Link frequency not supported: %lld\n",
1405 ep_cfg.link_frequencies[0]);
1406 goto error_out;
1407 }
1408
1409 ret = 0;
1410
1411 error_out:
1412 v4l2_fwnode_endpoint_free(&ep_cfg);
1413 fwnode_handle_put(endpoint);
1414
1415 return ret;
1416 }
1417
1418 static int imx219_probe(struct i2c_client *client)
1419 {
1420 struct device *dev = &client->dev;
1421 struct imx219 *imx219;
1422 int ret;
1423
1424 imx219 = devm_kzalloc(&client->dev, sizeof(*imx219), GFP_KERNEL);
1425 if (!imx219)
1426 return -ENOMEM;
1427
1428 v4l2_i2c_subdev_init(&imx219->sd, client, &imx219_subdev_ops);
1429
1430 /* Check the hardware configuration in device tree */
1431 if (imx219_check_hwcfg(dev))
1432 return -EINVAL;
1433
1434 /* Get system clock (xclk) */
1435 imx219->xclk = devm_clk_get(dev, NULL);
1436 if (IS_ERR(imx219->xclk)) {
1437 dev_err(dev, "failed to get xclk\n");
1438 return PTR_ERR(imx219->xclk);
1439 }
1440
1441 imx219->xclk_freq = clk_get_rate(imx219->xclk);
1442 if (imx219->xclk_freq != IMX219_XCLK_FREQ) {
1443 dev_err(dev, "xclk frequency not supported: %d Hz\n",
1444 imx219->xclk_freq);
1445 return -EINVAL;
1446 }
1447
1448 ret = imx219_get_regulators(imx219);
1449 if (ret) {
1450 dev_err(dev, "failed to get regulators\n");
1451 return ret;
1452 }
1453
1454 /* Request optional enable pin */
1455 imx219->reset_gpio = devm_gpiod_get_optional(dev, "reset",
1456 GPIOD_OUT_HIGH);
1457
1458 /*
1459 * The sensor must be powered for imx219_identify_module()
1460 * to be able to read the CHIP_ID register
1461 */
1462 ret = imx219_power_on(dev);
1463 if (ret)
1464 return ret;
1465
1466 ret = imx219_identify_module(imx219);
1467 if (ret)
1468 goto error_power_off;
1469
1470 /* Set default mode to max resolution */
1471 imx219->mode = &supported_modes[0];
1472
1473 /* sensor doesn't enter LP-11 state upon power up until and unless
1474 * streaming is started, so upon power up switch the modes to:
1475 * streaming -> standby
1476 */
1477 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1478 IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING);
1479 if (ret < 0)
1480 goto error_power_off;
1481 usleep_range(100, 110);
1482
1483 /* put sensor back to standby mode */
1484 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1485 IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY);
1486 if (ret < 0)
1487 goto error_power_off;
1488 usleep_range(100, 110);
1489
1490 ret = imx219_init_controls(imx219);
1491 if (ret)
1492 goto error_power_off;
1493
1494 /* Initialize subdev */
1495 imx219->sd.internal_ops = &imx219_internal_ops;
1496 imx219->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1497 V4L2_SUBDEV_FL_HAS_EVENTS;
1498 imx219->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1499
1500 /* Initialize source pad */
1501 imx219->pad.flags = MEDIA_PAD_FL_SOURCE;
1502
1503 /* Initialize default format */
1504 imx219_set_default_format(imx219);
1505
1506 ret = media_entity_pads_init(&imx219->sd.entity, 1, &imx219->pad);
1507 if (ret) {
1508 dev_err(dev, "failed to init entity pads: %d\n", ret);
1509 goto error_handler_free;
1510 }
1511
1512 ret = v4l2_async_register_subdev_sensor_common(&imx219->sd);
1513 if (ret < 0) {
1514 dev_err(dev, "failed to register sensor sub-device: %d\n", ret);
1515 goto error_media_entity;
1516 }
1517
1518 /* Enable runtime PM and turn off the device */
1519 pm_runtime_set_active(dev);
1520 pm_runtime_enable(dev);
1521 pm_runtime_idle(dev);
1522
1523 return 0;
1524
1525 error_media_entity:
1526 media_entity_cleanup(&imx219->sd.entity);
1527
1528 error_handler_free:
1529 imx219_free_controls(imx219);
1530
1531 error_power_off:
1532 imx219_power_off(dev);
1533
1534 return ret;
1535 }
1536
1537 static int imx219_remove(struct i2c_client *client)
1538 {
1539 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1540 struct imx219 *imx219 = to_imx219(sd);
1541
1542 v4l2_async_unregister_subdev(sd);
1543 media_entity_cleanup(&sd->entity);
1544 imx219_free_controls(imx219);
1545
1546 pm_runtime_disable(&client->dev);
1547 if (!pm_runtime_status_suspended(&client->dev))
1548 imx219_power_off(&client->dev);
1549 pm_runtime_set_suspended(&client->dev);
1550
1551 return 0;
1552 }
1553
1554 static const struct of_device_id imx219_dt_ids[] = {
1555 { .compatible = "sony,imx219" },
1556 { /* sentinel */ }
1557 };
1558 MODULE_DEVICE_TABLE(of, imx219_dt_ids);
1559
1560 static const struct dev_pm_ops imx219_pm_ops = {
1561 SET_SYSTEM_SLEEP_PM_OPS(imx219_suspend, imx219_resume)
1562 SET_RUNTIME_PM_OPS(imx219_power_off, imx219_power_on, NULL)
1563 };
1564
1565 static struct i2c_driver imx219_i2c_driver = {
1566 .driver = {
1567 .name = "imx219",
1568 .of_match_table = imx219_dt_ids,
1569 .pm = &imx219_pm_ops,
1570 },
1571 .probe_new = imx219_probe,
1572 .remove = imx219_remove,
1573 };
1574
1575 module_i2c_driver(imx219_i2c_driver);
1576
1577 MODULE_AUTHOR("Dave Stevenson <dave.stevenson@raspberrypi.com");
1578 MODULE_DESCRIPTION("Sony IMX219 sensor driver");
1579 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support