WIP FPC-III support
[linux/fpc-iii.git] / drivers / media / pci / ddbridge / ddbridge-mci.h
blob24241111c634a98c7be6690f185d5bcee473c710
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * ddbridge-mci.h: Digital Devices micro code interface
5 * Copyright (C) 2017-2018 Digital Devices GmbH
6 * Marcus Metzler <mocm@metzlerbros.de>
7 * Ralph Metzler <rjkm@metzlerbros.de>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 only, as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 #ifndef _DDBRIDGE_MCI_H_
20 #define _DDBRIDGE_MCI_H_
22 #define MCI_DEMOD_MAX 8
23 #define MCI_TUNER_MAX 4
24 #define DEMOD_UNUSED (0xFF)
26 #define MCI_CONTROL (0x500)
27 #define MCI_COMMAND (0x600)
28 #define MCI_RESULT (0x680)
30 #define MCI_COMMAND_SIZE (0x80)
31 #define MCI_RESULT_SIZE (0x80)
33 #define MCI_CONTROL_START_COMMAND (0x00000001)
34 #define MCI_CONTROL_ENABLE_DONE_INTERRUPT (0x00000002)
35 #define MCI_CONTROL_RESET (0x00008000)
36 #define MCI_CONTROL_READY (0x00010000)
38 #define SX8_TSCONFIG (0x280)
40 #define SX8_TSCONFIG_MODE_MASK (0x00000003)
41 #define SX8_TSCONFIG_MODE_OFF (0x00000000)
42 #define SX8_TSCONFIG_MODE_NORMAL (0x00000001)
43 #define SX8_TSCONFIG_MODE_IQ (0x00000003)
46 * IQMode is only available on MaxSX8 on a single tuner
48 * IQ_MODE_SAMPLES
49 * sampling rate is 1550/24 MHz (64.583 MHz)
50 * channel agc is frozen, to allow stitching the FFT results together
52 * IQ_MODE_VTM
53 * sampling rate is the supplied symbolrate
54 * channel agc is active
56 * in both cases down sampling is done with a RRC Filter (currently fixed to
57 * alpha = 0.05) which causes some (ca 5%) aliasing at the edges from
58 * outside the spectrum
61 #define SX8_TSCONFIG_TSHEADER (0x00000004)
62 #define SX8_TSCONFIG_BURST (0x00000008)
64 #define SX8_TSCONFIG_BURSTSIZE_MASK (0x00000030)
65 #define SX8_TSCONFIG_BURSTSIZE_2K (0x00000000)
66 #define SX8_TSCONFIG_BURSTSIZE_4K (0x00000010)
67 #define SX8_TSCONFIG_BURSTSIZE_8K (0x00000020)
68 #define SX8_TSCONFIG_BURSTSIZE_16K (0x00000030)
70 #define SX8_DEMOD_STOPPED (0)
71 #define SX8_DEMOD_IQ_MODE (1)
72 #define SX8_DEMOD_WAIT_SIGNAL (2)
73 #define SX8_DEMOD_WAIT_MATYPE (3)
74 #define SX8_DEMOD_TIMEOUT (14)
75 #define SX8_DEMOD_LOCKED (15)
77 #define MCI_CMD_STOP (0x01)
78 #define MCI_CMD_GETSTATUS (0x02)
79 #define MCI_CMD_GETSIGNALINFO (0x03)
80 #define MCI_CMD_RFPOWER (0x04)
82 #define MCI_CMD_SEARCH_DVBS (0x10)
84 #define MCI_CMD_GET_IQSYMBOL (0x30)
86 #define SX8_CMD_INPUT_ENABLE (0x40)
87 #define SX8_CMD_INPUT_DISABLE (0x41)
88 #define SX8_CMD_START_IQ (0x42)
89 #define SX8_CMD_STOP_IQ (0x43)
90 #define SX8_CMD_ENABLE_IQOUTPUT (0x44)
91 #define SX8_CMD_DISABLE_IQOUTPUT (0x45)
93 #define MCI_STATUS_OK (0x00)
94 #define MCI_STATUS_UNSUPPORTED (0x80)
95 #define MCI_STATUS_RETRY (0xFD)
96 #define MCI_STATUS_NOT_READY (0xFE)
97 #define MCI_STATUS_ERROR (0xFF)
99 #define MCI_SUCCESS(status) ((status & MCI_STATUS_UNSUPPORTED) == 0)
101 struct mci_command {
102 union {
103 u32 command_word;
104 struct {
105 u8 command;
106 u8 tuner;
107 u8 demod;
108 u8 output;
111 union {
112 u32 params[31];
113 struct {
115 * Bit 0: DVB-S Enabled
116 * Bit 1: DVB-S2 Enabled
117 * Bit 7: InputStreamID
119 u8 flags;
121 * Bit 0: QPSK,
122 * Bit 1: 8PSK/8APSK
123 * Bit 2: 16APSK
124 * Bit 3: 32APSK
125 * Bit 4: 64APSK
126 * Bit 5: 128APSK
127 * Bit 6: 256APSK
129 u8 s2_modulation_mask;
130 u8 rsvd1;
131 u8 retry;
132 u32 frequency;
133 u32 symbol_rate;
134 u8 input_stream_id;
135 u8 rsvd2[3];
136 u32 scrambling_sequence_index;
137 u32 frequency_range;
138 } dvbs2_search;
140 struct {
141 u8 tap;
142 u8 rsvd;
143 u16 point;
144 } get_iq_symbol;
146 struct {
148 * Bit 0: 0=VTM/1=SCAN
149 * Bit 1: Set Gain
151 u8 flags;
152 u8 roll_off;
153 u8 rsvd1;
154 u8 rsvd2;
155 u32 frequency;
156 u32 symbol_rate; /* Only in VTM mode */
157 u16 gain;
158 } sx8_start_iq;
160 struct {
162 * Bit 1:0 = STVVGLNA Gain.
163 * 0 = AGC, 1 = 0dB, 2 = Minimum, 3 = Maximum
165 u8 flags;
166 } sx8_input_enable;
170 struct mci_result {
171 union {
172 u32 status_word;
173 struct {
174 u8 status;
175 u8 mode;
176 u16 time;
179 union {
180 u32 result[27];
181 struct {
182 /* 1 = DVB-S, 2 = DVB-S2X */
183 u8 standard;
184 /* puncture rate for DVB-S */
185 u8 pls_code;
186 /* 2-0: rolloff */
187 u8 roll_off;
188 u8 rsvd;
189 /* actual frequency in Hz */
190 u32 frequency;
191 /* actual symbolrate in Hz */
192 u32 symbol_rate;
193 /* channel power in dBm x 100 */
194 s16 channel_power;
195 /* band power in dBm x 100 */
196 s16 band_power;
198 * SNR in dB x 100
199 * Note: negative values are valid in DVB-S2
201 s16 signal_to_noise;
202 s16 rsvd2;
204 * Counter for packet errors
205 * (set to 0 on start command)
207 u32 packet_errors;
208 /* Bit error rate: PreRS in DVB-S, PreBCH in DVB-S2X */
209 u32 ber_numerator;
210 u32 ber_denominator;
211 } dvbs2_signal_info;
213 struct {
214 s16 i;
215 s16 q;
216 } iq_symbol;
218 u32 version[4];
221 struct mci_base {
222 struct list_head mci_list;
223 void *key;
224 struct ddb_link *link;
225 struct completion completion;
226 struct device *dev;
227 struct mutex tuner_lock; /* concurrent tuner access lock */
228 struct mutex mci_lock; /* concurrent MCI access lock */
229 int count;
230 int type;
233 struct mci {
234 struct mci_base *base;
235 struct dvb_frontend fe;
236 int nr;
237 int demod;
238 int tuner;
241 struct mci_cfg {
242 int type;
243 struct dvb_frontend_ops *fe_ops;
244 u32 base_size;
245 u32 state_size;
246 int (*init)(struct mci *mci);
247 int (*base_init)(struct mci_base *mci_base);
248 int (*set_input)(struct dvb_frontend *fe, int input);
251 /* defined in ddbridge-sx8.c */
252 extern const struct mci_cfg ddb_max_sx8_cfg;
254 int ddb_mci_cmd(struct mci *state, struct mci_command *command,
255 struct mci_result *result);
256 int ddb_mci_config(struct mci *state, u32 config);
258 struct dvb_frontend
259 *ddb_mci_attach(struct ddb_input *input, struct mci_cfg *cfg, int nr,
260 int (**fn_set_input)(struct dvb_frontend *fe, int input));
262 #endif /* _DDBRIDGE_MCI_H_ */