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WIP FPC-III support
[linux/fpc-iii.git] / drivers / media / platform / s5p-mfc / s5p_mfc_dec.c
bloba71753d459baead5624fe6e60645bfcfee0a8310
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * linux/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c
4 *
5 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com/
7 * Kamil Debski, <k.debski@samsung.com>
8 */
9
10 #include <linux/clk.h>
11 #include <linux/interrupt.h>
12 #include <linux/io.h>
13 #include <linux/module.h>
14 #include <linux/platform_device.h>
15 #include <linux/sched.h>
16 #include <linux/slab.h>
17 #include <linux/videodev2.h>
18 #include <linux/workqueue.h>
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-event.h>
21 #include <media/videobuf2-v4l2.h>
22 #include "s5p_mfc_common.h"
23 #include "s5p_mfc_ctrl.h"
24 #include "s5p_mfc_debug.h"
25 #include "s5p_mfc_dec.h"
26 #include "s5p_mfc_intr.h"
27 #include "s5p_mfc_opr.h"
28 #include "s5p_mfc_pm.h"
29
30 static struct s5p_mfc_fmt formats[] = {
31 {
32 .fourcc = V4L2_PIX_FMT_NV12MT_16X16,
33 .codec_mode = S5P_MFC_CODEC_NONE,
34 .type = MFC_FMT_RAW,
35 .num_planes = 2,
36 .versions = MFC_V6_BIT | MFC_V7_BIT,
37 },
38 {
39 .fourcc = V4L2_PIX_FMT_NV12MT,
40 .codec_mode = S5P_MFC_CODEC_NONE,
41 .type = MFC_FMT_RAW,
42 .num_planes = 2,
43 .versions = MFC_V5_BIT,
44 },
45 {
46 .fourcc = V4L2_PIX_FMT_NV12M,
47 .codec_mode = S5P_MFC_CODEC_NONE,
48 .type = MFC_FMT_RAW,
49 .num_planes = 2,
50 .versions = MFC_V6PLUS_BITS,
51 },
52 {
53 .fourcc = V4L2_PIX_FMT_NV21M,
54 .codec_mode = S5P_MFC_CODEC_NONE,
55 .type = MFC_FMT_RAW,
56 .num_planes = 2,
57 .versions = MFC_V6PLUS_BITS,
58 },
59 {
60 .fourcc = V4L2_PIX_FMT_H264,
61 .codec_mode = S5P_MFC_CODEC_H264_DEC,
62 .type = MFC_FMT_DEC,
63 .num_planes = 1,
64 .versions = MFC_V5PLUS_BITS,
65 },
66 {
67 .fourcc = V4L2_PIX_FMT_H264_MVC,
68 .codec_mode = S5P_MFC_CODEC_H264_MVC_DEC,
69 .type = MFC_FMT_DEC,
70 .num_planes = 1,
71 .versions = MFC_V6PLUS_BITS,
72 },
73 {
74 .fourcc = V4L2_PIX_FMT_H263,
75 .codec_mode = S5P_MFC_CODEC_H263_DEC,
76 .type = MFC_FMT_DEC,
77 .num_planes = 1,
78 .versions = MFC_V5PLUS_BITS,
79 },
80 {
81 .fourcc = V4L2_PIX_FMT_MPEG1,
82 .codec_mode = S5P_MFC_CODEC_MPEG2_DEC,
83 .type = MFC_FMT_DEC,
84 .num_planes = 1,
85 .versions = MFC_V5PLUS_BITS,
86 },
87 {
88 .fourcc = V4L2_PIX_FMT_MPEG2,
89 .codec_mode = S5P_MFC_CODEC_MPEG2_DEC,
90 .type = MFC_FMT_DEC,
91 .num_planes = 1,
92 .versions = MFC_V5PLUS_BITS,
93 },
94 {
95 .fourcc = V4L2_PIX_FMT_MPEG4,
96 .codec_mode = S5P_MFC_CODEC_MPEG4_DEC,
97 .type = MFC_FMT_DEC,
98 .num_planes = 1,
99 .versions = MFC_V5PLUS_BITS,
100 },
101 {
102 .fourcc = V4L2_PIX_FMT_XVID,
103 .codec_mode = S5P_MFC_CODEC_MPEG4_DEC,
104 .type = MFC_FMT_DEC,
105 .num_planes = 1,
106 .versions = MFC_V5PLUS_BITS,
107 },
108 {
109 .fourcc = V4L2_PIX_FMT_VC1_ANNEX_G,
110 .codec_mode = S5P_MFC_CODEC_VC1_DEC,
111 .type = MFC_FMT_DEC,
112 .num_planes = 1,
113 .versions = MFC_V5PLUS_BITS,
114 },
115 {
116 .fourcc = V4L2_PIX_FMT_VC1_ANNEX_L,
117 .codec_mode = S5P_MFC_CODEC_VC1RCV_DEC,
118 .type = MFC_FMT_DEC,
119 .num_planes = 1,
120 .versions = MFC_V5PLUS_BITS,
121 },
122 {
123 .fourcc = V4L2_PIX_FMT_VP8,
124 .codec_mode = S5P_MFC_CODEC_VP8_DEC,
125 .type = MFC_FMT_DEC,
126 .num_planes = 1,
127 .versions = MFC_V6PLUS_BITS,
128 },
129 {
130 .fourcc = V4L2_PIX_FMT_HEVC,
131 .codec_mode = S5P_FIMV_CODEC_HEVC_DEC,
132 .type = MFC_FMT_DEC,
133 .num_planes = 1,
134 .versions = MFC_V10_BIT,
135 },
136 {
137 .fourcc = V4L2_PIX_FMT_VP9,
138 .codec_mode = S5P_FIMV_CODEC_VP9_DEC,
139 .type = MFC_FMT_DEC,
140 .num_planes = 1,
141 .versions = MFC_V10_BIT,
142 },
143 };
144
145 #define NUM_FORMATS ARRAY_SIZE(formats)
146
147 /* Find selected format description */
148 static struct s5p_mfc_fmt *find_format(struct v4l2_format *f, unsigned int t)
149 {
150 unsigned int i;
151
152 for (i = 0; i < NUM_FORMATS; i++) {
153 if (formats[i].fourcc == f->fmt.pix_mp.pixelformat &&
154 formats[i].type == t)
155 return &formats[i];
156 }
157 return NULL;
158 }
159
160 static struct mfc_control controls[] = {
161 {
162 .id = V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY,
163 .type = V4L2_CTRL_TYPE_INTEGER,
164 .name = "H264 Display Delay",
165 .minimum = 0,
166 .maximum = 16383,
167 .step = 1,
168 .default_value = 0,
169 },
170 {
171 .id = V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE,
172 .type = V4L2_CTRL_TYPE_BOOLEAN,
173 .name = "H264 Display Delay Enable",
174 .minimum = 0,
175 .maximum = 1,
176 .step = 1,
177 .default_value = 0,
178 },
179 {
180 .id = V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER,
181 .type = V4L2_CTRL_TYPE_BOOLEAN,
182 .name = "Mpeg4 Loop Filter Enable",
183 .minimum = 0,
184 .maximum = 1,
185 .step = 1,
186 .default_value = 0,
187 },
188 {
189 .id = V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE,
190 .type = V4L2_CTRL_TYPE_BOOLEAN,
191 .name = "Slice Interface Enable",
192 .minimum = 0,
193 .maximum = 1,
194 .step = 1,
195 .default_value = 0,
196 },
197 {
198 .id = V4L2_CID_MIN_BUFFERS_FOR_CAPTURE,
199 .type = V4L2_CTRL_TYPE_INTEGER,
200 .name = "Minimum number of cap bufs",
201 .minimum = 1,
202 .maximum = 32,
203 .step = 1,
204 .default_value = 1,
205 .is_volatile = 1,
206 },
207 };
208
209 #define NUM_CTRLS ARRAY_SIZE(controls)
210
211 /* Check whether a context should be run on hardware */
212 static int s5p_mfc_ctx_ready(struct s5p_mfc_ctx *ctx)
213 {
214 /* Context is to parse header */
215 if (ctx->src_queue_cnt >= 1 && ctx->state == MFCINST_GOT_INST)
216 return 1;
217 /* Context is to decode a frame */
218 if (ctx->src_queue_cnt >= 1 &&
219 ctx->state == MFCINST_RUNNING &&
220 ctx->dst_queue_cnt >= ctx->pb_count)
221 return 1;
222 /* Context is to return last frame */
223 if (ctx->state == MFCINST_FINISHING &&
224 ctx->dst_queue_cnt >= ctx->pb_count)
225 return 1;
226 /* Context is to set buffers */
227 if (ctx->src_queue_cnt >= 1 &&
228 ctx->state == MFCINST_HEAD_PARSED &&
229 ctx->capture_state == QUEUE_BUFS_MMAPED)
230 return 1;
231 /* Resolution change */
232 if ((ctx->state == MFCINST_RES_CHANGE_INIT ||
233 ctx->state == MFCINST_RES_CHANGE_FLUSH) &&
234 ctx->dst_queue_cnt >= ctx->pb_count)
235 return 1;
236 if (ctx->state == MFCINST_RES_CHANGE_END &&
237 ctx->src_queue_cnt >= 1)
238 return 1;
239 mfc_debug(2, "ctx is not ready\n");
240 return 0;
241 }
242
243 static const struct s5p_mfc_codec_ops decoder_codec_ops = {
244 .pre_seq_start = NULL,
245 .post_seq_start = NULL,
246 .pre_frame_start = NULL,
247 .post_frame_start = NULL,
248 };
249
250 /* Query capabilities of the device */
251 static int vidioc_querycap(struct file *file, void *priv,
252 struct v4l2_capability *cap)
253 {
254 struct s5p_mfc_dev *dev = video_drvdata(file);
255
256 strscpy(cap->driver, S5P_MFC_NAME, sizeof(cap->driver));
257 strscpy(cap->card, dev->vfd_dec->name, sizeof(cap->card));
258 snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
259 dev_name(&dev->plat_dev->dev));
260 return 0;
261 }
262
263 /* Enumerate format */
264 static int vidioc_enum_fmt(struct file *file, struct v4l2_fmtdesc *f,
265 bool out)
266 {
267 struct s5p_mfc_dev *dev = video_drvdata(file);
268 int i, j = 0;
269
270 for (i = 0; i < ARRAY_SIZE(formats); ++i) {
271 if (out && formats[i].type != MFC_FMT_DEC)
272 continue;
273 else if (!out && formats[i].type != MFC_FMT_RAW)
274 continue;
275 else if ((dev->variant->version_bit & formats[i].versions) == 0)
276 continue;
277
278 if (j == f->index)
279 break;
280 ++j;
281 }
282 if (i == ARRAY_SIZE(formats))
283 return -EINVAL;
284 f->pixelformat = formats[i].fourcc;
285 return 0;
286 }
287
288 static int vidioc_enum_fmt_vid_cap(struct file *file, void *pirv,
289 struct v4l2_fmtdesc *f)
290 {
291 return vidioc_enum_fmt(file, f, false);
292 }
293
294 static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
295 struct v4l2_fmtdesc *f)
296 {
297 return vidioc_enum_fmt(file, f, true);
298 }
299
300 /* Get format */
301 static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
302 {
303 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
304 struct v4l2_pix_format_mplane *pix_mp;
305
306 mfc_debug_enter();
307 pix_mp = &f->fmt.pix_mp;
308 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE &&
309 (ctx->state == MFCINST_GOT_INST || ctx->state ==
310 MFCINST_RES_CHANGE_END)) {
311 /* If the MFC is parsing the header,
312 * so wait until it is finished */
313 s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_SEQ_DONE_RET,
314 0);
315 }
316 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE &&
317 ctx->state >= MFCINST_HEAD_PARSED &&
318 ctx->state < MFCINST_ABORT) {
319 /* This is run on CAPTURE (decode output) */
320 /* Width and height are set to the dimensions
321 of the movie, the buffer is bigger and
322 further processing stages should crop to this
323 rectangle. */
324 pix_mp->width = ctx->buf_width;
325 pix_mp->height = ctx->buf_height;
326 pix_mp->field = V4L2_FIELD_NONE;
327 pix_mp->num_planes = 2;
328 /* Set pixelformat to the format in which MFC
329 outputs the decoded frame */
330 pix_mp->pixelformat = ctx->dst_fmt->fourcc;
331 pix_mp->plane_fmt[0].bytesperline = ctx->buf_width;
332 pix_mp->plane_fmt[0].sizeimage = ctx->luma_size;
333 pix_mp->plane_fmt[1].bytesperline = ctx->buf_width;
334 pix_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
335 } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
336 /* This is run on OUTPUT
337 The buffer contains compressed image
338 so width and height have no meaning */
339 pix_mp->width = 0;
340 pix_mp->height = 0;
341 pix_mp->field = V4L2_FIELD_NONE;
342 pix_mp->plane_fmt[0].bytesperline = ctx->dec_src_buf_size;
343 pix_mp->plane_fmt[0].sizeimage = ctx->dec_src_buf_size;
344 pix_mp->pixelformat = ctx->src_fmt->fourcc;
345 pix_mp->num_planes = ctx->src_fmt->num_planes;
346 } else {
347 mfc_err("Format could not be read\n");
348 mfc_debug(2, "%s-- with error\n", __func__);
349 return -EINVAL;
350 }
351 mfc_debug_leave();
352 return 0;
353 }
354
355 /* Try format */
356 static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f)
357 {
358 struct s5p_mfc_dev *dev = video_drvdata(file);
359 struct s5p_mfc_fmt *fmt;
360
361 mfc_debug(2, "Type is %d\n", f->type);
362 if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
363 fmt = find_format(f, MFC_FMT_DEC);
364 if (!fmt) {
365 mfc_err("Unsupported format for source.\n");
366 return -EINVAL;
367 }
368 if (fmt->codec_mode == S5P_FIMV_CODEC_NONE) {
369 mfc_err("Unknown codec\n");
370 return -EINVAL;
371 }
372 if ((dev->variant->version_bit & fmt->versions) == 0) {
373 mfc_err("Unsupported format by this MFC version.\n");
374 return -EINVAL;
375 }
376 } else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
377 fmt = find_format(f, MFC_FMT_RAW);
378 if (!fmt) {
379 mfc_err("Unsupported format for destination.\n");
380 return -EINVAL;
381 }
382 if ((dev->variant->version_bit & fmt->versions) == 0) {
383 mfc_err("Unsupported format by this MFC version.\n");
384 return -EINVAL;
385 }
386 }
387
388 return 0;
389 }
390
391 /* Set format */
392 static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f)
393 {
394 struct s5p_mfc_dev *dev = video_drvdata(file);
395 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
396 int ret = 0;
397 struct v4l2_pix_format_mplane *pix_mp;
398 struct s5p_mfc_buf_size *buf_size = dev->variant->buf_size;
399
400 mfc_debug_enter();
401 ret = vidioc_try_fmt(file, priv, f);
402 pix_mp = &f->fmt.pix_mp;
403 if (ret)
404 return ret;
405 if (vb2_is_streaming(&ctx->vq_src) || vb2_is_streaming(&ctx->vq_dst)) {
406 v4l2_err(&dev->v4l2_dev, "%s queue busy\n", __func__);
407 ret = -EBUSY;
408 goto out;
409 }
410 if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
411 /* dst_fmt is validated by call to vidioc_try_fmt */
412 ctx->dst_fmt = find_format(f, MFC_FMT_RAW);
413 ret = 0;
414 goto out;
415 } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
416 /* src_fmt is validated by call to vidioc_try_fmt */
417 ctx->src_fmt = find_format(f, MFC_FMT_DEC);
418 ctx->codec_mode = ctx->src_fmt->codec_mode;
419 mfc_debug(2, "The codec number is: %d\n", ctx->codec_mode);
420 pix_mp->height = 0;
421 pix_mp->width = 0;
422 if (pix_mp->plane_fmt[0].sizeimage == 0)
423 pix_mp->plane_fmt[0].sizeimage = ctx->dec_src_buf_size =
424 DEF_CPB_SIZE;
425 else if (pix_mp->plane_fmt[0].sizeimage > buf_size->cpb)
426 ctx->dec_src_buf_size = buf_size->cpb;
427 else
428 ctx->dec_src_buf_size = pix_mp->plane_fmt[0].sizeimage;
429 pix_mp->plane_fmt[0].bytesperline = 0;
430 ctx->state = MFCINST_INIT;
431 ret = 0;
432 goto out;
433 } else {
434 mfc_err("Wrong type error for S_FMT : %d", f->type);
435 ret = -EINVAL;
436 goto out;
437 }
438
439 out:
440 mfc_debug_leave();
441 return ret;
442 }
443
444 static int reqbufs_output(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx,
445 struct v4l2_requestbuffers *reqbufs)
446 {
447 int ret = 0;
448
449 s5p_mfc_clock_on();
450
451 if (reqbufs->count == 0) {
452 mfc_debug(2, "Freeing buffers\n");
453 ret = vb2_reqbufs(&ctx->vq_src, reqbufs);
454 if (ret)
455 goto out;
456 ctx->src_bufs_cnt = 0;
457 ctx->output_state = QUEUE_FREE;
458 } else if (ctx->output_state == QUEUE_FREE) {
459 /* Can only request buffers when we have a valid format set. */
460 WARN_ON(ctx->src_bufs_cnt != 0);
461 if (ctx->state != MFCINST_INIT) {
462 mfc_err("Reqbufs called in an invalid state\n");
463 ret = -EINVAL;
464 goto out;
465 }
466
467 mfc_debug(2, "Allocating %d buffers for OUTPUT queue\n",
468 reqbufs->count);
469 ret = vb2_reqbufs(&ctx->vq_src, reqbufs);
470 if (ret)
471 goto out;
472
473 ret = s5p_mfc_open_mfc_inst(dev, ctx);
474 if (ret) {
475 reqbufs->count = 0;
476 vb2_reqbufs(&ctx->vq_src, reqbufs);
477 goto out;
478 }
479
480 ctx->output_state = QUEUE_BUFS_REQUESTED;
481 } else {
482 mfc_err("Buffers have already been requested\n");
483 ret = -EINVAL;
484 }
485 out:
486 s5p_mfc_clock_off();
487 if (ret)
488 mfc_err("Failed allocating buffers for OUTPUT queue\n");
489 return ret;
490 }
491
492 static int reqbufs_capture(struct s5p_mfc_dev *dev, struct s5p_mfc_ctx *ctx,
493 struct v4l2_requestbuffers *reqbufs)
494 {
495 int ret = 0;
496
497 s5p_mfc_clock_on();
498
499 if (reqbufs->count == 0) {
500 mfc_debug(2, "Freeing buffers\n");
501 ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
502 if (ret)
503 goto out;
504 s5p_mfc_hw_call(dev->mfc_ops, release_codec_buffers, ctx);
505 ctx->dst_bufs_cnt = 0;
506 } else if (ctx->capture_state == QUEUE_FREE) {
507 WARN_ON(ctx->dst_bufs_cnt != 0);
508 mfc_debug(2, "Allocating %d buffers for CAPTURE queue\n",
509 reqbufs->count);
510 ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
511 if (ret)
512 goto out;
513
514 ctx->capture_state = QUEUE_BUFS_REQUESTED;
515 ctx->total_dpb_count = reqbufs->count;
516
517 ret = s5p_mfc_hw_call(dev->mfc_ops, alloc_codec_buffers, ctx);
518 if (ret) {
519 mfc_err("Failed to allocate decoding buffers\n");
520 reqbufs->count = 0;
521 vb2_reqbufs(&ctx->vq_dst, reqbufs);
522 ret = -ENOMEM;
523 ctx->capture_state = QUEUE_FREE;
524 goto out;
525 }
526
527 WARN_ON(ctx->dst_bufs_cnt != ctx->total_dpb_count);
528 ctx->capture_state = QUEUE_BUFS_MMAPED;
529
530 if (s5p_mfc_ctx_ready(ctx))
531 set_work_bit_irqsave(ctx);
532 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
533 s5p_mfc_wait_for_done_ctx(ctx, S5P_MFC_R2H_CMD_INIT_BUFFERS_RET,
534 0);
535 } else {
536 mfc_err("Buffers have already been requested\n");
537 ret = -EINVAL;
538 }
539 out:
540 s5p_mfc_clock_off();
541 if (ret)
542 mfc_err("Failed allocating buffers for CAPTURE queue\n");
543 return ret;
544 }
545
546 /* Request buffers */
547 static int vidioc_reqbufs(struct file *file, void *priv,
548 struct v4l2_requestbuffers *reqbufs)
549 {
550 struct s5p_mfc_dev *dev = video_drvdata(file);
551 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
552
553 if (reqbufs->memory != V4L2_MEMORY_MMAP) {
554 mfc_debug(2, "Only V4L2_MEMORY_MMAP is supported\n");
555 return -EINVAL;
556 }
557
558 if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
559 return reqbufs_output(dev, ctx, reqbufs);
560 } else if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
561 return reqbufs_capture(dev, ctx, reqbufs);
562 } else {
563 mfc_err("Invalid type requested\n");
564 return -EINVAL;
565 }
566 }
567
568 /* Query buffer */
569 static int vidioc_querybuf(struct file *file, void *priv,
570 struct v4l2_buffer *buf)
571 {
572 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
573 int ret;
574 int i;
575
576 if (buf->memory != V4L2_MEMORY_MMAP) {
577 mfc_err("Only mmapped buffers can be used\n");
578 return -EINVAL;
579 }
580 mfc_debug(2, "State: %d, buf->type: %d\n", ctx->state, buf->type);
581 if (ctx->state == MFCINST_GOT_INST &&
582 buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
583 ret = vb2_querybuf(&ctx->vq_src, buf);
584 } else if (ctx->state == MFCINST_RUNNING &&
585 buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
586 ret = vb2_querybuf(&ctx->vq_dst, buf);
587 for (i = 0; i < buf->length; i++)
588 buf->m.planes[i].m.mem_offset += DST_QUEUE_OFF_BASE;
589 } else {
590 mfc_err("vidioc_querybuf called in an inappropriate state\n");
591 ret = -EINVAL;
592 }
593 mfc_debug_leave();
594 return ret;
595 }
596
597 /* Queue a buffer */
598 static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
599 {
600 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
601
602 if (ctx->state == MFCINST_ERROR) {
603 mfc_err("Call on QBUF after unrecoverable error\n");
604 return -EIO;
605 }
606 if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
607 return vb2_qbuf(&ctx->vq_src, NULL, buf);
608 else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
609 return vb2_qbuf(&ctx->vq_dst, NULL, buf);
610 return -EINVAL;
611 }
612
613 /* Dequeue a buffer */
614 static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
615 {
616 const struct v4l2_event ev = {
617 .type = V4L2_EVENT_EOS
618 };
619 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
620 int ret;
621
622 if (ctx->state == MFCINST_ERROR) {
623 mfc_err_limited("Call on DQBUF after unrecoverable error\n");
624 return -EIO;
625 }
626
627 switch (buf->type) {
628 case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
629 return vb2_dqbuf(&ctx->vq_src, buf, file->f_flags & O_NONBLOCK);
630 case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
631 ret = vb2_dqbuf(&ctx->vq_dst, buf, file->f_flags & O_NONBLOCK);
632 if (ret)
633 return ret;
634
635 if (ctx->state == MFCINST_FINISHED &&
636 (ctx->dst_bufs[buf->index].flags & MFC_BUF_FLAG_EOS))
637 v4l2_event_queue_fh(&ctx->fh, &ev);
638 return 0;
639 default:
640 return -EINVAL;
641 }
642 }
643
644 /* Export DMA buffer */
645 static int vidioc_expbuf(struct file *file, void *priv,
646 struct v4l2_exportbuffer *eb)
647 {
648 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
649
650 if (eb->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
651 return vb2_expbuf(&ctx->vq_src, eb);
652 if (eb->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
653 return vb2_expbuf(&ctx->vq_dst, eb);
654 return -EINVAL;
655 }
656
657 /* Stream on */
658 static int vidioc_streamon(struct file *file, void *priv,
659 enum v4l2_buf_type type)
660 {
661 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
662 int ret = -EINVAL;
663
664 mfc_debug_enter();
665 if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
666 ret = vb2_streamon(&ctx->vq_src, type);
667 else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
668 ret = vb2_streamon(&ctx->vq_dst, type);
669 mfc_debug_leave();
670 return ret;
671 }
672
673 /* Stream off, which equals to a pause */
674 static int vidioc_streamoff(struct file *file, void *priv,
675 enum v4l2_buf_type type)
676 {
677 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
678
679 if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
680 return vb2_streamoff(&ctx->vq_src, type);
681 else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
682 return vb2_streamoff(&ctx->vq_dst, type);
683 return -EINVAL;
684 }
685
686 /* Set controls - v4l2 control framework */
687 static int s5p_mfc_dec_s_ctrl(struct v4l2_ctrl *ctrl)
688 {
689 struct s5p_mfc_ctx *ctx = ctrl_to_ctx(ctrl);
690
691 switch (ctrl->id) {
692 case V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY:
693 ctx->display_delay = ctrl->val;
694 break;
695 case V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE:
696 ctx->display_delay_enable = ctrl->val;
697 break;
698 case V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER:
699 ctx->loop_filter_mpeg4 = ctrl->val;
700 break;
701 case V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE:
702 ctx->slice_interface = ctrl->val;
703 break;
704 default:
705 mfc_err("Invalid control 0x%08x\n", ctrl->id);
706 return -EINVAL;
707 }
708 return 0;
709 }
710
711 static int s5p_mfc_dec_g_v_ctrl(struct v4l2_ctrl *ctrl)
712 {
713 struct s5p_mfc_ctx *ctx = ctrl_to_ctx(ctrl);
714 struct s5p_mfc_dev *dev = ctx->dev;
715
716 switch (ctrl->id) {
717 case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE:
718 if (ctx->state >= MFCINST_HEAD_PARSED &&
719 ctx->state < MFCINST_ABORT) {
720 ctrl->val = ctx->pb_count;
721 break;
722 } else if (ctx->state != MFCINST_INIT &&
723 ctx->state != MFCINST_RES_CHANGE_END) {
724 v4l2_err(&dev->v4l2_dev, "Decoding not initialised\n");
725 return -EINVAL;
726 }
727 /* Should wait for the header to be parsed */
728 s5p_mfc_wait_for_done_ctx(ctx,
729 S5P_MFC_R2H_CMD_SEQ_DONE_RET, 0);
730 if (ctx->state >= MFCINST_HEAD_PARSED &&
731 ctx->state < MFCINST_ABORT) {
732 ctrl->val = ctx->pb_count;
733 } else {
734 v4l2_err(&dev->v4l2_dev, "Decoding not initialised\n");
735 return -EINVAL;
736 }
737 break;
738 }
739 return 0;
740 }
741
742
743 static const struct v4l2_ctrl_ops s5p_mfc_dec_ctrl_ops = {
744 .s_ctrl = s5p_mfc_dec_s_ctrl,
745 .g_volatile_ctrl = s5p_mfc_dec_g_v_ctrl,
746 };
747
748 /* Get compose information */
749 static int vidioc_g_selection(struct file *file, void *priv,
750 struct v4l2_selection *s)
751 {
752 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
753 struct s5p_mfc_dev *dev = ctx->dev;
754 u32 left, right, top, bottom;
755 u32 width, height;
756
757 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
758 return -EINVAL;
759
760 if (ctx->state != MFCINST_HEAD_PARSED &&
761 ctx->state != MFCINST_RUNNING &&
762 ctx->state != MFCINST_FINISHING &&
763 ctx->state != MFCINST_FINISHED) {
764 mfc_err("Can not get compose information\n");
765 return -EINVAL;
766 }
767 if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_H264) {
768 left = s5p_mfc_hw_call(dev->mfc_ops, get_crop_info_h, ctx);
769 right = left >> S5P_FIMV_SHARED_CROP_RIGHT_SHIFT;
770 left = left & S5P_FIMV_SHARED_CROP_LEFT_MASK;
771 top = s5p_mfc_hw_call(dev->mfc_ops, get_crop_info_v, ctx);
772 bottom = top >> S5P_FIMV_SHARED_CROP_BOTTOM_SHIFT;
773 top = top & S5P_FIMV_SHARED_CROP_TOP_MASK;
774 width = ctx->img_width - left - right;
775 height = ctx->img_height - top - bottom;
776 mfc_debug(2, "Composing info [h264]: l=%d t=%d w=%d h=%d (r=%d b=%d fw=%d fh=%d\n",
777 left, top, s->r.width, s->r.height, right, bottom,
778 ctx->buf_width, ctx->buf_height);
779 } else {
780 left = 0;
781 top = 0;
782 width = ctx->img_width;
783 height = ctx->img_height;
784 mfc_debug(2, "Composing info: w=%d h=%d fw=%d fh=%d\n",
785 s->r.width, s->r.height, ctx->buf_width,
786 ctx->buf_height);
787 }
788
789 switch (s->target) {
790 case V4L2_SEL_TGT_COMPOSE:
791 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
792 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
793 s->r.left = left;
794 s->r.top = top;
795 s->r.width = width;
796 s->r.height = height;
797 break;
798 default:
799 return -EINVAL;
800 }
801 return 0;
802 }
803
804 static int vidioc_decoder_cmd(struct file *file, void *priv,
805 struct v4l2_decoder_cmd *cmd)
806 {
807 struct s5p_mfc_ctx *ctx = fh_to_ctx(priv);
808 struct s5p_mfc_dev *dev = ctx->dev;
809 struct s5p_mfc_buf *buf;
810 unsigned long flags;
811
812 switch (cmd->cmd) {
813 case V4L2_DEC_CMD_STOP:
814 if (cmd->flags != 0)
815 return -EINVAL;
816
817 if (!vb2_is_streaming(&ctx->vq_src))
818 return -EINVAL;
819
820 spin_lock_irqsave(&dev->irqlock, flags);
821 if (list_empty(&ctx->src_queue)) {
822 mfc_err("EOS: empty src queue, entering finishing state");
823 ctx->state = MFCINST_FINISHING;
824 if (s5p_mfc_ctx_ready(ctx))
825 set_work_bit_irqsave(ctx);
826 spin_unlock_irqrestore(&dev->irqlock, flags);
827 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
828 } else {
829 mfc_err("EOS: marking last buffer of stream");
830 buf = list_entry(ctx->src_queue.prev,
831 struct s5p_mfc_buf, list);
832 if (buf->flags & MFC_BUF_FLAG_USED)
833 ctx->state = MFCINST_FINISHING;
834 else
835 buf->flags |= MFC_BUF_FLAG_EOS;
836 spin_unlock_irqrestore(&dev->irqlock, flags);
837 }
838 break;
839 default:
840 return -EINVAL;
841 }
842 return 0;
843 }
844
845 static int vidioc_subscribe_event(struct v4l2_fh *fh,
846 const struct v4l2_event_subscription *sub)
847 {
848 switch (sub->type) {
849 case V4L2_EVENT_EOS:
850 return v4l2_event_subscribe(fh, sub, 2, NULL);
851 case V4L2_EVENT_SOURCE_CHANGE:
852 return v4l2_src_change_event_subscribe(fh, sub);
853 default:
854 return -EINVAL;
855 }
856 }
857
858
859 /* v4l2_ioctl_ops */
860 static const struct v4l2_ioctl_ops s5p_mfc_dec_ioctl_ops = {
861 .vidioc_querycap = vidioc_querycap,
862 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
863 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
864 .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt,
865 .vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt,
866 .vidioc_try_fmt_vid_cap_mplane = vidioc_try_fmt,
867 .vidioc_try_fmt_vid_out_mplane = vidioc_try_fmt,
868 .vidioc_s_fmt_vid_cap_mplane = vidioc_s_fmt,
869 .vidioc_s_fmt_vid_out_mplane = vidioc_s_fmt,
870 .vidioc_reqbufs = vidioc_reqbufs,
871 .vidioc_querybuf = vidioc_querybuf,
872 .vidioc_qbuf = vidioc_qbuf,
873 .vidioc_dqbuf = vidioc_dqbuf,
874 .vidioc_expbuf = vidioc_expbuf,
875 .vidioc_streamon = vidioc_streamon,
876 .vidioc_streamoff = vidioc_streamoff,
877 .vidioc_g_selection = vidioc_g_selection,
878 .vidioc_decoder_cmd = vidioc_decoder_cmd,
879 .vidioc_subscribe_event = vidioc_subscribe_event,
880 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
881 };
882
883 static int s5p_mfc_queue_setup(struct vb2_queue *vq,
884 unsigned int *buf_count,
885 unsigned int *plane_count, unsigned int psize[],
886 struct device *alloc_devs[])
887 {
888 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
889 struct s5p_mfc_dev *dev = ctx->dev;
890
891 /* Video output for decoding (source)
892 * this can be set after getting an instance */
893 if (ctx->state == MFCINST_INIT &&
894 vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
895 /* A single plane is required for input */
896 *plane_count = 1;
897 if (*buf_count < 1)
898 *buf_count = 1;
899 if (*buf_count > MFC_MAX_BUFFERS)
900 *buf_count = MFC_MAX_BUFFERS;
901 /* Video capture for decoding (destination)
902 * this can be set after the header was parsed */
903 } else if (ctx->state == MFCINST_HEAD_PARSED &&
904 vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
905 /* Output plane count is 2 - one for Y and one for CbCr */
906 *plane_count = 2;
907 /* Setup buffer count */
908 if (*buf_count < ctx->pb_count)
909 *buf_count = ctx->pb_count;
910 if (*buf_count > ctx->pb_count + MFC_MAX_EXTRA_DPB)
911 *buf_count = ctx->pb_count + MFC_MAX_EXTRA_DPB;
912 if (*buf_count > MFC_MAX_BUFFERS)
913 *buf_count = MFC_MAX_BUFFERS;
914 } else {
915 mfc_err("State seems invalid. State = %d, vq->type = %d\n",
916 ctx->state, vq->type);
917 return -EINVAL;
918 }
919 mfc_debug(2, "Buffer count=%d, plane count=%d\n",
920 *buf_count, *plane_count);
921 if (ctx->state == MFCINST_HEAD_PARSED &&
922 vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
923 psize[0] = ctx->luma_size;
924 psize[1] = ctx->chroma_size;
925
926 if (IS_MFCV6_PLUS(dev))
927 alloc_devs[0] = ctx->dev->mem_dev[BANK_L_CTX];
928 else
929 alloc_devs[0] = ctx->dev->mem_dev[BANK_R_CTX];
930 alloc_devs[1] = ctx->dev->mem_dev[BANK_L_CTX];
931 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE &&
932 ctx->state == MFCINST_INIT) {
933 psize[0] = ctx->dec_src_buf_size;
934 alloc_devs[0] = ctx->dev->mem_dev[BANK_L_CTX];
935 } else {
936 mfc_err("This video node is dedicated to decoding. Decoding not initialized\n");
937 return -EINVAL;
938 }
939 return 0;
940 }
941
942 static int s5p_mfc_buf_init(struct vb2_buffer *vb)
943 {
944 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
945 struct vb2_queue *vq = vb->vb2_queue;
946 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
947 unsigned int i;
948
949 if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
950 if (ctx->capture_state == QUEUE_BUFS_MMAPED)
951 return 0;
952 for (i = 0; i < ctx->dst_fmt->num_planes; i++) {
953 if (IS_ERR_OR_NULL(ERR_PTR(
954 vb2_dma_contig_plane_dma_addr(vb, i)))) {
955 mfc_err("Plane mem not allocated\n");
956 return -EINVAL;
957 }
958 }
959 if (vb2_plane_size(vb, 0) < ctx->luma_size ||
960 vb2_plane_size(vb, 1) < ctx->chroma_size) {
961 mfc_err("Plane buffer (CAPTURE) is too small\n");
962 return -EINVAL;
963 }
964 i = vb->index;
965 ctx->dst_bufs[i].b = vbuf;
966 ctx->dst_bufs[i].cookie.raw.luma =
967 vb2_dma_contig_plane_dma_addr(vb, 0);
968 ctx->dst_bufs[i].cookie.raw.chroma =
969 vb2_dma_contig_plane_dma_addr(vb, 1);
970 ctx->dst_bufs_cnt++;
971 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
972 if (IS_ERR_OR_NULL(ERR_PTR(
973 vb2_dma_contig_plane_dma_addr(vb, 0)))) {
974 mfc_err("Plane memory not allocated\n");
975 return -EINVAL;
976 }
977 if (vb2_plane_size(vb, 0) < ctx->dec_src_buf_size) {
978 mfc_err("Plane buffer (OUTPUT) is too small\n");
979 return -EINVAL;
980 }
981
982 i = vb->index;
983 ctx->src_bufs[i].b = vbuf;
984 ctx->src_bufs[i].cookie.stream =
985 vb2_dma_contig_plane_dma_addr(vb, 0);
986 ctx->src_bufs_cnt++;
987 } else {
988 mfc_err("s5p_mfc_buf_init: unknown queue type\n");
989 return -EINVAL;
990 }
991 return 0;
992 }
993
994 static int s5p_mfc_start_streaming(struct vb2_queue *q, unsigned int count)
995 {
996 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
997 struct s5p_mfc_dev *dev = ctx->dev;
998
999 v4l2_ctrl_handler_setup(&ctx->ctrl_handler);
1000 if (ctx->state == MFCINST_FINISHING ||
1001 ctx->state == MFCINST_FINISHED)
1002 ctx->state = MFCINST_RUNNING;
1003 /* If context is ready then dev = work->data;schedule it to run */
1004 if (s5p_mfc_ctx_ready(ctx))
1005 set_work_bit_irqsave(ctx);
1006 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
1007 return 0;
1008 }
1009
1010 static void s5p_mfc_stop_streaming(struct vb2_queue *q)
1011 {
1012 unsigned long flags;
1013 struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv);
1014 struct s5p_mfc_dev *dev = ctx->dev;
1015 int aborted = 0;
1016
1017 spin_lock_irqsave(&dev->irqlock, flags);
1018 if ((ctx->state == MFCINST_FINISHING ||
1019 ctx->state == MFCINST_RUNNING) &&
1020 dev->curr_ctx == ctx->num && dev->hw_lock) {
1021 ctx->state = MFCINST_ABORT;
1022 spin_unlock_irqrestore(&dev->irqlock, flags);
1023 s5p_mfc_wait_for_done_ctx(ctx,
1024 S5P_MFC_R2H_CMD_FRAME_DONE_RET, 0);
1025 aborted = 1;
1026 spin_lock_irqsave(&dev->irqlock, flags);
1027 }
1028 if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1029 s5p_mfc_cleanup_queue(&ctx->dst_queue, &ctx->vq_dst);
1030 INIT_LIST_HEAD(&ctx->dst_queue);
1031 ctx->dst_queue_cnt = 0;
1032 ctx->dpb_flush_flag = 1;
1033 ctx->dec_dst_flag = 0;
1034 if (IS_MFCV6_PLUS(dev) && (ctx->state == MFCINST_RUNNING)) {
1035 ctx->state = MFCINST_FLUSH;
1036 set_work_bit_irqsave(ctx);
1037 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
1038 spin_unlock_irqrestore(&dev->irqlock, flags);
1039 if (s5p_mfc_wait_for_done_ctx(ctx,
1040 S5P_MFC_R2H_CMD_DPB_FLUSH_RET, 0))
1041 mfc_err("Err flushing buffers\n");
1042 spin_lock_irqsave(&dev->irqlock, flags);
1043 }
1044 } else if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1045 s5p_mfc_cleanup_queue(&ctx->src_queue, &ctx->vq_src);
1046 INIT_LIST_HEAD(&ctx->src_queue);
1047 ctx->src_queue_cnt = 0;
1048 }
1049 if (aborted)
1050 ctx->state = MFCINST_RUNNING;
1051 spin_unlock_irqrestore(&dev->irqlock, flags);
1052 }
1053
1054
1055 static void s5p_mfc_buf_queue(struct vb2_buffer *vb)
1056 {
1057 struct vb2_queue *vq = vb->vb2_queue;
1058 struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
1059 struct s5p_mfc_dev *dev = ctx->dev;
1060 unsigned long flags;
1061 struct s5p_mfc_buf *mfc_buf;
1062
1063 if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1064 mfc_buf = &ctx->src_bufs[vb->index];
1065 mfc_buf->flags &= ~MFC_BUF_FLAG_USED;
1066 spin_lock_irqsave(&dev->irqlock, flags);
1067 list_add_tail(&mfc_buf->list, &ctx->src_queue);
1068 ctx->src_queue_cnt++;
1069 spin_unlock_irqrestore(&dev->irqlock, flags);
1070 } else if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1071 mfc_buf = &ctx->dst_bufs[vb->index];
1072 mfc_buf->flags &= ~MFC_BUF_FLAG_USED;
1073 /* Mark destination as available for use by MFC */
1074 spin_lock_irqsave(&dev->irqlock, flags);
1075 set_bit(vb->index, &ctx->dec_dst_flag);
1076 list_add_tail(&mfc_buf->list, &ctx->dst_queue);
1077 ctx->dst_queue_cnt++;
1078 spin_unlock_irqrestore(&dev->irqlock, flags);
1079 } else {
1080 mfc_err("Unsupported buffer type (%d)\n", vq->type);
1081 }
1082 if (s5p_mfc_ctx_ready(ctx))
1083 set_work_bit_irqsave(ctx);
1084 s5p_mfc_hw_call(dev->mfc_ops, try_run, dev);
1085 }
1086
1087 static struct vb2_ops s5p_mfc_dec_qops = {
1088 .queue_setup = s5p_mfc_queue_setup,
1089 .wait_prepare = vb2_ops_wait_prepare,
1090 .wait_finish = vb2_ops_wait_finish,
1091 .buf_init = s5p_mfc_buf_init,
1092 .start_streaming = s5p_mfc_start_streaming,
1093 .stop_streaming = s5p_mfc_stop_streaming,
1094 .buf_queue = s5p_mfc_buf_queue,
1095 };
1096
1097 const struct s5p_mfc_codec_ops *get_dec_codec_ops(void)
1098 {
1099 return &decoder_codec_ops;
1100 }
1101
1102 struct vb2_ops *get_dec_queue_ops(void)
1103 {
1104 return &s5p_mfc_dec_qops;
1105 }
1106
1107 const struct v4l2_ioctl_ops *get_dec_v4l2_ioctl_ops(void)
1108 {
1109 return &s5p_mfc_dec_ioctl_ops;
1110 }
1111
1112 #define IS_MFC51_PRIV(x) ((V4L2_CTRL_ID2WHICH(x) == V4L2_CTRL_CLASS_CODEC) \
1113 && V4L2_CTRL_DRIVER_PRIV(x))
1114
1115 int s5p_mfc_dec_ctrls_setup(struct s5p_mfc_ctx *ctx)
1116 {
1117 struct v4l2_ctrl_config cfg;
1118 int i;
1119
1120 v4l2_ctrl_handler_init(&ctx->ctrl_handler, NUM_CTRLS);
1121 if (ctx->ctrl_handler.error) {
1122 mfc_err("v4l2_ctrl_handler_init failed\n");
1123 return ctx->ctrl_handler.error;
1124 }
1125
1126 for (i = 0; i < NUM_CTRLS; i++) {
1127 if (IS_MFC51_PRIV(controls[i].id)) {
1128 memset(&cfg, 0, sizeof(struct v4l2_ctrl_config));
1129 cfg.ops = &s5p_mfc_dec_ctrl_ops;
1130 cfg.id = controls[i].id;
1131 cfg.min = controls[i].minimum;
1132 cfg.max = controls[i].maximum;
1133 cfg.def = controls[i].default_value;
1134 cfg.name = controls[i].name;
1135 cfg.type = controls[i].type;
1136
1137 cfg.step = controls[i].step;
1138 cfg.menu_skip_mask = 0;
1139
1140 ctx->ctrls[i] = v4l2_ctrl_new_custom(&ctx->ctrl_handler,
1141 &cfg, NULL);
1142 } else {
1143 ctx->ctrls[i] = v4l2_ctrl_new_std(&ctx->ctrl_handler,
1144 &s5p_mfc_dec_ctrl_ops,
1145 controls[i].id, controls[i].minimum,
1146 controls[i].maximum, controls[i].step,
1147 controls[i].default_value);
1148 }
1149 if (ctx->ctrl_handler.error) {
1150 mfc_err("Adding control (%d) failed\n", i);
1151 return ctx->ctrl_handler.error;
1152 }
1153 if (controls[i].is_volatile && ctx->ctrls[i])
1154 ctx->ctrls[i]->flags |= V4L2_CTRL_FLAG_VOLATILE;
1155 }
1156 return 0;
1157 }
1158
1159 void s5p_mfc_dec_ctrls_delete(struct s5p_mfc_ctx *ctx)
1160 {
1161 int i;
1162
1163 v4l2_ctrl_handler_free(&ctx->ctrl_handler);
1164 for (i = 0; i < NUM_CTRLS; i++)
1165 ctx->ctrls[i] = NULL;
1166 }
1167
1168 void s5p_mfc_dec_init(struct s5p_mfc_ctx *ctx)
1169 {
1170 struct v4l2_format f;
1171 f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264;
1172 ctx->src_fmt = find_format(&f, MFC_FMT_DEC);
1173 if (IS_MFCV8_PLUS(ctx->dev))
1174 f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12M;
1175 else if (IS_MFCV6_PLUS(ctx->dev))
1176 f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12MT_16X16;
1177 else
1178 f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12MT;
1179 ctx->dst_fmt = find_format(&f, MFC_FMT_RAW);
1180 mfc_debug(2, "Default src_fmt is %p, dest_fmt is %p\n",
1181 ctx->src_fmt, ctx->dst_fmt);
1182 }
1183
Linux with added FPC-III support