WIP FPC-III support
[linux/fpc-iii.git] / drivers / net / dsa / b53 / b53_spi.c
blob7abec8dab8babab58bdf657be70d0be8309dcbbc
1 /*
2 * B53 register access through SPI
4 * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #include <asm/unaligned.h>
21 #include <linux/delay.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/spi/spi.h>
25 #include <linux/platform_data/b53.h>
27 #include "b53_priv.h"
29 #define B53_SPI_DATA 0xf0
31 #define B53_SPI_STATUS 0xfe
32 #define B53_SPI_CMD_SPIF BIT(7)
33 #define B53_SPI_CMD_RACK BIT(5)
35 #define B53_SPI_CMD_READ 0x00
36 #define B53_SPI_CMD_WRITE 0x01
37 #define B53_SPI_CMD_NORMAL 0x60
38 #define B53_SPI_CMD_FAST 0x10
40 #define B53_SPI_PAGE_SELECT 0xff
42 static inline int b53_spi_read_reg(struct spi_device *spi, u8 reg, u8 *val,
43 unsigned int len)
45 u8 txbuf[2];
47 txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_READ;
48 txbuf[1] = reg;
50 return spi_write_then_read(spi, txbuf, 2, val, len);
53 static inline int b53_spi_clear_status(struct spi_device *spi)
55 unsigned int i;
56 u8 rxbuf;
57 int ret;
59 for (i = 0; i < 10; i++) {
60 ret = b53_spi_read_reg(spi, B53_SPI_STATUS, &rxbuf, 1);
61 if (ret)
62 return ret;
64 if (!(rxbuf & B53_SPI_CMD_SPIF))
65 break;
67 mdelay(1);
70 if (i == 10)
71 return -EIO;
73 return 0;
76 static inline int b53_spi_set_page(struct spi_device *spi, u8 page)
78 u8 txbuf[3];
80 txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
81 txbuf[1] = B53_SPI_PAGE_SELECT;
82 txbuf[2] = page;
84 return spi_write(spi, txbuf, sizeof(txbuf));
87 static inline int b53_prepare_reg_access(struct spi_device *spi, u8 page)
89 int ret = b53_spi_clear_status(spi);
91 if (ret)
92 return ret;
94 return b53_spi_set_page(spi, page);
97 static int b53_spi_prepare_reg_read(struct spi_device *spi, u8 reg)
99 u8 rxbuf;
100 int retry_count;
101 int ret;
103 ret = b53_spi_read_reg(spi, reg, &rxbuf, 1);
104 if (ret)
105 return ret;
107 for (retry_count = 0; retry_count < 10; retry_count++) {
108 ret = b53_spi_read_reg(spi, B53_SPI_STATUS, &rxbuf, 1);
109 if (ret)
110 return ret;
112 if (rxbuf & B53_SPI_CMD_RACK)
113 break;
115 mdelay(1);
118 if (retry_count == 10)
119 return -EIO;
121 return 0;
124 static int b53_spi_read(struct b53_device *dev, u8 page, u8 reg, u8 *data,
125 unsigned int len)
127 struct spi_device *spi = dev->priv;
128 int ret;
130 ret = b53_prepare_reg_access(spi, page);
131 if (ret)
132 return ret;
134 ret = b53_spi_prepare_reg_read(spi, reg);
135 if (ret)
136 return ret;
138 return b53_spi_read_reg(spi, B53_SPI_DATA, data, len);
141 static int b53_spi_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
143 return b53_spi_read(dev, page, reg, val, 1);
146 static int b53_spi_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)
148 __le16 value;
149 int ret;
151 ret = b53_spi_read(dev, page, reg, (u8 *)&value, 2);
153 if (!ret)
154 *val = le16_to_cpu(value);
156 return ret;
159 static int b53_spi_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)
161 __le32 value;
162 int ret;
164 ret = b53_spi_read(dev, page, reg, (u8 *)&value, 4);
166 if (!ret)
167 *val = le32_to_cpu(value);
169 return ret;
172 static int b53_spi_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)
174 __le64 value;
175 int ret;
177 *val = 0;
178 ret = b53_spi_read(dev, page, reg, (u8 *)&value, 6);
179 if (!ret)
180 *val = le64_to_cpu(value);
182 return ret;
185 static int b53_spi_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)
187 __le64 value;
188 int ret;
190 ret = b53_spi_read(dev, page, reg, (u8 *)&value, 8);
192 if (!ret)
193 *val = le64_to_cpu(value);
195 return ret;
198 static int b53_spi_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)
200 struct spi_device *spi = dev->priv;
201 int ret;
202 u8 txbuf[3];
204 ret = b53_prepare_reg_access(spi, page);
205 if (ret)
206 return ret;
208 txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
209 txbuf[1] = reg;
210 txbuf[2] = value;
212 return spi_write(spi, txbuf, sizeof(txbuf));
215 static int b53_spi_write16(struct b53_device *dev, u8 page, u8 reg, u16 value)
217 struct spi_device *spi = dev->priv;
218 int ret;
219 u8 txbuf[4];
221 ret = b53_prepare_reg_access(spi, page);
222 if (ret)
223 return ret;
225 txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
226 txbuf[1] = reg;
227 put_unaligned_le16(value, &txbuf[2]);
229 return spi_write(spi, txbuf, sizeof(txbuf));
232 static int b53_spi_write32(struct b53_device *dev, u8 page, u8 reg, u32 value)
234 struct spi_device *spi = dev->priv;
235 int ret;
236 u8 txbuf[6];
238 ret = b53_prepare_reg_access(spi, page);
239 if (ret)
240 return ret;
242 txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
243 txbuf[1] = reg;
244 put_unaligned_le32(value, &txbuf[2]);
246 return spi_write(spi, txbuf, sizeof(txbuf));
249 static int b53_spi_write48(struct b53_device *dev, u8 page, u8 reg, u64 value)
251 struct spi_device *spi = dev->priv;
252 int ret;
253 u8 txbuf[10];
255 ret = b53_prepare_reg_access(spi, page);
256 if (ret)
257 return ret;
259 txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
260 txbuf[1] = reg;
261 put_unaligned_le64(value, &txbuf[2]);
263 return spi_write(spi, txbuf, sizeof(txbuf) - 2);
266 static int b53_spi_write64(struct b53_device *dev, u8 page, u8 reg, u64 value)
268 struct spi_device *spi = dev->priv;
269 int ret;
270 u8 txbuf[10];
272 ret = b53_prepare_reg_access(spi, page);
273 if (ret)
274 return ret;
276 txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;
277 txbuf[1] = reg;
278 put_unaligned_le64(value, &txbuf[2]);
280 return spi_write(spi, txbuf, sizeof(txbuf));
283 static const struct b53_io_ops b53_spi_ops = {
284 .read8 = b53_spi_read8,
285 .read16 = b53_spi_read16,
286 .read32 = b53_spi_read32,
287 .read48 = b53_spi_read48,
288 .read64 = b53_spi_read64,
289 .write8 = b53_spi_write8,
290 .write16 = b53_spi_write16,
291 .write32 = b53_spi_write32,
292 .write48 = b53_spi_write48,
293 .write64 = b53_spi_write64,
296 static int b53_spi_probe(struct spi_device *spi)
298 struct b53_device *dev;
299 int ret;
301 dev = b53_switch_alloc(&spi->dev, &b53_spi_ops, spi);
302 if (!dev)
303 return -ENOMEM;
305 if (spi->dev.platform_data)
306 dev->pdata = spi->dev.platform_data;
308 ret = b53_switch_register(dev);
309 if (ret)
310 return ret;
312 spi_set_drvdata(spi, dev);
314 return 0;
317 static int b53_spi_remove(struct spi_device *spi)
319 struct b53_device *dev = spi_get_drvdata(spi);
321 if (dev)
322 b53_switch_remove(dev);
324 return 0;
327 static struct spi_driver b53_spi_driver = {
328 .driver = {
329 .name = "b53-switch",
331 .probe = b53_spi_probe,
332 .remove = b53_spi_remove,
335 module_spi_driver(b53_spi_driver);
337 MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
338 MODULE_DESCRIPTION("B53 SPI access driver");
339 MODULE_LICENSE("Dual BSD/GPL");