drivers/net/dsa/sja1105/sja1105_sgmii.h

   1 /* SPDX-License-Identifier: BSD-3-Clause */
   2 /* Copyright 2020, NXP Semiconductors
   3  */
   4 #ifndef _SJA1105_SGMII_H
   5 #define _SJA1105_SGMII_H
   6
   7 #define SJA1105_SGMII_PORT              4
   8
   9 /* DIGITAL_CONTROL_1 (address 1f8000h) */
  10 #define SJA1105_DC1                     0x8000
  11 #define SJA1105_DC1_VS_RESET            BIT(15)
  12 #define SJA1105_DC1_REMOTE_LOOPBACK     BIT(14)
  13 #define SJA1105_DC1_EN_VSMMD1           BIT(13)
  14 #define SJA1105_DC1_POWER_SAVE          BIT(11)
  15 #define SJA1105_DC1_CLOCK_STOP_EN       BIT(10)
  16 #define SJA1105_DC1_MAC_AUTO_SW         BIT(9)
  17 #define SJA1105_DC1_INIT                BIT(8)
  18 #define SJA1105_DC1_TX_DISABLE          BIT(4)
  19 #define SJA1105_DC1_AUTONEG_TIMER_OVRR  BIT(3)
  20 #define SJA1105_DC1_BYP_POWERUP         BIT(1)
  21 #define SJA1105_DC1_PHY_MODE_CONTROL    BIT(0)
  22
  23 /* DIGITAL_CONTROL_2 register (address 1f80E1h) */
  24 #define SJA1105_DC2                     0x80e1
  25 #define SJA1105_DC2_TX_POL_INV_DISABLE  BIT(4)
  26 #define SJA1105_DC2_RX_POL_INV          BIT(0)
  27
  28 /* DIGITAL_ERROR_CNT register (address 1f80E2h) */
  29 #define SJA1105_DEC                     0x80e2
  30 #define SJA1105_DEC_ICG_EC_ENA          BIT(4)
  31 #define SJA1105_DEC_CLEAR_ON_READ       BIT(0)
  32
  33 /* AUTONEG_CONTROL register (address 1f8001h) */
  34 #define SJA1105_AC                      0x8001
  35 #define SJA1105_AC_MII_CONTROL          BIT(8)
  36 #define SJA1105_AC_SGMII_LINK           BIT(4)
  37 #define SJA1105_AC_PHY_MODE             BIT(3)
  38 #define SJA1105_AC_AUTONEG_MODE(x)      (((x) << 1) & GENMASK(2, 1))
  39 #define SJA1105_AC_AUTONEG_MODE_SGMII   SJA1105_AC_AUTONEG_MODE(2)
  40
  41 /* AUTONEG_INTR_STATUS register (address 1f8002h) */
  42 #define SJA1105_AIS                     0x8002
  43 #define SJA1105_AIS_LINK_STATUS(x)      (!!((x) & BIT(4)))
  44 #define SJA1105_AIS_SPEED(x)            (((x) & GENMASK(3, 2)) >> 2)
  45 #define SJA1105_AIS_DUPLEX_MODE(x)      (!!((x) & BIT(1)))
  46 #define SJA1105_AIS_COMPLETE(x)         (!!((x) & BIT(0)))
  47
  48 /* DEBUG_CONTROL register (address 1f8005h) */
  49 #define SJA1105_DC                      0x8005
  50 #define SJA1105_DC_SUPPRESS_LOS         BIT(4)
  51 #define SJA1105_DC_RESTART_SYNC         BIT(0)
  52
  53 #endif