1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
4 #include <linux/dma-mapping.h>
5 #include <linux/etherdevice.h>
6 #include <linux/interrupt.h>
7 #ifdef CONFIG_RFS_ACCEL
8 #include <linux/cpu_rmap.h>
10 #include <linux/if_vlan.h>
11 #include <linux/irq.h>
13 #include <linux/ipv6.h>
14 #include <linux/module.h>
15 #include <linux/pci.h>
16 #include <linux/aer.h>
17 #include <linux/skbuff.h>
18 #include <linux/sctp.h>
20 #include <net/ip6_checksum.h>
21 #include <net/pkt_cls.h>
23 #include <net/vxlan.h>
24 #include <net/geneve.h>
27 #include "hns3_enet.h"
28 /* All hns3 tracepoints are defined by the include below, which
29 * must be included exactly once across the whole kernel with
30 * CREATE_TRACE_POINTS defined
32 #define CREATE_TRACE_POINTS
33 #include "hns3_trace.h"
35 #define hns3_set_field(origin, shift, val) ((origin) |= ((val) << (shift)))
36 #define hns3_tx_bd_count(S) DIV_ROUND_UP(S, HNS3_MAX_BD_SIZE)
38 #define hns3_rl_err(fmt, ...) \
40 if (net_ratelimit()) \
41 netdev_err(fmt, ##__VA_ARGS__); \
44 static void hns3_clear_all_ring(struct hnae3_handle
*h
, bool force
);
46 static const char hns3_driver_name
[] = "hns3";
47 static const char hns3_driver_string
[] =
48 "Hisilicon Ethernet Network Driver for Hip08 Family";
49 static const char hns3_copyright
[] = "Copyright (c) 2017 Huawei Corporation.";
50 static struct hnae3_client client
;
52 static int debug
= -1;
53 module_param(debug
, int, 0);
54 MODULE_PARM_DESC(debug
, " Network interface message level setting");
56 #define DEFAULT_MSG_LEVEL (NETIF_MSG_PROBE | NETIF_MSG_LINK | \
57 NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
59 #define HNS3_INNER_VLAN_TAG 1
60 #define HNS3_OUTER_VLAN_TAG 2
62 #define HNS3_MIN_TX_LEN 33U
64 /* hns3_pci_tbl - PCI Device ID Table
66 * Last entry must be all 0s
68 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
69 * Class, Class Mask, private data (not used) }
71 static const struct pci_device_id hns3_pci_tbl
[] = {
72 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_GE
), 0},
73 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_25GE
), 0},
74 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_25GE_RDMA
),
75 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS
},
76 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_25GE_RDMA_MACSEC
),
77 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS
},
78 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_50GE_RDMA
),
79 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS
},
80 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_50GE_RDMA_MACSEC
),
81 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS
},
82 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_100G_RDMA_MACSEC
),
83 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS
},
84 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_200G_RDMA
),
85 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS
},
86 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_VF
), 0},
87 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_RDMA_DCB_PFC_VF
),
88 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS
},
89 /* required last entry */
92 MODULE_DEVICE_TABLE(pci
, hns3_pci_tbl
);
94 static irqreturn_t
hns3_irq_handle(int irq
, void *vector
)
96 struct hns3_enet_tqp_vector
*tqp_vector
= vector
;
98 napi_schedule_irqoff(&tqp_vector
->napi
);
103 static void hns3_nic_uninit_irq(struct hns3_nic_priv
*priv
)
105 struct hns3_enet_tqp_vector
*tqp_vectors
;
108 for (i
= 0; i
< priv
->vector_num
; i
++) {
109 tqp_vectors
= &priv
->tqp_vector
[i
];
111 if (tqp_vectors
->irq_init_flag
!= HNS3_VECTOR_INITED
)
114 /* clear the affinity mask */
115 irq_set_affinity_hint(tqp_vectors
->vector_irq
, NULL
);
117 /* release the irq resource */
118 free_irq(tqp_vectors
->vector_irq
, tqp_vectors
);
119 tqp_vectors
->irq_init_flag
= HNS3_VECTOR_NOT_INITED
;
123 static int hns3_nic_init_irq(struct hns3_nic_priv
*priv
)
125 struct hns3_enet_tqp_vector
*tqp_vectors
;
126 int txrx_int_idx
= 0;
132 for (i
= 0; i
< priv
->vector_num
; i
++) {
133 tqp_vectors
= &priv
->tqp_vector
[i
];
135 if (tqp_vectors
->irq_init_flag
== HNS3_VECTOR_INITED
)
138 if (tqp_vectors
->tx_group
.ring
&& tqp_vectors
->rx_group
.ring
) {
139 snprintf(tqp_vectors
->name
, HNAE3_INT_NAME_LEN
,
140 "%s-%s-%s-%d", hns3_driver_name
,
141 pci_name(priv
->ae_handle
->pdev
),
142 "TxRx", txrx_int_idx
++);
144 } else if (tqp_vectors
->rx_group
.ring
) {
145 snprintf(tqp_vectors
->name
, HNAE3_INT_NAME_LEN
,
146 "%s-%s-%s-%d", hns3_driver_name
,
147 pci_name(priv
->ae_handle
->pdev
),
149 } else if (tqp_vectors
->tx_group
.ring
) {
150 snprintf(tqp_vectors
->name
, HNAE3_INT_NAME_LEN
,
151 "%s-%s-%s-%d", hns3_driver_name
,
152 pci_name(priv
->ae_handle
->pdev
),
155 /* Skip this unused q_vector */
159 tqp_vectors
->name
[HNAE3_INT_NAME_LEN
- 1] = '\0';
161 irq_set_status_flags(tqp_vectors
->vector_irq
, IRQ_NOAUTOEN
);
162 ret
= request_irq(tqp_vectors
->vector_irq
, hns3_irq_handle
, 0,
163 tqp_vectors
->name
, tqp_vectors
);
165 netdev_err(priv
->netdev
, "request irq(%d) fail\n",
166 tqp_vectors
->vector_irq
);
167 hns3_nic_uninit_irq(priv
);
171 irq_set_affinity_hint(tqp_vectors
->vector_irq
,
172 &tqp_vectors
->affinity_mask
);
174 tqp_vectors
->irq_init_flag
= HNS3_VECTOR_INITED
;
180 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector
*tqp_vector
,
183 writel(mask_en
, tqp_vector
->mask_addr
);
186 static void hns3_vector_enable(struct hns3_enet_tqp_vector
*tqp_vector
)
188 napi_enable(&tqp_vector
->napi
);
189 enable_irq(tqp_vector
->vector_irq
);
192 hns3_mask_vector_irq(tqp_vector
, 1);
195 static void hns3_vector_disable(struct hns3_enet_tqp_vector
*tqp_vector
)
198 hns3_mask_vector_irq(tqp_vector
, 0);
200 disable_irq(tqp_vector
->vector_irq
);
201 napi_disable(&tqp_vector
->napi
);
204 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector
*tqp_vector
,
207 u32 rl_reg
= hns3_rl_usec_to_reg(rl_value
);
209 /* this defines the configuration for RL (Interrupt Rate Limiter).
210 * Rl defines rate of interrupts i.e. number of interrupts-per-second
211 * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
214 if (rl_reg
> 0 && !tqp_vector
->tx_group
.coal
.adapt_enable
&&
215 !tqp_vector
->rx_group
.coal
.adapt_enable
)
216 /* According to the hardware, the range of rl_reg is
217 * 0-59 and the unit is 4.
219 rl_reg
|= HNS3_INT_RL_ENABLE_MASK
;
221 writel(rl_reg
, tqp_vector
->mask_addr
+ HNS3_VECTOR_RL_OFFSET
);
224 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector
*tqp_vector
,
229 if (tqp_vector
->rx_group
.coal
.unit_1us
)
230 new_val
= gl_value
| HNS3_INT_GL_1US
;
232 new_val
= hns3_gl_usec_to_reg(gl_value
);
234 writel(new_val
, tqp_vector
->mask_addr
+ HNS3_VECTOR_GL0_OFFSET
);
237 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector
*tqp_vector
,
242 if (tqp_vector
->tx_group
.coal
.unit_1us
)
243 new_val
= gl_value
| HNS3_INT_GL_1US
;
245 new_val
= hns3_gl_usec_to_reg(gl_value
);
247 writel(new_val
, tqp_vector
->mask_addr
+ HNS3_VECTOR_GL1_OFFSET
);
250 void hns3_set_vector_coalesce_tx_ql(struct hns3_enet_tqp_vector
*tqp_vector
,
253 writel(ql_value
, tqp_vector
->mask_addr
+ HNS3_VECTOR_TX_QL_OFFSET
);
256 void hns3_set_vector_coalesce_rx_ql(struct hns3_enet_tqp_vector
*tqp_vector
,
259 writel(ql_value
, tqp_vector
->mask_addr
+ HNS3_VECTOR_RX_QL_OFFSET
);
262 static void hns3_vector_coalesce_init(struct hns3_enet_tqp_vector
*tqp_vector
,
263 struct hns3_nic_priv
*priv
)
265 struct hnae3_ae_dev
*ae_dev
= pci_get_drvdata(priv
->ae_handle
->pdev
);
266 struct hns3_enet_coalesce
*tx_coal
= &tqp_vector
->tx_group
.coal
;
267 struct hns3_enet_coalesce
*rx_coal
= &tqp_vector
->rx_group
.coal
;
269 /* initialize the configuration for interrupt coalescing.
270 * 1. GL (Interrupt Gap Limiter)
271 * 2. RL (Interrupt Rate Limiter)
272 * 3. QL (Interrupt Quantity Limiter)
274 * Default: enable interrupt coalescing self-adaptive and GL
276 tx_coal
->adapt_enable
= 1;
277 rx_coal
->adapt_enable
= 1;
279 tx_coal
->int_gl
= HNS3_INT_GL_50K
;
280 rx_coal
->int_gl
= HNS3_INT_GL_50K
;
282 rx_coal
->flow_level
= HNS3_FLOW_LOW
;
283 tx_coal
->flow_level
= HNS3_FLOW_LOW
;
285 /* device version above V3(include V3), GL can configure 1us
286 * unit, so uses 1us unit.
288 if (ae_dev
->dev_version
>= HNAE3_DEVICE_VERSION_V3
) {
289 tx_coal
->unit_1us
= 1;
290 rx_coal
->unit_1us
= 1;
293 if (ae_dev
->dev_specs
.int_ql_max
) {
294 tx_coal
->ql_enable
= 1;
295 rx_coal
->ql_enable
= 1;
296 tx_coal
->int_ql_max
= ae_dev
->dev_specs
.int_ql_max
;
297 rx_coal
->int_ql_max
= ae_dev
->dev_specs
.int_ql_max
;
298 tx_coal
->int_ql
= HNS3_INT_QL_DEFAULT_CFG
;
299 rx_coal
->int_ql
= HNS3_INT_QL_DEFAULT_CFG
;
304 hns3_vector_coalesce_init_hw(struct hns3_enet_tqp_vector
*tqp_vector
,
305 struct hns3_nic_priv
*priv
)
307 struct hns3_enet_coalesce
*tx_coal
= &tqp_vector
->tx_group
.coal
;
308 struct hns3_enet_coalesce
*rx_coal
= &tqp_vector
->rx_group
.coal
;
309 struct hnae3_handle
*h
= priv
->ae_handle
;
311 hns3_set_vector_coalesce_tx_gl(tqp_vector
, tx_coal
->int_gl
);
312 hns3_set_vector_coalesce_rx_gl(tqp_vector
, rx_coal
->int_gl
);
313 hns3_set_vector_coalesce_rl(tqp_vector
, h
->kinfo
.int_rl_setting
);
315 if (tx_coal
->ql_enable
)
316 hns3_set_vector_coalesce_tx_ql(tqp_vector
, tx_coal
->int_ql
);
318 if (rx_coal
->ql_enable
)
319 hns3_set_vector_coalesce_rx_ql(tqp_vector
, rx_coal
->int_ql
);
322 static int hns3_nic_set_real_num_queue(struct net_device
*netdev
)
324 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
325 struct hnae3_knic_private_info
*kinfo
= &h
->kinfo
;
326 struct hnae3_tc_info
*tc_info
= &kinfo
->tc_info
;
327 unsigned int queue_size
= kinfo
->num_tqps
;
330 if (tc_info
->num_tc
<= 1 && !tc_info
->mqprio_active
) {
331 netdev_reset_tc(netdev
);
333 ret
= netdev_set_num_tc(netdev
, tc_info
->num_tc
);
336 "netdev_set_num_tc fail, ret=%d!\n", ret
);
340 for (i
= 0; i
< HNAE3_MAX_TC
; i
++) {
341 if (!test_bit(i
, &tc_info
->tc_en
))
344 netdev_set_tc_queue(netdev
, i
, tc_info
->tqp_count
[i
],
345 tc_info
->tqp_offset
[i
]);
349 ret
= netif_set_real_num_tx_queues(netdev
, queue_size
);
352 "netif_set_real_num_tx_queues fail, ret=%d!\n", ret
);
356 ret
= netif_set_real_num_rx_queues(netdev
, queue_size
);
359 "netif_set_real_num_rx_queues fail, ret=%d!\n", ret
);
366 static u16
hns3_get_max_available_channels(struct hnae3_handle
*h
)
368 u16 alloc_tqps
, max_rss_size
, rss_size
;
370 h
->ae_algo
->ops
->get_tqps_and_rss_info(h
, &alloc_tqps
, &max_rss_size
);
371 rss_size
= alloc_tqps
/ h
->kinfo
.tc_info
.num_tc
;
373 return min_t(u16
, rss_size
, max_rss_size
);
376 static void hns3_tqp_enable(struct hnae3_queue
*tqp
)
380 rcb_reg
= hns3_read_dev(tqp
, HNS3_RING_EN_REG
);
381 rcb_reg
|= BIT(HNS3_RING_EN_B
);
382 hns3_write_dev(tqp
, HNS3_RING_EN_REG
, rcb_reg
);
385 static void hns3_tqp_disable(struct hnae3_queue
*tqp
)
389 rcb_reg
= hns3_read_dev(tqp
, HNS3_RING_EN_REG
);
390 rcb_reg
&= ~BIT(HNS3_RING_EN_B
);
391 hns3_write_dev(tqp
, HNS3_RING_EN_REG
, rcb_reg
);
394 static void hns3_free_rx_cpu_rmap(struct net_device
*netdev
)
396 #ifdef CONFIG_RFS_ACCEL
397 free_irq_cpu_rmap(netdev
->rx_cpu_rmap
);
398 netdev
->rx_cpu_rmap
= NULL
;
402 static int hns3_set_rx_cpu_rmap(struct net_device
*netdev
)
404 #ifdef CONFIG_RFS_ACCEL
405 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
406 struct hns3_enet_tqp_vector
*tqp_vector
;
409 if (!netdev
->rx_cpu_rmap
) {
410 netdev
->rx_cpu_rmap
= alloc_irq_cpu_rmap(priv
->vector_num
);
411 if (!netdev
->rx_cpu_rmap
)
415 for (i
= 0; i
< priv
->vector_num
; i
++) {
416 tqp_vector
= &priv
->tqp_vector
[i
];
417 ret
= irq_cpu_rmap_add(netdev
->rx_cpu_rmap
,
418 tqp_vector
->vector_irq
);
420 hns3_free_rx_cpu_rmap(netdev
);
428 static int hns3_nic_net_up(struct net_device
*netdev
)
430 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
431 struct hnae3_handle
*h
= priv
->ae_handle
;
435 ret
= hns3_nic_reset_all_ring(h
);
439 clear_bit(HNS3_NIC_STATE_DOWN
, &priv
->state
);
441 /* enable the vectors */
442 for (i
= 0; i
< priv
->vector_num
; i
++)
443 hns3_vector_enable(&priv
->tqp_vector
[i
]);
446 for (j
= 0; j
< h
->kinfo
.num_tqps
; j
++)
447 hns3_tqp_enable(h
->kinfo
.tqp
[j
]);
449 /* start the ae_dev */
450 ret
= h
->ae_algo
->ops
->start
? h
->ae_algo
->ops
->start(h
) : 0;
452 set_bit(HNS3_NIC_STATE_DOWN
, &priv
->state
);
454 hns3_tqp_disable(h
->kinfo
.tqp
[j
]);
456 for (j
= i
- 1; j
>= 0; j
--)
457 hns3_vector_disable(&priv
->tqp_vector
[j
]);
463 static void hns3_config_xps(struct hns3_nic_priv
*priv
)
467 for (i
= 0; i
< priv
->vector_num
; i
++) {
468 struct hns3_enet_tqp_vector
*tqp_vector
= &priv
->tqp_vector
[i
];
469 struct hns3_enet_ring
*ring
= tqp_vector
->tx_group
.ring
;
474 ret
= netif_set_xps_queue(priv
->netdev
,
475 &tqp_vector
->affinity_mask
,
476 ring
->tqp
->tqp_index
);
478 netdev_warn(priv
->netdev
,
479 "set xps queue failed: %d", ret
);
486 static int hns3_nic_net_open(struct net_device
*netdev
)
488 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
489 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
490 struct hnae3_knic_private_info
*kinfo
;
493 if (hns3_nic_resetting(netdev
))
496 netif_carrier_off(netdev
);
498 ret
= hns3_nic_set_real_num_queue(netdev
);
502 ret
= hns3_nic_net_up(netdev
);
504 netdev_err(netdev
, "net up fail, ret=%d!\n", ret
);
509 for (i
= 0; i
< HNAE3_MAX_USER_PRIO
; i
++)
510 netdev_set_prio_tc_map(netdev
, i
, kinfo
->tc_info
.prio_tc
[i
]);
512 if (h
->ae_algo
->ops
->set_timer_task
)
513 h
->ae_algo
->ops
->set_timer_task(priv
->ae_handle
, true);
515 hns3_config_xps(priv
);
517 netif_dbg(h
, drv
, netdev
, "net open\n");
522 static void hns3_reset_tx_queue(struct hnae3_handle
*h
)
524 struct net_device
*ndev
= h
->kinfo
.netdev
;
525 struct hns3_nic_priv
*priv
= netdev_priv(ndev
);
526 struct netdev_queue
*dev_queue
;
529 for (i
= 0; i
< h
->kinfo
.num_tqps
; i
++) {
530 dev_queue
= netdev_get_tx_queue(ndev
,
531 priv
->ring
[i
].queue_index
);
532 netdev_tx_reset_queue(dev_queue
);
536 static void hns3_nic_net_down(struct net_device
*netdev
)
538 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
539 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
540 const struct hnae3_ae_ops
*ops
;
543 /* disable vectors */
544 for (i
= 0; i
< priv
->vector_num
; i
++)
545 hns3_vector_disable(&priv
->tqp_vector
[i
]);
548 for (i
= 0; i
< h
->kinfo
.num_tqps
; i
++)
549 hns3_tqp_disable(h
->kinfo
.tqp
[i
]);
552 ops
= priv
->ae_handle
->ae_algo
->ops
;
554 ops
->stop(priv
->ae_handle
);
556 /* delay ring buffer clearing to hns3_reset_notify_uninit_enet
557 * during reset process, because driver may not be able
558 * to disable the ring through firmware when downing the netdev.
560 if (!hns3_nic_resetting(netdev
))
561 hns3_clear_all_ring(priv
->ae_handle
, false);
563 hns3_reset_tx_queue(priv
->ae_handle
);
566 static int hns3_nic_net_stop(struct net_device
*netdev
)
568 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
569 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
571 if (test_and_set_bit(HNS3_NIC_STATE_DOWN
, &priv
->state
))
574 netif_dbg(h
, drv
, netdev
, "net stop\n");
576 if (h
->ae_algo
->ops
->set_timer_task
)
577 h
->ae_algo
->ops
->set_timer_task(priv
->ae_handle
, false);
579 netif_tx_stop_all_queues(netdev
);
580 netif_carrier_off(netdev
);
582 hns3_nic_net_down(netdev
);
587 static int hns3_nic_uc_sync(struct net_device
*netdev
,
588 const unsigned char *addr
)
590 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
592 if (h
->ae_algo
->ops
->add_uc_addr
)
593 return h
->ae_algo
->ops
->add_uc_addr(h
, addr
);
598 static int hns3_nic_uc_unsync(struct net_device
*netdev
,
599 const unsigned char *addr
)
601 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
603 /* need ignore the request of removing device address, because
604 * we store the device address and other addresses of uc list
605 * in the function's mac filter list.
607 if (ether_addr_equal(addr
, netdev
->dev_addr
))
610 if (h
->ae_algo
->ops
->rm_uc_addr
)
611 return h
->ae_algo
->ops
->rm_uc_addr(h
, addr
);
616 static int hns3_nic_mc_sync(struct net_device
*netdev
,
617 const unsigned char *addr
)
619 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
621 if (h
->ae_algo
->ops
->add_mc_addr
)
622 return h
->ae_algo
->ops
->add_mc_addr(h
, addr
);
627 static int hns3_nic_mc_unsync(struct net_device
*netdev
,
628 const unsigned char *addr
)
630 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
632 if (h
->ae_algo
->ops
->rm_mc_addr
)
633 return h
->ae_algo
->ops
->rm_mc_addr(h
, addr
);
638 static u8
hns3_get_netdev_flags(struct net_device
*netdev
)
642 if (netdev
->flags
& IFF_PROMISC
) {
643 flags
= HNAE3_USER_UPE
| HNAE3_USER_MPE
| HNAE3_BPE
;
645 flags
|= HNAE3_VLAN_FLTR
;
646 if (netdev
->flags
& IFF_ALLMULTI
)
647 flags
|= HNAE3_USER_MPE
;
653 static void hns3_nic_set_rx_mode(struct net_device
*netdev
)
655 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
658 new_flags
= hns3_get_netdev_flags(netdev
);
660 __dev_uc_sync(netdev
, hns3_nic_uc_sync
, hns3_nic_uc_unsync
);
661 __dev_mc_sync(netdev
, hns3_nic_mc_sync
, hns3_nic_mc_unsync
);
663 /* User mode Promisc mode enable and vlan filtering is disabled to
664 * let all packets in.
666 h
->netdev_flags
= new_flags
;
667 hns3_request_update_promisc_mode(h
);
670 void hns3_request_update_promisc_mode(struct hnae3_handle
*handle
)
672 const struct hnae3_ae_ops
*ops
= handle
->ae_algo
->ops
;
674 if (ops
->request_update_promisc_mode
)
675 ops
->request_update_promisc_mode(handle
);
678 void hns3_enable_vlan_filter(struct net_device
*netdev
, bool enable
)
680 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
681 struct hnae3_handle
*h
= priv
->ae_handle
;
682 struct hnae3_ae_dev
*ae_dev
= pci_get_drvdata(h
->pdev
);
685 if (ae_dev
->dev_version
>= HNAE3_DEVICE_VERSION_V2
&&
686 h
->ae_algo
->ops
->enable_vlan_filter
) {
687 last_state
= h
->netdev_flags
& HNAE3_VLAN_FLTR
? true : false;
688 if (enable
!= last_state
) {
691 enable
? "enable" : "disable");
692 h
->ae_algo
->ops
->enable_vlan_filter(h
, enable
);
697 static int hns3_set_tso(struct sk_buff
*skb
, u32
*paylen_fdop_ol4cs
,
698 u16
*mss
, u32
*type_cs_vlan_tso
)
700 u32 l4_offset
, hdr_len
;
701 union l3_hdr_info l3
;
702 union l4_hdr_info l4
;
706 if (!skb_is_gso(skb
))
709 ret
= skb_cow_head(skb
, 0);
710 if (unlikely(ret
< 0))
713 l3
.hdr
= skb_network_header(skb
);
714 l4
.hdr
= skb_transport_header(skb
);
716 /* Software should clear the IPv4's checksum field when tso is
719 if (l3
.v4
->version
== 4)
723 if (skb_shinfo(skb
)->gso_type
& (SKB_GSO_GRE
|
726 SKB_GSO_UDP_TUNNEL_CSUM
)) {
727 /* reset l3&l4 pointers from outer to inner headers */
728 l3
.hdr
= skb_inner_network_header(skb
);
729 l4
.hdr
= skb_inner_transport_header(skb
);
731 /* Software should clear the IPv4's checksum field when
734 if (l3
.v4
->version
== 4)
738 /* normal or tunnel packet */
739 l4_offset
= l4
.hdr
- skb
->data
;
741 /* remove payload length from inner pseudo checksum when tso */
742 l4_paylen
= skb
->len
- l4_offset
;
744 if (skb_shinfo(skb
)->gso_type
& SKB_GSO_UDP_L4
) {
745 hdr_len
= sizeof(*l4
.udp
) + l4_offset
;
746 csum_replace_by_diff(&l4
.udp
->check
,
747 (__force __wsum
)htonl(l4_paylen
));
749 hdr_len
= (l4
.tcp
->doff
<< 2) + l4_offset
;
750 csum_replace_by_diff(&l4
.tcp
->check
,
751 (__force __wsum
)htonl(l4_paylen
));
754 /* find the txbd field values */
755 *paylen_fdop_ol4cs
= skb
->len
- hdr_len
;
756 hns3_set_field(*type_cs_vlan_tso
, HNS3_TXD_TSO_B
, 1);
758 /* offload outer UDP header checksum */
759 if (skb_shinfo(skb
)->gso_type
& SKB_GSO_UDP_TUNNEL_CSUM
)
760 hns3_set_field(*paylen_fdop_ol4cs
, HNS3_TXD_OL4CS_B
, 1);
762 /* get MSS for TSO */
763 *mss
= skb_shinfo(skb
)->gso_size
;
770 static int hns3_get_l4_protocol(struct sk_buff
*skb
, u8
*ol4_proto
,
773 union l3_hdr_info l3
;
774 unsigned char *l4_hdr
;
775 unsigned char *exthdr
;
779 /* find outer header point */
780 l3
.hdr
= skb_network_header(skb
);
781 l4_hdr
= skb_transport_header(skb
);
783 if (skb
->protocol
== htons(ETH_P_IPV6
)) {
784 exthdr
= l3
.hdr
+ sizeof(*l3
.v6
);
785 l4_proto_tmp
= l3
.v6
->nexthdr
;
786 if (l4_hdr
!= exthdr
)
787 ipv6_skip_exthdr(skb
, exthdr
- skb
->data
,
788 &l4_proto_tmp
, &frag_off
);
789 } else if (skb
->protocol
== htons(ETH_P_IP
)) {
790 l4_proto_tmp
= l3
.v4
->protocol
;
795 *ol4_proto
= l4_proto_tmp
;
798 if (!skb
->encapsulation
) {
803 /* find inner header point */
804 l3
.hdr
= skb_inner_network_header(skb
);
805 l4_hdr
= skb_inner_transport_header(skb
);
807 if (l3
.v6
->version
== 6) {
808 exthdr
= l3
.hdr
+ sizeof(*l3
.v6
);
809 l4_proto_tmp
= l3
.v6
->nexthdr
;
810 if (l4_hdr
!= exthdr
)
811 ipv6_skip_exthdr(skb
, exthdr
- skb
->data
,
812 &l4_proto_tmp
, &frag_off
);
813 } else if (l3
.v4
->version
== 4) {
814 l4_proto_tmp
= l3
.v4
->protocol
;
817 *il4_proto
= l4_proto_tmp
;
822 /* when skb->encapsulation is 0, skb->ip_summed is CHECKSUM_PARTIAL
823 * and it is udp packet, which has a dest port as the IANA assigned.
824 * the hardware is expected to do the checksum offload, but the
825 * hardware will not do the checksum offload when udp dest port is
828 static bool hns3_tunnel_csum_bug(struct sk_buff
*skb
)
830 struct hns3_nic_priv
*priv
= netdev_priv(skb
->dev
);
831 struct hnae3_ae_dev
*ae_dev
= pci_get_drvdata(priv
->ae_handle
->pdev
);
832 union l4_hdr_info l4
;
834 /* device version above V3(include V3), the hardware can
835 * do this checksum offload.
837 if (ae_dev
->dev_version
>= HNAE3_DEVICE_VERSION_V3
)
840 l4
.hdr
= skb_transport_header(skb
);
842 if (!(!skb
->encapsulation
&&
843 (l4
.udp
->dest
== htons(IANA_VXLAN_UDP_PORT
) ||
844 l4
.udp
->dest
== htons(GENEVE_UDP_PORT
))))
847 skb_checksum_help(skb
);
852 static void hns3_set_outer_l2l3l4(struct sk_buff
*skb
, u8 ol4_proto
,
853 u32
*ol_type_vlan_len_msec
)
855 u32 l2_len
, l3_len
, l4_len
;
856 unsigned char *il2_hdr
;
857 union l3_hdr_info l3
;
858 union l4_hdr_info l4
;
860 l3
.hdr
= skb_network_header(skb
);
861 l4
.hdr
= skb_transport_header(skb
);
863 /* compute OL2 header size, defined in 2 Bytes */
864 l2_len
= l3
.hdr
- skb
->data
;
865 hns3_set_field(*ol_type_vlan_len_msec
, HNS3_TXD_L2LEN_S
, l2_len
>> 1);
867 /* compute OL3 header size, defined in 4 Bytes */
868 l3_len
= l4
.hdr
- l3
.hdr
;
869 hns3_set_field(*ol_type_vlan_len_msec
, HNS3_TXD_L3LEN_S
, l3_len
>> 2);
871 il2_hdr
= skb_inner_mac_header(skb
);
872 /* compute OL4 header size, defined in 4 Bytes */
873 l4_len
= il2_hdr
- l4
.hdr
;
874 hns3_set_field(*ol_type_vlan_len_msec
, HNS3_TXD_L4LEN_S
, l4_len
>> 2);
876 /* define outer network header type */
877 if (skb
->protocol
== htons(ETH_P_IP
)) {
879 hns3_set_field(*ol_type_vlan_len_msec
,
881 HNS3_OL3T_IPV4_CSUM
);
883 hns3_set_field(*ol_type_vlan_len_msec
,
885 HNS3_OL3T_IPV4_NO_CSUM
);
887 } else if (skb
->protocol
== htons(ETH_P_IPV6
)) {
888 hns3_set_field(*ol_type_vlan_len_msec
, HNS3_TXD_OL3T_S
,
892 if (ol4_proto
== IPPROTO_UDP
)
893 hns3_set_field(*ol_type_vlan_len_msec
, HNS3_TXD_TUNTYPE_S
,
894 HNS3_TUN_MAC_IN_UDP
);
895 else if (ol4_proto
== IPPROTO_GRE
)
896 hns3_set_field(*ol_type_vlan_len_msec
, HNS3_TXD_TUNTYPE_S
,
900 static int hns3_set_l2l3l4(struct sk_buff
*skb
, u8 ol4_proto
,
901 u8 il4_proto
, u32
*type_cs_vlan_tso
,
902 u32
*ol_type_vlan_len_msec
)
904 unsigned char *l2_hdr
= skb
->data
;
905 u32 l4_proto
= ol4_proto
;
906 union l4_hdr_info l4
;
907 union l3_hdr_info l3
;
910 l4
.hdr
= skb_transport_header(skb
);
911 l3
.hdr
= skb_network_header(skb
);
913 /* handle encapsulation skb */
914 if (skb
->encapsulation
) {
915 /* If this is a not UDP/GRE encapsulation skb */
916 if (!(ol4_proto
== IPPROTO_UDP
|| ol4_proto
== IPPROTO_GRE
)) {
917 /* drop the skb tunnel packet if hardware don't support,
918 * because hardware can't calculate csum when TSO.
923 /* the stack computes the IP header already,
924 * driver calculate l4 checksum when not TSO.
926 skb_checksum_help(skb
);
930 hns3_set_outer_l2l3l4(skb
, ol4_proto
, ol_type_vlan_len_msec
);
932 /* switch to inner header */
933 l2_hdr
= skb_inner_mac_header(skb
);
934 l3
.hdr
= skb_inner_network_header(skb
);
935 l4
.hdr
= skb_inner_transport_header(skb
);
936 l4_proto
= il4_proto
;
939 if (l3
.v4
->version
== 4) {
940 hns3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L3T_S
,
943 /* the stack computes the IP header already, the only time we
944 * need the hardware to recompute it is in the case of TSO.
947 hns3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L3CS_B
, 1);
948 } else if (l3
.v6
->version
== 6) {
949 hns3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L3T_S
,
953 /* compute inner(/normal) L2 header size, defined in 2 Bytes */
954 l2_len
= l3
.hdr
- l2_hdr
;
955 hns3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L2LEN_S
, l2_len
>> 1);
957 /* compute inner(/normal) L3 header size, defined in 4 Bytes */
958 l3_len
= l4
.hdr
- l3
.hdr
;
959 hns3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L3LEN_S
, l3_len
>> 2);
961 /* compute inner(/normal) L4 header size, defined in 4 Bytes */
964 hns3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L4CS_B
, 1);
965 hns3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L4T_S
,
967 hns3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L4LEN_S
,
971 if (hns3_tunnel_csum_bug(skb
))
974 hns3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L4CS_B
, 1);
975 hns3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L4T_S
,
977 hns3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L4LEN_S
,
978 (sizeof(struct udphdr
) >> 2));
981 hns3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L4CS_B
, 1);
982 hns3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L4T_S
,
984 hns3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L4LEN_S
,
985 (sizeof(struct sctphdr
) >> 2));
988 /* drop the skb tunnel packet if hardware don't support,
989 * because hardware can't calculate csum when TSO.
994 /* the stack computes the IP header already,
995 * driver calculate l4 checksum when not TSO.
997 skb_checksum_help(skb
);
1004 static int hns3_handle_vtags(struct hns3_enet_ring
*tx_ring
,
1005 struct sk_buff
*skb
)
1007 struct hnae3_handle
*handle
= tx_ring
->tqp
->handle
;
1008 struct hnae3_ae_dev
*ae_dev
;
1009 struct vlan_ethhdr
*vhdr
;
1012 if (!(skb
->protocol
== htons(ETH_P_8021Q
) ||
1013 skb_vlan_tag_present(skb
)))
1016 /* For HW limitation on HNAE3_DEVICE_VERSION_V2, if port based insert
1017 * VLAN enabled, only one VLAN header is allowed in skb, otherwise it
1018 * will cause RAS error.
1020 ae_dev
= pci_get_drvdata(handle
->pdev
);
1021 if (unlikely(skb_vlan_tagged_multi(skb
) &&
1022 ae_dev
->dev_version
<= HNAE3_DEVICE_VERSION_V2
&&
1023 handle
->port_base_vlan_state
==
1024 HNAE3_PORT_BASE_VLAN_ENABLE
))
1027 if (skb
->protocol
== htons(ETH_P_8021Q
) &&
1028 !(handle
->kinfo
.netdev
->features
& NETIF_F_HW_VLAN_CTAG_TX
)) {
1029 /* When HW VLAN acceleration is turned off, and the stack
1030 * sets the protocol to 802.1q, the driver just need to
1031 * set the protocol to the encapsulated ethertype.
1033 skb
->protocol
= vlan_get_protocol(skb
);
1037 if (skb_vlan_tag_present(skb
)) {
1038 /* Based on hw strategy, use out_vtag in two layer tag case,
1039 * and use inner_vtag in one tag case.
1041 if (skb
->protocol
== htons(ETH_P_8021Q
) &&
1042 handle
->port_base_vlan_state
==
1043 HNAE3_PORT_BASE_VLAN_DISABLE
)
1044 rc
= HNS3_OUTER_VLAN_TAG
;
1046 rc
= HNS3_INNER_VLAN_TAG
;
1048 skb
->protocol
= vlan_get_protocol(skb
);
1052 rc
= skb_cow_head(skb
, 0);
1053 if (unlikely(rc
< 0))
1056 vhdr
= (struct vlan_ethhdr
*)skb
->data
;
1057 vhdr
->h_vlan_TCI
|= cpu_to_be16((skb
->priority
<< VLAN_PRIO_SHIFT
)
1060 skb
->protocol
= vlan_get_protocol(skb
);
1064 /* check if the hardware is capable of checksum offloading */
1065 static bool hns3_check_hw_tx_csum(struct sk_buff
*skb
)
1067 struct hns3_nic_priv
*priv
= netdev_priv(skb
->dev
);
1069 /* Kindly note, due to backward compatibility of the TX descriptor,
1070 * HW checksum of the non-IP packets and GSO packets is handled at
1071 * different place in the following code
1073 if (skb
->csum_not_inet
|| skb_is_gso(skb
) ||
1074 !test_bit(HNS3_NIC_STATE_HW_TX_CSUM_ENABLE
, &priv
->state
))
1080 static int hns3_fill_skb_desc(struct hns3_enet_ring
*ring
,
1081 struct sk_buff
*skb
, struct hns3_desc
*desc
)
1083 u32 ol_type_vlan_len_msec
= 0;
1084 u32 paylen_ol4cs
= skb
->len
;
1085 u32 type_cs_vlan_tso
= 0;
1086 u16 mss_hw_csum
= 0;
1091 ret
= hns3_handle_vtags(ring
, skb
);
1092 if (unlikely(ret
< 0)) {
1093 u64_stats_update_begin(&ring
->syncp
);
1094 ring
->stats
.tx_vlan_err
++;
1095 u64_stats_update_end(&ring
->syncp
);
1097 } else if (ret
== HNS3_INNER_VLAN_TAG
) {
1098 inner_vtag
= skb_vlan_tag_get(skb
);
1099 inner_vtag
|= (skb
->priority
<< VLAN_PRIO_SHIFT
) &
1101 hns3_set_field(type_cs_vlan_tso
, HNS3_TXD_VLAN_B
, 1);
1102 } else if (ret
== HNS3_OUTER_VLAN_TAG
) {
1103 out_vtag
= skb_vlan_tag_get(skb
);
1104 out_vtag
|= (skb
->priority
<< VLAN_PRIO_SHIFT
) &
1106 hns3_set_field(ol_type_vlan_len_msec
, HNS3_TXD_OVLAN_B
,
1110 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1111 u8 ol4_proto
, il4_proto
;
1113 if (hns3_check_hw_tx_csum(skb
)) {
1114 /* set checksum start and offset, defined in 2 Bytes */
1115 hns3_set_field(type_cs_vlan_tso
, HNS3_TXD_CSUM_START_S
,
1116 skb_checksum_start_offset(skb
) >> 1);
1117 hns3_set_field(ol_type_vlan_len_msec
,
1118 HNS3_TXD_CSUM_OFFSET_S
,
1119 skb
->csum_offset
>> 1);
1120 mss_hw_csum
|= BIT(HNS3_TXD_HW_CS_B
);
1121 goto out_hw_tx_csum
;
1124 skb_reset_mac_len(skb
);
1126 ret
= hns3_get_l4_protocol(skb
, &ol4_proto
, &il4_proto
);
1127 if (unlikely(ret
< 0)) {
1128 u64_stats_update_begin(&ring
->syncp
);
1129 ring
->stats
.tx_l4_proto_err
++;
1130 u64_stats_update_end(&ring
->syncp
);
1134 ret
= hns3_set_l2l3l4(skb
, ol4_proto
, il4_proto
,
1136 &ol_type_vlan_len_msec
);
1137 if (unlikely(ret
< 0)) {
1138 u64_stats_update_begin(&ring
->syncp
);
1139 ring
->stats
.tx_l2l3l4_err
++;
1140 u64_stats_update_end(&ring
->syncp
);
1144 ret
= hns3_set_tso(skb
, &paylen_ol4cs
, &mss_hw_csum
,
1146 if (unlikely(ret
< 0)) {
1147 u64_stats_update_begin(&ring
->syncp
);
1148 ring
->stats
.tx_tso_err
++;
1149 u64_stats_update_end(&ring
->syncp
);
1156 desc
->tx
.ol_type_vlan_len_msec
=
1157 cpu_to_le32(ol_type_vlan_len_msec
);
1158 desc
->tx
.type_cs_vlan_tso_len
= cpu_to_le32(type_cs_vlan_tso
);
1159 desc
->tx
.paylen_ol4cs
= cpu_to_le32(paylen_ol4cs
);
1160 desc
->tx
.mss_hw_csum
= cpu_to_le16(mss_hw_csum
);
1161 desc
->tx
.vlan_tag
= cpu_to_le16(inner_vtag
);
1162 desc
->tx
.outer_vlan_tag
= cpu_to_le16(out_vtag
);
1167 static int hns3_fill_desc(struct hns3_enet_ring
*ring
, void *priv
,
1168 unsigned int size
, enum hns_desc_type type
)
1170 #define HNS3_LIKELY_BD_NUM 1
1172 struct hns3_desc_cb
*desc_cb
= &ring
->desc_cb
[ring
->next_to_use
];
1173 struct hns3_desc
*desc
= &ring
->desc
[ring
->next_to_use
];
1174 struct device
*dev
= ring_to_dev(ring
);
1176 unsigned int frag_buf_num
;
1180 if (type
== DESC_TYPE_FRAGLIST_SKB
||
1181 type
== DESC_TYPE_SKB
) {
1182 struct sk_buff
*skb
= (struct sk_buff
*)priv
;
1184 dma
= dma_map_single(dev
, skb
->data
, size
, DMA_TO_DEVICE
);
1186 frag
= (skb_frag_t
*)priv
;
1187 dma
= skb_frag_dma_map(dev
, frag
, 0, size
, DMA_TO_DEVICE
);
1190 if (unlikely(dma_mapping_error(dev
, dma
))) {
1191 u64_stats_update_begin(&ring
->syncp
);
1192 ring
->stats
.sw_err_cnt
++;
1193 u64_stats_update_end(&ring
->syncp
);
1197 desc_cb
->priv
= priv
;
1198 desc_cb
->length
= size
;
1200 desc_cb
->type
= type
;
1202 if (likely(size
<= HNS3_MAX_BD_SIZE
)) {
1203 desc
->addr
= cpu_to_le64(dma
);
1204 desc
->tx
.send_size
= cpu_to_le16(size
);
1205 desc
->tx
.bdtp_fe_sc_vld_ra_ri
=
1206 cpu_to_le16(BIT(HNS3_TXD_VLD_B
));
1208 trace_hns3_tx_desc(ring
, ring
->next_to_use
);
1209 ring_ptr_move_fw(ring
, next_to_use
);
1210 return HNS3_LIKELY_BD_NUM
;
1213 frag_buf_num
= hns3_tx_bd_count(size
);
1214 sizeoflast
= size
% HNS3_MAX_BD_SIZE
;
1215 sizeoflast
= sizeoflast
? sizeoflast
: HNS3_MAX_BD_SIZE
;
1217 /* When frag size is bigger than hardware limit, split this frag */
1218 for (k
= 0; k
< frag_buf_num
; k
++) {
1219 /* now, fill the descriptor */
1220 desc
->addr
= cpu_to_le64(dma
+ HNS3_MAX_BD_SIZE
* k
);
1221 desc
->tx
.send_size
= cpu_to_le16((k
== frag_buf_num
- 1) ?
1222 (u16
)sizeoflast
: (u16
)HNS3_MAX_BD_SIZE
);
1223 desc
->tx
.bdtp_fe_sc_vld_ra_ri
=
1224 cpu_to_le16(BIT(HNS3_TXD_VLD_B
));
1226 trace_hns3_tx_desc(ring
, ring
->next_to_use
);
1227 /* move ring pointer to next */
1228 ring_ptr_move_fw(ring
, next_to_use
);
1230 desc
= &ring
->desc
[ring
->next_to_use
];
1233 return frag_buf_num
;
1236 static unsigned int hns3_skb_bd_num(struct sk_buff
*skb
, unsigned int *bd_size
,
1237 unsigned int bd_num
)
1242 size
= skb_headlen(skb
);
1243 while (size
> HNS3_MAX_BD_SIZE
) {
1244 bd_size
[bd_num
++] = HNS3_MAX_BD_SIZE
;
1245 size
-= HNS3_MAX_BD_SIZE
;
1247 if (bd_num
> HNS3_MAX_TSO_BD_NUM
)
1252 bd_size
[bd_num
++] = size
;
1253 if (bd_num
> HNS3_MAX_TSO_BD_NUM
)
1257 for (i
= 0; i
< skb_shinfo(skb
)->nr_frags
; i
++) {
1258 skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[i
];
1259 size
= skb_frag_size(frag
);
1263 while (size
> HNS3_MAX_BD_SIZE
) {
1264 bd_size
[bd_num
++] = HNS3_MAX_BD_SIZE
;
1265 size
-= HNS3_MAX_BD_SIZE
;
1267 if (bd_num
> HNS3_MAX_TSO_BD_NUM
)
1271 bd_size
[bd_num
++] = size
;
1272 if (bd_num
> HNS3_MAX_TSO_BD_NUM
)
1279 static unsigned int hns3_tx_bd_num(struct sk_buff
*skb
, unsigned int *bd_size
,
1280 u8 max_non_tso_bd_num
)
1282 struct sk_buff
*frag_skb
;
1283 unsigned int bd_num
= 0;
1285 /* If the total len is within the max bd limit */
1286 if (likely(skb
->len
<= HNS3_MAX_BD_SIZE
&& !skb_has_frag_list(skb
) &&
1287 skb_shinfo(skb
)->nr_frags
< max_non_tso_bd_num
))
1288 return skb_shinfo(skb
)->nr_frags
+ 1U;
1290 /* The below case will always be linearized, return
1291 * HNS3_MAX_BD_NUM_TSO + 1U to make sure it is linearized.
1293 if (unlikely(skb
->len
> HNS3_MAX_TSO_SIZE
||
1294 (!skb_is_gso(skb
) && skb
->len
>
1295 HNS3_MAX_NON_TSO_SIZE(max_non_tso_bd_num
))))
1296 return HNS3_MAX_TSO_BD_NUM
+ 1U;
1298 bd_num
= hns3_skb_bd_num(skb
, bd_size
, bd_num
);
1300 if (!skb_has_frag_list(skb
) || bd_num
> HNS3_MAX_TSO_BD_NUM
)
1303 skb_walk_frags(skb
, frag_skb
) {
1304 bd_num
= hns3_skb_bd_num(frag_skb
, bd_size
, bd_num
);
1305 if (bd_num
> HNS3_MAX_TSO_BD_NUM
)
1312 static unsigned int hns3_gso_hdr_len(struct sk_buff
*skb
)
1314 if (!skb
->encapsulation
)
1315 return skb_transport_offset(skb
) + tcp_hdrlen(skb
);
1317 return skb_inner_transport_offset(skb
) + inner_tcp_hdrlen(skb
);
1320 /* HW need every continuous max_non_tso_bd_num buffer data to be larger
1321 * than MSS, we simplify it by ensuring skb_headlen + the first continuous
1322 * max_non_tso_bd_num - 1 frags to be larger than gso header len + mss,
1323 * and the remaining continuous max_non_tso_bd_num - 1 frags to be larger
1324 * than MSS except the last max_non_tso_bd_num - 1 frags.
1326 static bool hns3_skb_need_linearized(struct sk_buff
*skb
, unsigned int *bd_size
,
1327 unsigned int bd_num
, u8 max_non_tso_bd_num
)
1329 unsigned int tot_len
= 0;
1332 for (i
= 0; i
< max_non_tso_bd_num
- 1U; i
++)
1333 tot_len
+= bd_size
[i
];
1335 /* ensure the first max_non_tso_bd_num frags is greater than
1338 if (tot_len
+ bd_size
[max_non_tso_bd_num
- 1U] <
1339 skb_shinfo(skb
)->gso_size
+ hns3_gso_hdr_len(skb
))
1342 /* ensure every continuous max_non_tso_bd_num - 1 buffer is greater
1343 * than mss except the last one.
1345 for (i
= 0; i
< bd_num
- max_non_tso_bd_num
; i
++) {
1346 tot_len
-= bd_size
[i
];
1347 tot_len
+= bd_size
[i
+ max_non_tso_bd_num
- 1U];
1349 if (tot_len
< skb_shinfo(skb
)->gso_size
)
1356 void hns3_shinfo_pack(struct skb_shared_info
*shinfo
, __u32
*size
)
1360 for (i
= 0; i
< MAX_SKB_FRAGS
; i
++)
1361 size
[i
] = skb_frag_size(&shinfo
->frags
[i
]);
1364 static int hns3_nic_maybe_stop_tx(struct hns3_enet_ring
*ring
,
1365 struct net_device
*netdev
,
1366 struct sk_buff
*skb
)
1368 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
1369 u8 max_non_tso_bd_num
= priv
->max_non_tso_bd_num
;
1370 unsigned int bd_size
[HNS3_MAX_TSO_BD_NUM
+ 1U];
1371 unsigned int bd_num
;
1373 bd_num
= hns3_tx_bd_num(skb
, bd_size
, max_non_tso_bd_num
);
1374 if (unlikely(bd_num
> max_non_tso_bd_num
)) {
1375 if (bd_num
<= HNS3_MAX_TSO_BD_NUM
&& skb_is_gso(skb
) &&
1376 !hns3_skb_need_linearized(skb
, bd_size
, bd_num
,
1377 max_non_tso_bd_num
)) {
1378 trace_hns3_over_max_bd(skb
);
1382 if (__skb_linearize(skb
))
1385 bd_num
= hns3_tx_bd_count(skb
->len
);
1386 if ((skb_is_gso(skb
) && bd_num
> HNS3_MAX_TSO_BD_NUM
) ||
1387 (!skb_is_gso(skb
) &&
1388 bd_num
> max_non_tso_bd_num
)) {
1389 trace_hns3_over_max_bd(skb
);
1393 u64_stats_update_begin(&ring
->syncp
);
1394 ring
->stats
.tx_copy
++;
1395 u64_stats_update_end(&ring
->syncp
);
1399 if (likely(ring_space(ring
) >= bd_num
))
1402 netif_stop_subqueue(netdev
, ring
->queue_index
);
1403 smp_mb(); /* Memory barrier before checking ring_space */
1405 /* Start queue in case hns3_clean_tx_ring has just made room
1406 * available and has not seen the queue stopped state performed
1407 * by netif_stop_subqueue above.
1409 if (ring_space(ring
) >= bd_num
&& netif_carrier_ok(netdev
) &&
1410 !test_bit(HNS3_NIC_STATE_DOWN
, &priv
->state
)) {
1411 netif_start_subqueue(netdev
, ring
->queue_index
);
1418 static void hns3_clear_desc(struct hns3_enet_ring
*ring
, int next_to_use_orig
)
1420 struct device
*dev
= ring_to_dev(ring
);
1423 for (i
= 0; i
< ring
->desc_num
; i
++) {
1424 struct hns3_desc
*desc
= &ring
->desc
[ring
->next_to_use
];
1426 memset(desc
, 0, sizeof(*desc
));
1428 /* check if this is where we started */
1429 if (ring
->next_to_use
== next_to_use_orig
)
1433 ring_ptr_move_bw(ring
, next_to_use
);
1435 if (!ring
->desc_cb
[ring
->next_to_use
].dma
)
1438 /* unmap the descriptor dma address */
1439 if (ring
->desc_cb
[ring
->next_to_use
].type
== DESC_TYPE_SKB
||
1440 ring
->desc_cb
[ring
->next_to_use
].type
==
1441 DESC_TYPE_FRAGLIST_SKB
)
1442 dma_unmap_single(dev
,
1443 ring
->desc_cb
[ring
->next_to_use
].dma
,
1444 ring
->desc_cb
[ring
->next_to_use
].length
,
1446 else if (ring
->desc_cb
[ring
->next_to_use
].length
)
1448 ring
->desc_cb
[ring
->next_to_use
].dma
,
1449 ring
->desc_cb
[ring
->next_to_use
].length
,
1452 ring
->desc_cb
[ring
->next_to_use
].length
= 0;
1453 ring
->desc_cb
[ring
->next_to_use
].dma
= 0;
1454 ring
->desc_cb
[ring
->next_to_use
].type
= DESC_TYPE_UNKNOWN
;
1458 static int hns3_fill_skb_to_desc(struct hns3_enet_ring
*ring
,
1459 struct sk_buff
*skb
, enum hns_desc_type type
)
1461 unsigned int size
= skb_headlen(skb
);
1462 int i
, ret
, bd_num
= 0;
1465 ret
= hns3_fill_desc(ring
, skb
, size
, type
);
1466 if (unlikely(ret
< 0))
1472 for (i
= 0; i
< skb_shinfo(skb
)->nr_frags
; i
++) {
1473 skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[i
];
1475 size
= skb_frag_size(frag
);
1479 ret
= hns3_fill_desc(ring
, frag
, size
, DESC_TYPE_PAGE
);
1480 if (unlikely(ret
< 0))
1489 static void hns3_tx_doorbell(struct hns3_enet_ring
*ring
, int num
,
1492 ring
->pending_buf
+= num
;
1495 u64_stats_update_begin(&ring
->syncp
);
1496 ring
->stats
.tx_more
++;
1497 u64_stats_update_end(&ring
->syncp
);
1501 if (!ring
->pending_buf
)
1504 writel(ring
->pending_buf
,
1505 ring
->tqp
->io_base
+ HNS3_RING_TX_RING_TAIL_REG
);
1506 ring
->pending_buf
= 0;
1507 WRITE_ONCE(ring
->last_to_use
, ring
->next_to_use
);
1510 netdev_tx_t
hns3_nic_net_xmit(struct sk_buff
*skb
, struct net_device
*netdev
)
1512 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
1513 struct hns3_enet_ring
*ring
= &priv
->ring
[skb
->queue_mapping
];
1514 struct netdev_queue
*dev_queue
;
1515 int pre_ntu
, next_to_use_head
;
1516 struct sk_buff
*frag_skb
;
1521 /* Hardware can only handle short frames above 32 bytes */
1522 if (skb_put_padto(skb
, HNS3_MIN_TX_LEN
)) {
1523 hns3_tx_doorbell(ring
, 0, !netdev_xmit_more());
1524 return NETDEV_TX_OK
;
1527 /* Prefetch the data used later */
1528 prefetch(skb
->data
);
1530 ret
= hns3_nic_maybe_stop_tx(ring
, netdev
, skb
);
1531 if (unlikely(ret
<= 0)) {
1532 if (ret
== -EBUSY
) {
1533 u64_stats_update_begin(&ring
->syncp
);
1534 ring
->stats
.tx_busy
++;
1535 u64_stats_update_end(&ring
->syncp
);
1536 hns3_tx_doorbell(ring
, 0, true);
1537 return NETDEV_TX_BUSY
;
1538 } else if (ret
== -ENOMEM
) {
1539 u64_stats_update_begin(&ring
->syncp
);
1540 ring
->stats
.sw_err_cnt
++;
1541 u64_stats_update_end(&ring
->syncp
);
1544 hns3_rl_err(netdev
, "xmit error: %d!\n", ret
);
1548 next_to_use_head
= ring
->next_to_use
;
1550 ret
= hns3_fill_skb_desc(ring
, skb
, &ring
->desc
[ring
->next_to_use
]);
1551 if (unlikely(ret
< 0))
1554 ret
= hns3_fill_skb_to_desc(ring
, skb
, DESC_TYPE_SKB
);
1555 if (unlikely(ret
< 0))
1560 skb_walk_frags(skb
, frag_skb
) {
1561 ret
= hns3_fill_skb_to_desc(ring
, frag_skb
,
1562 DESC_TYPE_FRAGLIST_SKB
);
1563 if (unlikely(ret
< 0))
1569 pre_ntu
= ring
->next_to_use
? (ring
->next_to_use
- 1) :
1570 (ring
->desc_num
- 1);
1571 ring
->desc
[pre_ntu
].tx
.bdtp_fe_sc_vld_ra_ri
|=
1572 cpu_to_le16(BIT(HNS3_TXD_FE_B
));
1573 trace_hns3_tx_desc(ring
, pre_ntu
);
1575 /* Complete translate all packets */
1576 dev_queue
= netdev_get_tx_queue(netdev
, ring
->queue_index
);
1577 doorbell
= __netdev_tx_sent_queue(dev_queue
, skb
->len
,
1578 netdev_xmit_more());
1579 hns3_tx_doorbell(ring
, bd_num
, doorbell
);
1581 return NETDEV_TX_OK
;
1584 hns3_clear_desc(ring
, next_to_use_head
);
1587 dev_kfree_skb_any(skb
);
1588 hns3_tx_doorbell(ring
, 0, !netdev_xmit_more());
1589 return NETDEV_TX_OK
;
1592 static int hns3_nic_net_set_mac_address(struct net_device
*netdev
, void *p
)
1594 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
1595 struct sockaddr
*mac_addr
= p
;
1598 if (!mac_addr
|| !is_valid_ether_addr((const u8
*)mac_addr
->sa_data
))
1599 return -EADDRNOTAVAIL
;
1601 if (ether_addr_equal(netdev
->dev_addr
, mac_addr
->sa_data
)) {
1602 netdev_info(netdev
, "already using mac address %pM\n",
1607 /* For VF device, if there is a perm_addr, then the user will not
1608 * be allowed to change the address.
1610 if (!hns3_is_phys_func(h
->pdev
) &&
1611 !is_zero_ether_addr(netdev
->perm_addr
)) {
1612 netdev_err(netdev
, "has permanent MAC %pM, user MAC %pM not allow\n",
1613 netdev
->perm_addr
, mac_addr
->sa_data
);
1617 ret
= h
->ae_algo
->ops
->set_mac_addr(h
, mac_addr
->sa_data
, false);
1619 netdev_err(netdev
, "set_mac_address fail, ret=%d!\n", ret
);
1623 ether_addr_copy(netdev
->dev_addr
, mac_addr
->sa_data
);
1628 static int hns3_nic_do_ioctl(struct net_device
*netdev
,
1629 struct ifreq
*ifr
, int cmd
)
1631 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
1633 if (!netif_running(netdev
))
1636 if (!h
->ae_algo
->ops
->do_ioctl
)
1639 return h
->ae_algo
->ops
->do_ioctl(h
, ifr
, cmd
);
1642 static int hns3_nic_set_features(struct net_device
*netdev
,
1643 netdev_features_t features
)
1645 netdev_features_t changed
= netdev
->features
^ features
;
1646 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
1647 struct hnae3_handle
*h
= priv
->ae_handle
;
1651 if (changed
& (NETIF_F_GRO_HW
) && h
->ae_algo
->ops
->set_gro_en
) {
1652 enable
= !!(features
& NETIF_F_GRO_HW
);
1653 ret
= h
->ae_algo
->ops
->set_gro_en(h
, enable
);
1658 if ((changed
& NETIF_F_HW_VLAN_CTAG_RX
) &&
1659 h
->ae_algo
->ops
->enable_hw_strip_rxvtag
) {
1660 enable
= !!(features
& NETIF_F_HW_VLAN_CTAG_RX
);
1661 ret
= h
->ae_algo
->ops
->enable_hw_strip_rxvtag(h
, enable
);
1666 if ((changed
& NETIF_F_NTUPLE
) && h
->ae_algo
->ops
->enable_fd
) {
1667 enable
= !!(features
& NETIF_F_NTUPLE
);
1668 h
->ae_algo
->ops
->enable_fd(h
, enable
);
1671 if ((netdev
->features
& NETIF_F_HW_TC
) > (features
& NETIF_F_HW_TC
) &&
1672 h
->ae_algo
->ops
->cls_flower_active(h
)) {
1674 "there are offloaded TC filters active, cannot disable HW TC offload");
1678 netdev
->features
= features
;
1682 static netdev_features_t
hns3_features_check(struct sk_buff
*skb
,
1683 struct net_device
*dev
,
1684 netdev_features_t features
)
1686 #define HNS3_MAX_HDR_LEN 480U
1687 #define HNS3_MAX_L4_HDR_LEN 60U
1691 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
1694 if (skb
->encapsulation
)
1695 len
= skb_inner_transport_header(skb
) - skb
->data
;
1697 len
= skb_transport_header(skb
) - skb
->data
;
1699 /* Assume L4 is 60 byte as TCP is the only protocol with a
1700 * a flexible value, and it's max len is 60 bytes.
1702 len
+= HNS3_MAX_L4_HDR_LEN
;
1704 /* Hardware only supports checksum on the skb with a max header
1707 if (len
> HNS3_MAX_HDR_LEN
)
1708 features
&= ~(NETIF_F_CSUM_MASK
| NETIF_F_GSO_MASK
);
1713 static void hns3_nic_get_stats64(struct net_device
*netdev
,
1714 struct rtnl_link_stats64
*stats
)
1716 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
1717 int queue_num
= priv
->ae_handle
->kinfo
.num_tqps
;
1718 struct hnae3_handle
*handle
= priv
->ae_handle
;
1719 struct hns3_enet_ring
*ring
;
1720 u64 rx_length_errors
= 0;
1721 u64 rx_crc_errors
= 0;
1722 u64 rx_multicast
= 0;
1734 if (test_bit(HNS3_NIC_STATE_DOWN
, &priv
->state
))
1737 handle
->ae_algo
->ops
->update_stats(handle
, &netdev
->stats
);
1739 for (idx
= 0; idx
< queue_num
; idx
++) {
1740 /* fetch the tx stats */
1741 ring
= &priv
->ring
[idx
];
1743 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
1744 tx_bytes
+= ring
->stats
.tx_bytes
;
1745 tx_pkts
+= ring
->stats
.tx_pkts
;
1746 tx_drop
+= ring
->stats
.sw_err_cnt
;
1747 tx_drop
+= ring
->stats
.tx_vlan_err
;
1748 tx_drop
+= ring
->stats
.tx_l4_proto_err
;
1749 tx_drop
+= ring
->stats
.tx_l2l3l4_err
;
1750 tx_drop
+= ring
->stats
.tx_tso_err
;
1751 tx_errors
+= ring
->stats
.sw_err_cnt
;
1752 tx_errors
+= ring
->stats
.tx_vlan_err
;
1753 tx_errors
+= ring
->stats
.tx_l4_proto_err
;
1754 tx_errors
+= ring
->stats
.tx_l2l3l4_err
;
1755 tx_errors
+= ring
->stats
.tx_tso_err
;
1756 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
1758 /* fetch the rx stats */
1759 ring
= &priv
->ring
[idx
+ queue_num
];
1761 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
1762 rx_bytes
+= ring
->stats
.rx_bytes
;
1763 rx_pkts
+= ring
->stats
.rx_pkts
;
1764 rx_drop
+= ring
->stats
.l2_err
;
1765 rx_errors
+= ring
->stats
.l2_err
;
1766 rx_errors
+= ring
->stats
.l3l4_csum_err
;
1767 rx_crc_errors
+= ring
->stats
.l2_err
;
1768 rx_multicast
+= ring
->stats
.rx_multicast
;
1769 rx_length_errors
+= ring
->stats
.err_pkt_len
;
1770 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
1773 stats
->tx_bytes
= tx_bytes
;
1774 stats
->tx_packets
= tx_pkts
;
1775 stats
->rx_bytes
= rx_bytes
;
1776 stats
->rx_packets
= rx_pkts
;
1778 stats
->rx_errors
= rx_errors
;
1779 stats
->multicast
= rx_multicast
;
1780 stats
->rx_length_errors
= rx_length_errors
;
1781 stats
->rx_crc_errors
= rx_crc_errors
;
1782 stats
->rx_missed_errors
= netdev
->stats
.rx_missed_errors
;
1784 stats
->tx_errors
= tx_errors
;
1785 stats
->rx_dropped
= rx_drop
;
1786 stats
->tx_dropped
= tx_drop
;
1787 stats
->collisions
= netdev
->stats
.collisions
;
1788 stats
->rx_over_errors
= netdev
->stats
.rx_over_errors
;
1789 stats
->rx_frame_errors
= netdev
->stats
.rx_frame_errors
;
1790 stats
->rx_fifo_errors
= netdev
->stats
.rx_fifo_errors
;
1791 stats
->tx_aborted_errors
= netdev
->stats
.tx_aborted_errors
;
1792 stats
->tx_carrier_errors
= netdev
->stats
.tx_carrier_errors
;
1793 stats
->tx_fifo_errors
= netdev
->stats
.tx_fifo_errors
;
1794 stats
->tx_heartbeat_errors
= netdev
->stats
.tx_heartbeat_errors
;
1795 stats
->tx_window_errors
= netdev
->stats
.tx_window_errors
;
1796 stats
->rx_compressed
= netdev
->stats
.rx_compressed
;
1797 stats
->tx_compressed
= netdev
->stats
.tx_compressed
;
1800 static int hns3_setup_tc(struct net_device
*netdev
, void *type_data
)
1802 struct tc_mqprio_qopt_offload
*mqprio_qopt
= type_data
;
1803 struct hnae3_knic_private_info
*kinfo
;
1804 u8 tc
= mqprio_qopt
->qopt
.num_tc
;
1805 u16 mode
= mqprio_qopt
->mode
;
1806 u8 hw
= mqprio_qopt
->qopt
.hw
;
1807 struct hnae3_handle
*h
;
1809 if (!((hw
== TC_MQPRIO_HW_OFFLOAD_TCS
&&
1810 mode
== TC_MQPRIO_MODE_CHANNEL
) || (!hw
&& tc
== 0)))
1813 if (tc
> HNAE3_MAX_TC
)
1819 h
= hns3_get_handle(netdev
);
1822 netif_dbg(h
, drv
, netdev
, "setup tc: num_tc=%u\n", tc
);
1824 return (kinfo
->dcb_ops
&& kinfo
->dcb_ops
->setup_tc
) ?
1825 kinfo
->dcb_ops
->setup_tc(h
, mqprio_qopt
) : -EOPNOTSUPP
;
1828 static int hns3_setup_tc_cls_flower(struct hns3_nic_priv
*priv
,
1829 struct flow_cls_offload
*flow
)
1831 int tc
= tc_classid_to_hwtc(priv
->netdev
, flow
->classid
);
1832 struct hnae3_handle
*h
= hns3_get_handle(priv
->netdev
);
1834 switch (flow
->command
) {
1835 case FLOW_CLS_REPLACE
:
1836 if (h
->ae_algo
->ops
->add_cls_flower
)
1837 return h
->ae_algo
->ops
->add_cls_flower(h
, flow
, tc
);
1839 case FLOW_CLS_DESTROY
:
1840 if (h
->ae_algo
->ops
->del_cls_flower
)
1841 return h
->ae_algo
->ops
->del_cls_flower(h
, flow
);
1850 static int hns3_setup_tc_block_cb(enum tc_setup_type type
, void *type_data
,
1853 struct hns3_nic_priv
*priv
= cb_priv
;
1855 if (!tc_cls_can_offload_and_chain0(priv
->netdev
, type_data
))
1859 case TC_SETUP_CLSFLOWER
:
1860 return hns3_setup_tc_cls_flower(priv
, type_data
);
1866 static LIST_HEAD(hns3_block_cb_list
);
1868 static int hns3_nic_setup_tc(struct net_device
*dev
, enum tc_setup_type type
,
1871 struct hns3_nic_priv
*priv
= netdev_priv(dev
);
1875 case TC_SETUP_QDISC_MQPRIO
:
1876 ret
= hns3_setup_tc(dev
, type_data
);
1878 case TC_SETUP_BLOCK
:
1879 ret
= flow_block_cb_setup_simple(type_data
,
1880 &hns3_block_cb_list
,
1881 hns3_setup_tc_block_cb
,
1891 static int hns3_vlan_rx_add_vid(struct net_device
*netdev
,
1892 __be16 proto
, u16 vid
)
1894 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
1897 if (h
->ae_algo
->ops
->set_vlan_filter
)
1898 ret
= h
->ae_algo
->ops
->set_vlan_filter(h
, proto
, vid
, false);
1903 static int hns3_vlan_rx_kill_vid(struct net_device
*netdev
,
1904 __be16 proto
, u16 vid
)
1906 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
1909 if (h
->ae_algo
->ops
->set_vlan_filter
)
1910 ret
= h
->ae_algo
->ops
->set_vlan_filter(h
, proto
, vid
, true);
1915 static int hns3_ndo_set_vf_vlan(struct net_device
*netdev
, int vf
, u16 vlan
,
1916 u8 qos
, __be16 vlan_proto
)
1918 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
1921 netif_dbg(h
, drv
, netdev
,
1922 "set vf vlan: vf=%d, vlan=%u, qos=%u, vlan_proto=0x%x\n",
1923 vf
, vlan
, qos
, ntohs(vlan_proto
));
1925 if (h
->ae_algo
->ops
->set_vf_vlan_filter
)
1926 ret
= h
->ae_algo
->ops
->set_vf_vlan_filter(h
, vf
, vlan
,
1932 static int hns3_set_vf_spoofchk(struct net_device
*netdev
, int vf
, bool enable
)
1934 struct hnae3_handle
*handle
= hns3_get_handle(netdev
);
1936 if (hns3_nic_resetting(netdev
))
1939 if (!handle
->ae_algo
->ops
->set_vf_spoofchk
)
1942 return handle
->ae_algo
->ops
->set_vf_spoofchk(handle
, vf
, enable
);
1945 static int hns3_set_vf_trust(struct net_device
*netdev
, int vf
, bool enable
)
1947 struct hnae3_handle
*handle
= hns3_get_handle(netdev
);
1949 if (!handle
->ae_algo
->ops
->set_vf_trust
)
1952 return handle
->ae_algo
->ops
->set_vf_trust(handle
, vf
, enable
);
1955 static int hns3_nic_change_mtu(struct net_device
*netdev
, int new_mtu
)
1957 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
1960 if (hns3_nic_resetting(netdev
))
1963 if (!h
->ae_algo
->ops
->set_mtu
)
1966 netif_dbg(h
, drv
, netdev
,
1967 "change mtu from %u to %d\n", netdev
->mtu
, new_mtu
);
1969 ret
= h
->ae_algo
->ops
->set_mtu(h
, new_mtu
);
1971 netdev_err(netdev
, "failed to change MTU in hardware %d\n",
1974 netdev
->mtu
= new_mtu
;
1979 static bool hns3_get_tx_timeo_queue_info(struct net_device
*ndev
)
1981 struct hns3_nic_priv
*priv
= netdev_priv(ndev
);
1982 struct hnae3_handle
*h
= hns3_get_handle(ndev
);
1983 struct hns3_enet_ring
*tx_ring
;
1984 struct napi_struct
*napi
;
1985 int timeout_queue
= 0;
1986 int hw_head
, hw_tail
;
1987 int fbd_num
, fbd_oft
;
1988 int ebd_num
, ebd_oft
;
1993 /* Find the stopped queue the same way the stack does */
1994 for (i
= 0; i
< ndev
->num_tx_queues
; i
++) {
1995 struct netdev_queue
*q
;
1996 unsigned long trans_start
;
1998 q
= netdev_get_tx_queue(ndev
, i
);
1999 trans_start
= q
->trans_start
;
2000 if (netif_xmit_stopped(q
) &&
2002 (trans_start
+ ndev
->watchdog_timeo
))) {
2004 netdev_info(ndev
, "queue state: 0x%lx, delta msecs: %u\n",
2006 jiffies_to_msecs(jiffies
- trans_start
));
2011 if (i
== ndev
->num_tx_queues
) {
2013 "no netdev TX timeout queue found, timeout count: %llu\n",
2014 priv
->tx_timeout_count
);
2018 priv
->tx_timeout_count
++;
2020 tx_ring
= &priv
->ring
[timeout_queue
];
2021 napi
= &tx_ring
->tqp_vector
->napi
;
2024 "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, napi state: %lu\n",
2025 priv
->tx_timeout_count
, timeout_queue
, tx_ring
->next_to_use
,
2026 tx_ring
->next_to_clean
, napi
->state
);
2029 "tx_pkts: %llu, tx_bytes: %llu, sw_err_cnt: %llu, tx_pending: %d\n",
2030 tx_ring
->stats
.tx_pkts
, tx_ring
->stats
.tx_bytes
,
2031 tx_ring
->stats
.sw_err_cnt
, tx_ring
->pending_buf
);
2034 "seg_pkt_cnt: %llu, tx_more: %llu, restart_queue: %llu, tx_busy: %llu\n",
2035 tx_ring
->stats
.seg_pkt_cnt
, tx_ring
->stats
.tx_more
,
2036 tx_ring
->stats
.restart_queue
, tx_ring
->stats
.tx_busy
);
2038 /* When mac received many pause frames continuous, it's unable to send
2039 * packets, which may cause tx timeout
2041 if (h
->ae_algo
->ops
->get_mac_stats
) {
2042 struct hns3_mac_stats mac_stats
;
2044 h
->ae_algo
->ops
->get_mac_stats(h
, &mac_stats
);
2045 netdev_info(ndev
, "tx_pause_cnt: %llu, rx_pause_cnt: %llu\n",
2046 mac_stats
.tx_pause_cnt
, mac_stats
.rx_pause_cnt
);
2049 hw_head
= readl_relaxed(tx_ring
->tqp
->io_base
+
2050 HNS3_RING_TX_RING_HEAD_REG
);
2051 hw_tail
= readl_relaxed(tx_ring
->tqp
->io_base
+
2052 HNS3_RING_TX_RING_TAIL_REG
);
2053 fbd_num
= readl_relaxed(tx_ring
->tqp
->io_base
+
2054 HNS3_RING_TX_RING_FBDNUM_REG
);
2055 fbd_oft
= readl_relaxed(tx_ring
->tqp
->io_base
+
2056 HNS3_RING_TX_RING_OFFSET_REG
);
2057 ebd_num
= readl_relaxed(tx_ring
->tqp
->io_base
+
2058 HNS3_RING_TX_RING_EBDNUM_REG
);
2059 ebd_oft
= readl_relaxed(tx_ring
->tqp
->io_base
+
2060 HNS3_RING_TX_RING_EBD_OFFSET_REG
);
2061 bd_num
= readl_relaxed(tx_ring
->tqp
->io_base
+
2062 HNS3_RING_TX_RING_BD_NUM_REG
);
2063 bd_err
= readl_relaxed(tx_ring
->tqp
->io_base
+
2064 HNS3_RING_TX_RING_BD_ERR_REG
);
2065 ring_en
= readl_relaxed(tx_ring
->tqp
->io_base
+ HNS3_RING_EN_REG
);
2066 tc
= readl_relaxed(tx_ring
->tqp
->io_base
+ HNS3_RING_TX_RING_TC_REG
);
2069 "BD_NUM: 0x%x HW_HEAD: 0x%x, HW_TAIL: 0x%x, BD_ERR: 0x%x, INT: 0x%x\n",
2070 bd_num
, hw_head
, hw_tail
, bd_err
,
2071 readl(tx_ring
->tqp_vector
->mask_addr
));
2073 "RING_EN: 0x%x, TC: 0x%x, FBD_NUM: 0x%x FBD_OFT: 0x%x, EBD_NUM: 0x%x, EBD_OFT: 0x%x\n",
2074 ring_en
, tc
, fbd_num
, fbd_oft
, ebd_num
, ebd_oft
);
2079 static void hns3_nic_net_timeout(struct net_device
*ndev
, unsigned int txqueue
)
2081 struct hns3_nic_priv
*priv
= netdev_priv(ndev
);
2082 struct hnae3_handle
*h
= priv
->ae_handle
;
2084 if (!hns3_get_tx_timeo_queue_info(ndev
))
2087 /* request the reset, and let the hclge to determine
2088 * which reset level should be done
2090 if (h
->ae_algo
->ops
->reset_event
)
2091 h
->ae_algo
->ops
->reset_event(h
->pdev
, h
);
2094 #ifdef CONFIG_RFS_ACCEL
2095 static int hns3_rx_flow_steer(struct net_device
*dev
, const struct sk_buff
*skb
,
2096 u16 rxq_index
, u32 flow_id
)
2098 struct hnae3_handle
*h
= hns3_get_handle(dev
);
2099 struct flow_keys fkeys
;
2101 if (!h
->ae_algo
->ops
->add_arfs_entry
)
2104 if (skb
->encapsulation
)
2105 return -EPROTONOSUPPORT
;
2107 if (!skb_flow_dissect_flow_keys(skb
, &fkeys
, 0))
2108 return -EPROTONOSUPPORT
;
2110 if ((fkeys
.basic
.n_proto
!= htons(ETH_P_IP
) &&
2111 fkeys
.basic
.n_proto
!= htons(ETH_P_IPV6
)) ||
2112 (fkeys
.basic
.ip_proto
!= IPPROTO_TCP
&&
2113 fkeys
.basic
.ip_proto
!= IPPROTO_UDP
))
2114 return -EPROTONOSUPPORT
;
2116 return h
->ae_algo
->ops
->add_arfs_entry(h
, rxq_index
, flow_id
, &fkeys
);
2120 static int hns3_nic_get_vf_config(struct net_device
*ndev
, int vf
,
2121 struct ifla_vf_info
*ivf
)
2123 struct hnae3_handle
*h
= hns3_get_handle(ndev
);
2125 if (!h
->ae_algo
->ops
->get_vf_config
)
2128 return h
->ae_algo
->ops
->get_vf_config(h
, vf
, ivf
);
2131 static int hns3_nic_set_vf_link_state(struct net_device
*ndev
, int vf
,
2134 struct hnae3_handle
*h
= hns3_get_handle(ndev
);
2136 if (!h
->ae_algo
->ops
->set_vf_link_state
)
2139 return h
->ae_algo
->ops
->set_vf_link_state(h
, vf
, link_state
);
2142 static int hns3_nic_set_vf_rate(struct net_device
*ndev
, int vf
,
2143 int min_tx_rate
, int max_tx_rate
)
2145 struct hnae3_handle
*h
= hns3_get_handle(ndev
);
2147 if (!h
->ae_algo
->ops
->set_vf_rate
)
2150 return h
->ae_algo
->ops
->set_vf_rate(h
, vf
, min_tx_rate
, max_tx_rate
,
2154 static int hns3_nic_set_vf_mac(struct net_device
*netdev
, int vf_id
, u8
*mac
)
2156 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
2158 if (!h
->ae_algo
->ops
->set_vf_mac
)
2161 if (is_multicast_ether_addr(mac
)) {
2163 "Invalid MAC:%pM specified. Could not set MAC\n",
2168 return h
->ae_algo
->ops
->set_vf_mac(h
, vf_id
, mac
);
2171 static const struct net_device_ops hns3_nic_netdev_ops
= {
2172 .ndo_open
= hns3_nic_net_open
,
2173 .ndo_stop
= hns3_nic_net_stop
,
2174 .ndo_start_xmit
= hns3_nic_net_xmit
,
2175 .ndo_tx_timeout
= hns3_nic_net_timeout
,
2176 .ndo_set_mac_address
= hns3_nic_net_set_mac_address
,
2177 .ndo_do_ioctl
= hns3_nic_do_ioctl
,
2178 .ndo_change_mtu
= hns3_nic_change_mtu
,
2179 .ndo_set_features
= hns3_nic_set_features
,
2180 .ndo_features_check
= hns3_features_check
,
2181 .ndo_get_stats64
= hns3_nic_get_stats64
,
2182 .ndo_setup_tc
= hns3_nic_setup_tc
,
2183 .ndo_set_rx_mode
= hns3_nic_set_rx_mode
,
2184 .ndo_vlan_rx_add_vid
= hns3_vlan_rx_add_vid
,
2185 .ndo_vlan_rx_kill_vid
= hns3_vlan_rx_kill_vid
,
2186 .ndo_set_vf_vlan
= hns3_ndo_set_vf_vlan
,
2187 .ndo_set_vf_spoofchk
= hns3_set_vf_spoofchk
,
2188 .ndo_set_vf_trust
= hns3_set_vf_trust
,
2189 #ifdef CONFIG_RFS_ACCEL
2190 .ndo_rx_flow_steer
= hns3_rx_flow_steer
,
2192 .ndo_get_vf_config
= hns3_nic_get_vf_config
,
2193 .ndo_set_vf_link_state
= hns3_nic_set_vf_link_state
,
2194 .ndo_set_vf_rate
= hns3_nic_set_vf_rate
,
2195 .ndo_set_vf_mac
= hns3_nic_set_vf_mac
,
2198 bool hns3_is_phys_func(struct pci_dev
*pdev
)
2200 u32 dev_id
= pdev
->device
;
2203 case HNAE3_DEV_ID_GE
:
2204 case HNAE3_DEV_ID_25GE
:
2205 case HNAE3_DEV_ID_25GE_RDMA
:
2206 case HNAE3_DEV_ID_25GE_RDMA_MACSEC
:
2207 case HNAE3_DEV_ID_50GE_RDMA
:
2208 case HNAE3_DEV_ID_50GE_RDMA_MACSEC
:
2209 case HNAE3_DEV_ID_100G_RDMA_MACSEC
:
2210 case HNAE3_DEV_ID_200G_RDMA
:
2212 case HNAE3_DEV_ID_VF
:
2213 case HNAE3_DEV_ID_RDMA_DCB_PFC_VF
:
2216 dev_warn(&pdev
->dev
, "un-recognized pci device-id %u",
2223 static void hns3_disable_sriov(struct pci_dev
*pdev
)
2225 /* If our VFs are assigned we cannot shut down SR-IOV
2226 * without causing issues, so just leave the hardware
2227 * available but disabled
2229 if (pci_vfs_assigned(pdev
)) {
2230 dev_warn(&pdev
->dev
,
2231 "disabling driver while VFs are assigned\n");
2235 pci_disable_sriov(pdev
);
2238 /* hns3_probe - Device initialization routine
2239 * @pdev: PCI device information struct
2240 * @ent: entry in hns3_pci_tbl
2242 * hns3_probe initializes a PF identified by a pci_dev structure.
2243 * The OS initialization, configuring of the PF private structure,
2244 * and a hardware reset occur.
2246 * Returns 0 on success, negative on failure
2248 static int hns3_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
2250 struct hnae3_ae_dev
*ae_dev
;
2253 ae_dev
= devm_kzalloc(&pdev
->dev
, sizeof(*ae_dev
), GFP_KERNEL
);
2257 ae_dev
->pdev
= pdev
;
2258 ae_dev
->flag
= ent
->driver_data
;
2259 pci_set_drvdata(pdev
, ae_dev
);
2261 ret
= hnae3_register_ae_dev(ae_dev
);
2263 pci_set_drvdata(pdev
, NULL
);
2268 /* hns3_remove - Device removal routine
2269 * @pdev: PCI device information struct
2271 static void hns3_remove(struct pci_dev
*pdev
)
2273 struct hnae3_ae_dev
*ae_dev
= pci_get_drvdata(pdev
);
2275 if (hns3_is_phys_func(pdev
) && IS_ENABLED(CONFIG_PCI_IOV
))
2276 hns3_disable_sriov(pdev
);
2278 hnae3_unregister_ae_dev(ae_dev
);
2279 pci_set_drvdata(pdev
, NULL
);
2283 * hns3_pci_sriov_configure
2284 * @pdev: pointer to a pci_dev structure
2285 * @num_vfs: number of VFs to allocate
2287 * Enable or change the number of VFs. Called when the user updates the number
2290 static int hns3_pci_sriov_configure(struct pci_dev
*pdev
, int num_vfs
)
2294 if (!(hns3_is_phys_func(pdev
) && IS_ENABLED(CONFIG_PCI_IOV
))) {
2295 dev_warn(&pdev
->dev
, "Can not config SRIOV\n");
2300 ret
= pci_enable_sriov(pdev
, num_vfs
);
2302 dev_err(&pdev
->dev
, "SRIOV enable failed %d\n", ret
);
2305 } else if (!pci_vfs_assigned(pdev
)) {
2306 pci_disable_sriov(pdev
);
2308 dev_warn(&pdev
->dev
,
2309 "Unable to free VFs because some are assigned to VMs.\n");
2315 static void hns3_shutdown(struct pci_dev
*pdev
)
2317 struct hnae3_ae_dev
*ae_dev
= pci_get_drvdata(pdev
);
2319 hnae3_unregister_ae_dev(ae_dev
);
2320 pci_set_drvdata(pdev
, NULL
);
2322 if (system_state
== SYSTEM_POWER_OFF
)
2323 pci_set_power_state(pdev
, PCI_D3hot
);
2326 static pci_ers_result_t
hns3_error_detected(struct pci_dev
*pdev
,
2327 pci_channel_state_t state
)
2329 struct hnae3_ae_dev
*ae_dev
= pci_get_drvdata(pdev
);
2330 pci_ers_result_t ret
;
2332 dev_info(&pdev
->dev
, "PCI error detected, state(=%d)!!\n", state
);
2334 if (state
== pci_channel_io_perm_failure
)
2335 return PCI_ERS_RESULT_DISCONNECT
;
2337 if (!ae_dev
|| !ae_dev
->ops
) {
2339 "Can't recover - error happened before device initialized\n");
2340 return PCI_ERS_RESULT_NONE
;
2343 if (ae_dev
->ops
->handle_hw_ras_error
)
2344 ret
= ae_dev
->ops
->handle_hw_ras_error(ae_dev
);
2346 return PCI_ERS_RESULT_NONE
;
2351 static pci_ers_result_t
hns3_slot_reset(struct pci_dev
*pdev
)
2353 struct hnae3_ae_dev
*ae_dev
= pci_get_drvdata(pdev
);
2354 const struct hnae3_ae_ops
*ops
;
2355 enum hnae3_reset_type reset_type
;
2356 struct device
*dev
= &pdev
->dev
;
2358 if (!ae_dev
|| !ae_dev
->ops
)
2359 return PCI_ERS_RESULT_NONE
;
2362 /* request the reset */
2363 if (ops
->reset_event
&& ops
->get_reset_level
&&
2364 ops
->set_default_reset_request
) {
2365 if (ae_dev
->hw_err_reset_req
) {
2366 reset_type
= ops
->get_reset_level(ae_dev
,
2367 &ae_dev
->hw_err_reset_req
);
2368 ops
->set_default_reset_request(ae_dev
, reset_type
);
2369 dev_info(dev
, "requesting reset due to PCI error\n");
2370 ops
->reset_event(pdev
, NULL
);
2373 return PCI_ERS_RESULT_RECOVERED
;
2376 return PCI_ERS_RESULT_DISCONNECT
;
2379 static void hns3_reset_prepare(struct pci_dev
*pdev
)
2381 struct hnae3_ae_dev
*ae_dev
= pci_get_drvdata(pdev
);
2383 dev_info(&pdev
->dev
, "FLR prepare\n");
2384 if (ae_dev
&& ae_dev
->ops
&& ae_dev
->ops
->flr_prepare
)
2385 ae_dev
->ops
->flr_prepare(ae_dev
);
2388 static void hns3_reset_done(struct pci_dev
*pdev
)
2390 struct hnae3_ae_dev
*ae_dev
= pci_get_drvdata(pdev
);
2392 dev_info(&pdev
->dev
, "FLR done\n");
2393 if (ae_dev
&& ae_dev
->ops
&& ae_dev
->ops
->flr_done
)
2394 ae_dev
->ops
->flr_done(ae_dev
);
2397 static const struct pci_error_handlers hns3_err_handler
= {
2398 .error_detected
= hns3_error_detected
,
2399 .slot_reset
= hns3_slot_reset
,
2400 .reset_prepare
= hns3_reset_prepare
,
2401 .reset_done
= hns3_reset_done
,
2404 static struct pci_driver hns3_driver
= {
2405 .name
= hns3_driver_name
,
2406 .id_table
= hns3_pci_tbl
,
2407 .probe
= hns3_probe
,
2408 .remove
= hns3_remove
,
2409 .shutdown
= hns3_shutdown
,
2410 .sriov_configure
= hns3_pci_sriov_configure
,
2411 .err_handler
= &hns3_err_handler
,
2414 /* set default feature to hns3 */
2415 static void hns3_set_default_feature(struct net_device
*netdev
)
2417 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
2418 struct pci_dev
*pdev
= h
->pdev
;
2419 struct hnae3_ae_dev
*ae_dev
= pci_get_drvdata(pdev
);
2421 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
2423 netdev
->hw_enc_features
|= NETIF_F_RXCSUM
| NETIF_F_SG
| NETIF_F_GSO
|
2424 NETIF_F_GRO
| NETIF_F_TSO
| NETIF_F_TSO6
| NETIF_F_GSO_GRE
|
2425 NETIF_F_GSO_GRE_CSUM
| NETIF_F_GSO_UDP_TUNNEL
|
2426 NETIF_F_SCTP_CRC
| NETIF_F_TSO_MANGLEID
| NETIF_F_FRAGLIST
;
2428 netdev
->gso_partial_features
|= NETIF_F_GSO_GRE_CSUM
;
2430 netdev
->features
|= NETIF_F_HW_VLAN_CTAG_FILTER
|
2431 NETIF_F_HW_VLAN_CTAG_TX
| NETIF_F_HW_VLAN_CTAG_RX
|
2432 NETIF_F_RXCSUM
| NETIF_F_SG
| NETIF_F_GSO
|
2433 NETIF_F_GRO
| NETIF_F_TSO
| NETIF_F_TSO6
| NETIF_F_GSO_GRE
|
2434 NETIF_F_GSO_GRE_CSUM
| NETIF_F_GSO_UDP_TUNNEL
|
2435 NETIF_F_SCTP_CRC
| NETIF_F_FRAGLIST
;
2437 netdev
->vlan_features
|= NETIF_F_RXCSUM
|
2438 NETIF_F_SG
| NETIF_F_GSO
| NETIF_F_GRO
|
2439 NETIF_F_TSO
| NETIF_F_TSO6
| NETIF_F_GSO_GRE
|
2440 NETIF_F_GSO_GRE_CSUM
| NETIF_F_GSO_UDP_TUNNEL
|
2441 NETIF_F_SCTP_CRC
| NETIF_F_FRAGLIST
;
2443 netdev
->hw_features
|= NETIF_F_HW_VLAN_CTAG_TX
|
2444 NETIF_F_HW_VLAN_CTAG_RX
|
2445 NETIF_F_RXCSUM
| NETIF_F_SG
| NETIF_F_GSO
|
2446 NETIF_F_GRO
| NETIF_F_TSO
| NETIF_F_TSO6
| NETIF_F_GSO_GRE
|
2447 NETIF_F_GSO_GRE_CSUM
| NETIF_F_GSO_UDP_TUNNEL
|
2448 NETIF_F_SCTP_CRC
| NETIF_F_FRAGLIST
;
2450 if (ae_dev
->dev_version
>= HNAE3_DEVICE_VERSION_V2
) {
2451 netdev
->hw_features
|= NETIF_F_GRO_HW
;
2452 netdev
->features
|= NETIF_F_GRO_HW
;
2454 if (!(h
->flags
& HNAE3_SUPPORT_VF
)) {
2455 netdev
->hw_features
|= NETIF_F_NTUPLE
;
2456 netdev
->features
|= NETIF_F_NTUPLE
;
2460 if (test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B
, ae_dev
->caps
)) {
2461 netdev
->hw_features
|= NETIF_F_GSO_UDP_L4
;
2462 netdev
->features
|= NETIF_F_GSO_UDP_L4
;
2463 netdev
->vlan_features
|= NETIF_F_GSO_UDP_L4
;
2464 netdev
->hw_enc_features
|= NETIF_F_GSO_UDP_L4
;
2467 if (test_bit(HNAE3_DEV_SUPPORT_HW_TX_CSUM_B
, ae_dev
->caps
)) {
2468 netdev
->hw_features
|= NETIF_F_HW_CSUM
;
2469 netdev
->features
|= NETIF_F_HW_CSUM
;
2470 netdev
->vlan_features
|= NETIF_F_HW_CSUM
;
2471 netdev
->hw_enc_features
|= NETIF_F_HW_CSUM
;
2473 netdev
->hw_features
|= NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
;
2474 netdev
->features
|= NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
;
2475 netdev
->vlan_features
|= NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
;
2476 netdev
->hw_enc_features
|= NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
;
2479 if (test_bit(HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B
, ae_dev
->caps
)) {
2480 netdev
->hw_features
|= NETIF_F_GSO_UDP_TUNNEL_CSUM
;
2481 netdev
->features
|= NETIF_F_GSO_UDP_TUNNEL_CSUM
;
2482 netdev
->vlan_features
|= NETIF_F_GSO_UDP_TUNNEL_CSUM
;
2483 netdev
->hw_enc_features
|= NETIF_F_GSO_UDP_TUNNEL_CSUM
;
2486 if (test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B
, ae_dev
->caps
)) {
2487 netdev
->hw_features
|= NETIF_F_HW_TC
;
2488 netdev
->features
|= NETIF_F_HW_TC
;
2492 static int hns3_alloc_buffer(struct hns3_enet_ring
*ring
,
2493 struct hns3_desc_cb
*cb
)
2495 unsigned int order
= hns3_page_order(ring
);
2498 p
= dev_alloc_pages(order
);
2503 cb
->page_offset
= 0;
2505 cb
->buf
= page_address(p
);
2506 cb
->length
= hns3_page_size(ring
);
2507 cb
->type
= DESC_TYPE_PAGE
;
2508 page_ref_add(p
, USHRT_MAX
- 1);
2509 cb
->pagecnt_bias
= USHRT_MAX
;
2514 static void hns3_free_buffer(struct hns3_enet_ring
*ring
,
2515 struct hns3_desc_cb
*cb
, int budget
)
2517 if (cb
->type
== DESC_TYPE_SKB
)
2518 napi_consume_skb(cb
->priv
, budget
);
2519 else if (!HNAE3_IS_TX_RING(ring
) && cb
->pagecnt_bias
)
2520 __page_frag_cache_drain(cb
->priv
, cb
->pagecnt_bias
);
2521 memset(cb
, 0, sizeof(*cb
));
2524 static int hns3_map_buffer(struct hns3_enet_ring
*ring
, struct hns3_desc_cb
*cb
)
2526 cb
->dma
= dma_map_page(ring_to_dev(ring
), cb
->priv
, 0,
2527 cb
->length
, ring_to_dma_dir(ring
));
2529 if (unlikely(dma_mapping_error(ring_to_dev(ring
), cb
->dma
)))
2535 static void hns3_unmap_buffer(struct hns3_enet_ring
*ring
,
2536 struct hns3_desc_cb
*cb
)
2538 if (cb
->type
== DESC_TYPE_SKB
|| cb
->type
== DESC_TYPE_FRAGLIST_SKB
)
2539 dma_unmap_single(ring_to_dev(ring
), cb
->dma
, cb
->length
,
2540 ring_to_dma_dir(ring
));
2541 else if (cb
->length
)
2542 dma_unmap_page(ring_to_dev(ring
), cb
->dma
, cb
->length
,
2543 ring_to_dma_dir(ring
));
2546 static void hns3_buffer_detach(struct hns3_enet_ring
*ring
, int i
)
2548 hns3_unmap_buffer(ring
, &ring
->desc_cb
[i
]);
2549 ring
->desc
[i
].addr
= 0;
2552 static void hns3_free_buffer_detach(struct hns3_enet_ring
*ring
, int i
,
2555 struct hns3_desc_cb
*cb
= &ring
->desc_cb
[i
];
2557 if (!ring
->desc_cb
[i
].dma
)
2560 hns3_buffer_detach(ring
, i
);
2561 hns3_free_buffer(ring
, cb
, budget
);
2564 static void hns3_free_buffers(struct hns3_enet_ring
*ring
)
2568 for (i
= 0; i
< ring
->desc_num
; i
++)
2569 hns3_free_buffer_detach(ring
, i
, 0);
2572 /* free desc along with its attached buffer */
2573 static void hns3_free_desc(struct hns3_enet_ring
*ring
)
2575 int size
= ring
->desc_num
* sizeof(ring
->desc
[0]);
2577 hns3_free_buffers(ring
);
2580 dma_free_coherent(ring_to_dev(ring
), size
,
2581 ring
->desc
, ring
->desc_dma_addr
);
2586 static int hns3_alloc_desc(struct hns3_enet_ring
*ring
)
2588 int size
= ring
->desc_num
* sizeof(ring
->desc
[0]);
2590 ring
->desc
= dma_alloc_coherent(ring_to_dev(ring
), size
,
2591 &ring
->desc_dma_addr
, GFP_KERNEL
);
2598 static int hns3_alloc_and_map_buffer(struct hns3_enet_ring
*ring
,
2599 struct hns3_desc_cb
*cb
)
2603 ret
= hns3_alloc_buffer(ring
, cb
);
2607 ret
= hns3_map_buffer(ring
, cb
);
2614 hns3_free_buffer(ring
, cb
, 0);
2619 static int hns3_alloc_and_attach_buffer(struct hns3_enet_ring
*ring
, int i
)
2621 int ret
= hns3_alloc_and_map_buffer(ring
, &ring
->desc_cb
[i
]);
2626 ring
->desc
[i
].addr
= cpu_to_le64(ring
->desc_cb
[i
].dma
);
2631 /* Allocate memory for raw pkg, and map with dma */
2632 static int hns3_alloc_ring_buffers(struct hns3_enet_ring
*ring
)
2636 for (i
= 0; i
< ring
->desc_num
; i
++) {
2637 ret
= hns3_alloc_and_attach_buffer(ring
, i
);
2639 goto out_buffer_fail
;
2645 for (j
= i
- 1; j
>= 0; j
--)
2646 hns3_free_buffer_detach(ring
, j
, 0);
2650 /* detach a in-used buffer and replace with a reserved one */
2651 static void hns3_replace_buffer(struct hns3_enet_ring
*ring
, int i
,
2652 struct hns3_desc_cb
*res_cb
)
2654 hns3_unmap_buffer(ring
, &ring
->desc_cb
[i
]);
2655 ring
->desc_cb
[i
] = *res_cb
;
2656 ring
->desc
[i
].addr
= cpu_to_le64(ring
->desc_cb
[i
].dma
);
2657 ring
->desc
[i
].rx
.bd_base_info
= 0;
2660 static void hns3_reuse_buffer(struct hns3_enet_ring
*ring
, int i
)
2662 ring
->desc_cb
[i
].reuse_flag
= 0;
2663 ring
->desc
[i
].addr
= cpu_to_le64(ring
->desc_cb
[i
].dma
+
2664 ring
->desc_cb
[i
].page_offset
);
2665 ring
->desc
[i
].rx
.bd_base_info
= 0;
2667 dma_sync_single_for_device(ring_to_dev(ring
),
2668 ring
->desc_cb
[i
].dma
+ ring
->desc_cb
[i
].page_offset
,
2669 hns3_buf_size(ring
),
2673 static bool hns3_nic_reclaim_desc(struct hns3_enet_ring
*ring
,
2674 int *bytes
, int *pkts
, int budget
)
2676 /* pair with ring->last_to_use update in hns3_tx_doorbell(),
2677 * smp_store_release() is not used in hns3_tx_doorbell() because
2678 * the doorbell operation already have the needed barrier operation.
2680 int ltu
= smp_load_acquire(&ring
->last_to_use
);
2681 int ntc
= ring
->next_to_clean
;
2682 struct hns3_desc_cb
*desc_cb
;
2683 bool reclaimed
= false;
2684 struct hns3_desc
*desc
;
2686 while (ltu
!= ntc
) {
2687 desc
= &ring
->desc
[ntc
];
2689 if (le16_to_cpu(desc
->tx
.bdtp_fe_sc_vld_ra_ri
) &
2690 BIT(HNS3_TXD_VLD_B
))
2693 desc_cb
= &ring
->desc_cb
[ntc
];
2694 (*pkts
) += (desc_cb
->type
== DESC_TYPE_SKB
);
2695 (*bytes
) += desc_cb
->length
;
2696 /* desc_cb will be cleaned, after hnae3_free_buffer_detach */
2697 hns3_free_buffer_detach(ring
, ntc
, budget
);
2699 if (++ntc
== ring
->desc_num
)
2702 /* Issue prefetch for next Tx descriptor */
2703 prefetch(&ring
->desc_cb
[ntc
]);
2707 if (unlikely(!reclaimed
))
2710 /* This smp_store_release() pairs with smp_load_acquire() in
2711 * ring_space called by hns3_nic_net_xmit.
2713 smp_store_release(&ring
->next_to_clean
, ntc
);
2717 void hns3_clean_tx_ring(struct hns3_enet_ring
*ring
, int budget
)
2719 struct net_device
*netdev
= ring_to_netdev(ring
);
2720 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
2721 struct netdev_queue
*dev_queue
;
2727 if (unlikely(!hns3_nic_reclaim_desc(ring
, &bytes
, &pkts
, budget
)))
2730 ring
->tqp_vector
->tx_group
.total_bytes
+= bytes
;
2731 ring
->tqp_vector
->tx_group
.total_packets
+= pkts
;
2733 u64_stats_update_begin(&ring
->syncp
);
2734 ring
->stats
.tx_bytes
+= bytes
;
2735 ring
->stats
.tx_pkts
+= pkts
;
2736 u64_stats_update_end(&ring
->syncp
);
2738 dev_queue
= netdev_get_tx_queue(netdev
, ring
->tqp
->tqp_index
);
2739 netdev_tx_completed_queue(dev_queue
, pkts
, bytes
);
2741 if (unlikely(netif_carrier_ok(netdev
) &&
2742 ring_space(ring
) > HNS3_MAX_TSO_BD_NUM
)) {
2743 /* Make sure that anybody stopping the queue after this
2744 * sees the new next_to_clean.
2747 if (netif_tx_queue_stopped(dev_queue
) &&
2748 !test_bit(HNS3_NIC_STATE_DOWN
, &priv
->state
)) {
2749 netif_tx_wake_queue(dev_queue
);
2750 ring
->stats
.restart_queue
++;
2755 static int hns3_desc_unused(struct hns3_enet_ring
*ring
)
2757 int ntc
= ring
->next_to_clean
;
2758 int ntu
= ring
->next_to_use
;
2760 return ((ntc
>= ntu
) ? 0 : ring
->desc_num
) + ntc
- ntu
;
2763 static void hns3_nic_alloc_rx_buffers(struct hns3_enet_ring
*ring
,
2766 struct hns3_desc_cb
*desc_cb
;
2767 struct hns3_desc_cb res_cbs
;
2770 for (i
= 0; i
< cleand_count
; i
++) {
2771 desc_cb
= &ring
->desc_cb
[ring
->next_to_use
];
2772 if (desc_cb
->reuse_flag
) {
2773 u64_stats_update_begin(&ring
->syncp
);
2774 ring
->stats
.reuse_pg_cnt
++;
2775 u64_stats_update_end(&ring
->syncp
);
2777 hns3_reuse_buffer(ring
, ring
->next_to_use
);
2779 ret
= hns3_alloc_and_map_buffer(ring
, &res_cbs
);
2781 u64_stats_update_begin(&ring
->syncp
);
2782 ring
->stats
.sw_err_cnt
++;
2783 u64_stats_update_end(&ring
->syncp
);
2785 hns3_rl_err(ring_to_netdev(ring
),
2786 "alloc rx buffer failed: %d\n",
2790 hns3_replace_buffer(ring
, ring
->next_to_use
, &res_cbs
);
2792 u64_stats_update_begin(&ring
->syncp
);
2793 ring
->stats
.non_reuse_pg
++;
2794 u64_stats_update_end(&ring
->syncp
);
2797 ring_ptr_move_fw(ring
, next_to_use
);
2800 writel(i
, ring
->tqp
->io_base
+ HNS3_RING_RX_RING_HEAD_REG
);
2803 static bool hns3_page_is_reusable(struct page
*page
)
2805 return page_to_nid(page
) == numa_mem_id() &&
2806 !page_is_pfmemalloc(page
);
2809 static bool hns3_can_reuse_page(struct hns3_desc_cb
*cb
)
2811 return (page_count(cb
->priv
) - cb
->pagecnt_bias
) == 1;
2814 static void hns3_nic_reuse_page(struct sk_buff
*skb
, int i
,
2815 struct hns3_enet_ring
*ring
, int pull_len
,
2816 struct hns3_desc_cb
*desc_cb
)
2818 struct hns3_desc
*desc
= &ring
->desc
[ring
->next_to_clean
];
2819 int size
= le16_to_cpu(desc
->rx
.size
);
2820 u32 truesize
= hns3_buf_size(ring
);
2822 desc_cb
->pagecnt_bias
--;
2823 skb_add_rx_frag(skb
, i
, desc_cb
->priv
, desc_cb
->page_offset
+ pull_len
,
2824 size
- pull_len
, truesize
);
2826 /* Avoid re-using remote pages, or the stack is still using the page
2827 * when page_offset rollback to zero, flag default unreuse
2829 if (unlikely(!hns3_page_is_reusable(desc_cb
->priv
)) ||
2830 (!desc_cb
->page_offset
&& !hns3_can_reuse_page(desc_cb
))) {
2831 __page_frag_cache_drain(desc_cb
->priv
, desc_cb
->pagecnt_bias
);
2835 /* Move offset up to the next cache line */
2836 desc_cb
->page_offset
+= truesize
;
2838 if (desc_cb
->page_offset
+ truesize
<= hns3_page_size(ring
)) {
2839 desc_cb
->reuse_flag
= 1;
2840 } else if (hns3_can_reuse_page(desc_cb
)) {
2841 desc_cb
->reuse_flag
= 1;
2842 desc_cb
->page_offset
= 0;
2843 } else if (desc_cb
->pagecnt_bias
) {
2844 __page_frag_cache_drain(desc_cb
->priv
, desc_cb
->pagecnt_bias
);
2848 if (unlikely(!desc_cb
->pagecnt_bias
)) {
2849 page_ref_add(desc_cb
->priv
, USHRT_MAX
);
2850 desc_cb
->pagecnt_bias
= USHRT_MAX
;
2854 static int hns3_gro_complete(struct sk_buff
*skb
, u32 l234info
)
2856 __be16 type
= skb
->protocol
;
2860 while (eth_type_vlan(type
)) {
2861 struct vlan_hdr
*vh
;
2863 if ((depth
+ VLAN_HLEN
) > skb_headlen(skb
))
2866 vh
= (struct vlan_hdr
*)(skb
->data
+ depth
);
2867 type
= vh
->h_vlan_encapsulated_proto
;
2871 skb_set_network_header(skb
, depth
);
2873 if (type
== htons(ETH_P_IP
)) {
2874 const struct iphdr
*iph
= ip_hdr(skb
);
2876 depth
+= sizeof(struct iphdr
);
2877 skb_set_transport_header(skb
, depth
);
2879 th
->check
= ~tcp_v4_check(skb
->len
- depth
, iph
->saddr
,
2881 } else if (type
== htons(ETH_P_IPV6
)) {
2882 const struct ipv6hdr
*iph
= ipv6_hdr(skb
);
2884 depth
+= sizeof(struct ipv6hdr
);
2885 skb_set_transport_header(skb
, depth
);
2887 th
->check
= ~tcp_v6_check(skb
->len
- depth
, &iph
->saddr
,
2890 hns3_rl_err(skb
->dev
,
2891 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x, depth: %d\n",
2892 be16_to_cpu(type
), depth
);
2896 skb_shinfo(skb
)->gso_segs
= NAPI_GRO_CB(skb
)->count
;
2898 skb_shinfo(skb
)->gso_type
|= SKB_GSO_TCP_ECN
;
2900 if (l234info
& BIT(HNS3_RXD_GRO_FIXID_B
))
2901 skb_shinfo(skb
)->gso_type
|= SKB_GSO_TCP_FIXEDID
;
2903 skb
->csum_start
= (unsigned char *)th
- skb
->head
;
2904 skb
->csum_offset
= offsetof(struct tcphdr
, check
);
2905 skb
->ip_summed
= CHECKSUM_PARTIAL
;
2907 trace_hns3_gro(skb
);
2912 static void hns3_checksum_complete(struct hns3_enet_ring
*ring
,
2913 struct sk_buff
*skb
, u32 l234info
)
2917 u64_stats_update_begin(&ring
->syncp
);
2918 ring
->stats
.csum_complete
++;
2919 u64_stats_update_end(&ring
->syncp
);
2920 skb
->ip_summed
= CHECKSUM_COMPLETE
;
2921 lo
= hnae3_get_field(l234info
, HNS3_RXD_L2_CSUM_L_M
,
2922 HNS3_RXD_L2_CSUM_L_S
);
2923 hi
= hnae3_get_field(l234info
, HNS3_RXD_L2_CSUM_H_M
,
2924 HNS3_RXD_L2_CSUM_H_S
);
2925 skb
->csum
= csum_unfold((__force __sum16
)(lo
| hi
<< 8));
2928 static void hns3_rx_checksum(struct hns3_enet_ring
*ring
, struct sk_buff
*skb
,
2929 u32 l234info
, u32 bd_base_info
, u32 ol_info
)
2931 struct net_device
*netdev
= ring_to_netdev(ring
);
2932 int l3_type
, l4_type
;
2935 skb
->ip_summed
= CHECKSUM_NONE
;
2937 skb_checksum_none_assert(skb
);
2939 if (!(netdev
->features
& NETIF_F_RXCSUM
))
2942 if (l234info
& BIT(HNS3_RXD_L2_CSUM_B
)) {
2943 hns3_checksum_complete(ring
, skb
, l234info
);
2947 /* check if hardware has done checksum */
2948 if (!(bd_base_info
& BIT(HNS3_RXD_L3L4P_B
)))
2951 if (unlikely(l234info
& (BIT(HNS3_RXD_L3E_B
) | BIT(HNS3_RXD_L4E_B
) |
2952 BIT(HNS3_RXD_OL3E_B
) |
2953 BIT(HNS3_RXD_OL4E_B
)))) {
2954 u64_stats_update_begin(&ring
->syncp
);
2955 ring
->stats
.l3l4_csum_err
++;
2956 u64_stats_update_end(&ring
->syncp
);
2961 ol4_type
= hnae3_get_field(ol_info
, HNS3_RXD_OL4ID_M
,
2964 case HNS3_OL4_TYPE_MAC_IN_UDP
:
2965 case HNS3_OL4_TYPE_NVGRE
:
2966 skb
->csum_level
= 1;
2968 case HNS3_OL4_TYPE_NO_TUN
:
2969 l3_type
= hnae3_get_field(l234info
, HNS3_RXD_L3ID_M
,
2971 l4_type
= hnae3_get_field(l234info
, HNS3_RXD_L4ID_M
,
2974 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2975 if ((l3_type
== HNS3_L3_TYPE_IPV4
||
2976 l3_type
== HNS3_L3_TYPE_IPV6
) &&
2977 (l4_type
== HNS3_L4_TYPE_UDP
||
2978 l4_type
== HNS3_L4_TYPE_TCP
||
2979 l4_type
== HNS3_L4_TYPE_SCTP
))
2980 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
2987 static void hns3_rx_skb(struct hns3_enet_ring
*ring
, struct sk_buff
*skb
)
2989 if (skb_has_frag_list(skb
))
2990 napi_gro_flush(&ring
->tqp_vector
->napi
, false);
2992 napi_gro_receive(&ring
->tqp_vector
->napi
, skb
);
2995 static bool hns3_parse_vlan_tag(struct hns3_enet_ring
*ring
,
2996 struct hns3_desc
*desc
, u32 l234info
,
2999 struct hnae3_handle
*handle
= ring
->tqp
->handle
;
3000 struct pci_dev
*pdev
= ring
->tqp
->handle
->pdev
;
3001 struct hnae3_ae_dev
*ae_dev
= pci_get_drvdata(pdev
);
3003 if (unlikely(ae_dev
->dev_version
< HNAE3_DEVICE_VERSION_V2
)) {
3004 *vlan_tag
= le16_to_cpu(desc
->rx
.ot_vlan_tag
);
3005 if (!(*vlan_tag
& VLAN_VID_MASK
))
3006 *vlan_tag
= le16_to_cpu(desc
->rx
.vlan_tag
);
3008 return (*vlan_tag
!= 0);
3011 #define HNS3_STRP_OUTER_VLAN 0x1
3012 #define HNS3_STRP_INNER_VLAN 0x2
3013 #define HNS3_STRP_BOTH 0x3
3015 /* Hardware always insert VLAN tag into RX descriptor when
3016 * remove the tag from packet, driver needs to determine
3017 * reporting which tag to stack.
3019 switch (hnae3_get_field(l234info
, HNS3_RXD_STRP_TAGP_M
,
3020 HNS3_RXD_STRP_TAGP_S
)) {
3021 case HNS3_STRP_OUTER_VLAN
:
3022 if (handle
->port_base_vlan_state
!=
3023 HNAE3_PORT_BASE_VLAN_DISABLE
)
3026 *vlan_tag
= le16_to_cpu(desc
->rx
.ot_vlan_tag
);
3028 case HNS3_STRP_INNER_VLAN
:
3029 if (handle
->port_base_vlan_state
!=
3030 HNAE3_PORT_BASE_VLAN_DISABLE
)
3033 *vlan_tag
= le16_to_cpu(desc
->rx
.vlan_tag
);
3035 case HNS3_STRP_BOTH
:
3036 if (handle
->port_base_vlan_state
==
3037 HNAE3_PORT_BASE_VLAN_DISABLE
)
3038 *vlan_tag
= le16_to_cpu(desc
->rx
.ot_vlan_tag
);
3040 *vlan_tag
= le16_to_cpu(desc
->rx
.vlan_tag
);
3048 static void hns3_rx_ring_move_fw(struct hns3_enet_ring
*ring
)
3050 ring
->desc
[ring
->next_to_clean
].rx
.bd_base_info
&=
3051 cpu_to_le32(~BIT(HNS3_RXD_VLD_B
));
3052 ring
->next_to_clean
+= 1;
3054 if (unlikely(ring
->next_to_clean
== ring
->desc_num
))
3055 ring
->next_to_clean
= 0;
3058 static int hns3_alloc_skb(struct hns3_enet_ring
*ring
, unsigned int length
,
3061 struct hns3_desc_cb
*desc_cb
= &ring
->desc_cb
[ring
->next_to_clean
];
3062 struct net_device
*netdev
= ring_to_netdev(ring
);
3063 struct sk_buff
*skb
;
3065 ring
->skb
= napi_alloc_skb(&ring
->tqp_vector
->napi
, HNS3_RX_HEAD_SIZE
);
3067 if (unlikely(!skb
)) {
3068 hns3_rl_err(netdev
, "alloc rx skb fail\n");
3070 u64_stats_update_begin(&ring
->syncp
);
3071 ring
->stats
.sw_err_cnt
++;
3072 u64_stats_update_end(&ring
->syncp
);
3077 trace_hns3_rx_desc(ring
);
3078 prefetchw(skb
->data
);
3080 ring
->pending_buf
= 1;
3082 ring
->tail_skb
= NULL
;
3083 if (length
<= HNS3_RX_HEAD_SIZE
) {
3084 memcpy(__skb_put(skb
, length
), va
, ALIGN(length
, sizeof(long)));
3086 /* We can reuse buffer as-is, just make sure it is local */
3087 if (likely(hns3_page_is_reusable(desc_cb
->priv
)))
3088 desc_cb
->reuse_flag
= 1;
3089 else /* This page cannot be reused so discard it */
3090 __page_frag_cache_drain(desc_cb
->priv
,
3091 desc_cb
->pagecnt_bias
);
3093 hns3_rx_ring_move_fw(ring
);
3096 u64_stats_update_begin(&ring
->syncp
);
3097 ring
->stats
.seg_pkt_cnt
++;
3098 u64_stats_update_end(&ring
->syncp
);
3100 ring
->pull_len
= eth_get_headlen(netdev
, va
, HNS3_RX_HEAD_SIZE
);
3101 __skb_put(skb
, ring
->pull_len
);
3102 hns3_nic_reuse_page(skb
, ring
->frag_num
++, ring
, ring
->pull_len
,
3104 hns3_rx_ring_move_fw(ring
);
3109 static int hns3_add_frag(struct hns3_enet_ring
*ring
)
3111 struct sk_buff
*skb
= ring
->skb
;
3112 struct sk_buff
*head_skb
= skb
;
3113 struct sk_buff
*new_skb
;
3114 struct hns3_desc_cb
*desc_cb
;
3115 struct hns3_desc
*desc
;
3119 desc
= &ring
->desc
[ring
->next_to_clean
];
3120 desc_cb
= &ring
->desc_cb
[ring
->next_to_clean
];
3121 bd_base_info
= le32_to_cpu(desc
->rx
.bd_base_info
);
3122 /* make sure HW write desc complete */
3124 if (!(bd_base_info
& BIT(HNS3_RXD_VLD_B
)))
3127 if (unlikely(ring
->frag_num
>= MAX_SKB_FRAGS
)) {
3128 new_skb
= napi_alloc_skb(&ring
->tqp_vector
->napi
, 0);
3129 if (unlikely(!new_skb
)) {
3130 hns3_rl_err(ring_to_netdev(ring
),
3131 "alloc rx fraglist skb fail\n");
3136 if (ring
->tail_skb
) {
3137 ring
->tail_skb
->next
= new_skb
;
3138 ring
->tail_skb
= new_skb
;
3140 skb_shinfo(skb
)->frag_list
= new_skb
;
3141 ring
->tail_skb
= new_skb
;
3145 if (ring
->tail_skb
) {
3146 head_skb
->truesize
+= hns3_buf_size(ring
);
3147 head_skb
->data_len
+= le16_to_cpu(desc
->rx
.size
);
3148 head_skb
->len
+= le16_to_cpu(desc
->rx
.size
);
3149 skb
= ring
->tail_skb
;
3152 dma_sync_single_for_cpu(ring_to_dev(ring
),
3153 desc_cb
->dma
+ desc_cb
->page_offset
,
3154 hns3_buf_size(ring
),
3157 hns3_nic_reuse_page(skb
, ring
->frag_num
++, ring
, 0, desc_cb
);
3158 trace_hns3_rx_desc(ring
);
3159 hns3_rx_ring_move_fw(ring
);
3160 ring
->pending_buf
++;
3161 } while (!(bd_base_info
& BIT(HNS3_RXD_FE_B
)));
3166 static int hns3_set_gro_and_checksum(struct hns3_enet_ring
*ring
,
3167 struct sk_buff
*skb
, u32 l234info
,
3168 u32 bd_base_info
, u32 ol_info
)
3172 skb_shinfo(skb
)->gso_size
= hnae3_get_field(bd_base_info
,
3173 HNS3_RXD_GRO_SIZE_M
,
3174 HNS3_RXD_GRO_SIZE_S
);
3175 /* if there is no HW GRO, do not set gro params */
3176 if (!skb_shinfo(skb
)->gso_size
) {
3177 hns3_rx_checksum(ring
, skb
, l234info
, bd_base_info
, ol_info
);
3181 NAPI_GRO_CB(skb
)->count
= hnae3_get_field(l234info
,
3182 HNS3_RXD_GRO_COUNT_M
,
3183 HNS3_RXD_GRO_COUNT_S
);
3185 l3_type
= hnae3_get_field(l234info
, HNS3_RXD_L3ID_M
, HNS3_RXD_L3ID_S
);
3186 if (l3_type
== HNS3_L3_TYPE_IPV4
)
3187 skb_shinfo(skb
)->gso_type
= SKB_GSO_TCPV4
;
3188 else if (l3_type
== HNS3_L3_TYPE_IPV6
)
3189 skb_shinfo(skb
)->gso_type
= SKB_GSO_TCPV6
;
3193 return hns3_gro_complete(skb
, l234info
);
3196 static void hns3_set_rx_skb_rss_type(struct hns3_enet_ring
*ring
,
3197 struct sk_buff
*skb
, u32 rss_hash
)
3199 struct hnae3_handle
*handle
= ring
->tqp
->handle
;
3200 enum pkt_hash_types rss_type
;
3203 rss_type
= handle
->kinfo
.rss_type
;
3205 rss_type
= PKT_HASH_TYPE_NONE
;
3207 skb_set_hash(skb
, rss_hash
, rss_type
);
3210 static int hns3_handle_bdinfo(struct hns3_enet_ring
*ring
, struct sk_buff
*skb
)
3212 struct net_device
*netdev
= ring_to_netdev(ring
);
3213 enum hns3_pkt_l2t_type l2_frame_type
;
3214 u32 bd_base_info
, l234info
, ol_info
;
3215 struct hns3_desc
*desc
;
3219 /* bdinfo handled below is only valid on the last BD of the
3220 * current packet, and ring->next_to_clean indicates the first
3221 * descriptor of next packet, so need - 1 below.
3223 pre_ntc
= ring
->next_to_clean
? (ring
->next_to_clean
- 1) :
3224 (ring
->desc_num
- 1);
3225 desc
= &ring
->desc
[pre_ntc
];
3226 bd_base_info
= le32_to_cpu(desc
->rx
.bd_base_info
);
3227 l234info
= le32_to_cpu(desc
->rx
.l234_info
);
3228 ol_info
= le32_to_cpu(desc
->rx
.ol_info
);
3230 /* Based on hw strategy, the tag offloaded will be stored at
3231 * ot_vlan_tag in two layer tag case, and stored at vlan_tag
3232 * in one layer tag case.
3234 if (netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) {
3237 if (hns3_parse_vlan_tag(ring
, desc
, l234info
, &vlan_tag
))
3238 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
),
3242 if (unlikely(!desc
->rx
.pkt_len
|| (l234info
& (BIT(HNS3_RXD_TRUNCAT_B
) |
3243 BIT(HNS3_RXD_L2E_B
))))) {
3244 u64_stats_update_begin(&ring
->syncp
);
3245 if (l234info
& BIT(HNS3_RXD_L2E_B
))
3246 ring
->stats
.l2_err
++;
3248 ring
->stats
.err_pkt_len
++;
3249 u64_stats_update_end(&ring
->syncp
);
3256 /* Do update ip stack process */
3257 skb
->protocol
= eth_type_trans(skb
, netdev
);
3259 /* This is needed in order to enable forwarding support */
3260 ret
= hns3_set_gro_and_checksum(ring
, skb
, l234info
,
3261 bd_base_info
, ol_info
);
3262 if (unlikely(ret
)) {
3263 u64_stats_update_begin(&ring
->syncp
);
3264 ring
->stats
.rx_err_cnt
++;
3265 u64_stats_update_end(&ring
->syncp
);
3269 l2_frame_type
= hnae3_get_field(l234info
, HNS3_RXD_DMAC_M
,
3272 u64_stats_update_begin(&ring
->syncp
);
3273 ring
->stats
.rx_pkts
++;
3274 ring
->stats
.rx_bytes
+= len
;
3276 if (l2_frame_type
== HNS3_L2_TYPE_MULTICAST
)
3277 ring
->stats
.rx_multicast
++;
3279 u64_stats_update_end(&ring
->syncp
);
3281 ring
->tqp_vector
->rx_group
.total_bytes
+= len
;
3283 hns3_set_rx_skb_rss_type(ring
, skb
, le32_to_cpu(desc
->rx
.rss_hash
));
3287 static int hns3_handle_rx_bd(struct hns3_enet_ring
*ring
)
3289 struct sk_buff
*skb
= ring
->skb
;
3290 struct hns3_desc_cb
*desc_cb
;
3291 struct hns3_desc
*desc
;
3292 unsigned int length
;
3296 desc
= &ring
->desc
[ring
->next_to_clean
];
3297 desc_cb
= &ring
->desc_cb
[ring
->next_to_clean
];
3302 bd_base_info
= le32_to_cpu(desc
->rx
.bd_base_info
);
3304 /* Check valid BD */
3305 if (unlikely(!(bd_base_info
& BIT(HNS3_RXD_VLD_B
))))
3309 length
= le16_to_cpu(desc
->rx
.size
);
3311 ring
->va
= desc_cb
->buf
+ desc_cb
->page_offset
;
3313 dma_sync_single_for_cpu(ring_to_dev(ring
),
3314 desc_cb
->dma
+ desc_cb
->page_offset
,
3315 hns3_buf_size(ring
),
3318 /* Prefetch first cache line of first page.
3319 * Idea is to cache few bytes of the header of the packet.
3320 * Our L1 Cache line size is 64B so need to prefetch twice to make
3321 * it 128B. But in actual we can have greater size of caches with
3322 * 128B Level 1 cache lines. In such a case, single fetch would
3323 * suffice to cache in the relevant part of the header.
3325 net_prefetch(ring
->va
);
3327 ret
= hns3_alloc_skb(ring
, length
, ring
->va
);
3330 if (ret
< 0) /* alloc buffer fail */
3332 if (!(bd_base_info
& BIT(HNS3_RXD_FE_B
))) { /* need add frag */
3333 ret
= hns3_add_frag(ring
);
3338 ret
= hns3_add_frag(ring
);
3343 /* As the head data may be changed when GRO enable, copy
3344 * the head data in after other data rx completed
3346 if (skb
->len
> HNS3_RX_HEAD_SIZE
)
3347 memcpy(skb
->data
, ring
->va
,
3348 ALIGN(ring
->pull_len
, sizeof(long)));
3350 ret
= hns3_handle_bdinfo(ring
, skb
);
3351 if (unlikely(ret
)) {
3352 dev_kfree_skb_any(skb
);
3356 skb_record_rx_queue(skb
, ring
->tqp
->tqp_index
);
3360 int hns3_clean_rx_ring(struct hns3_enet_ring
*ring
, int budget
,
3361 void (*rx_fn
)(struct hns3_enet_ring
*, struct sk_buff
*))
3363 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
3364 int unused_count
= hns3_desc_unused(ring
);
3368 unused_count
-= ring
->pending_buf
;
3370 while (recv_pkts
< budget
) {
3371 /* Reuse or realloc buffers */
3372 if (unused_count
>= RCB_NOF_ALLOC_RX_BUFF_ONCE
) {
3373 hns3_nic_alloc_rx_buffers(ring
, unused_count
);
3374 unused_count
= hns3_desc_unused(ring
) -
3379 err
= hns3_handle_rx_bd(ring
);
3380 /* Do not get FE for the packet or failed to alloc skb */
3381 if (unlikely(!ring
->skb
|| err
== -ENXIO
)) {
3383 } else if (likely(!err
)) {
3384 rx_fn(ring
, ring
->skb
);
3388 unused_count
+= ring
->pending_buf
;
3390 ring
->pending_buf
= 0;
3394 /* Make all data has been write before submit */
3395 if (unused_count
> 0)
3396 hns3_nic_alloc_rx_buffers(ring
, unused_count
);
3401 static bool hns3_get_new_flow_lvl(struct hns3_enet_ring_group
*ring_group
)
3403 #define HNS3_RX_LOW_BYTE_RATE 10000
3404 #define HNS3_RX_MID_BYTE_RATE 20000
3405 #define HNS3_RX_ULTRA_PACKET_RATE 40
3407 enum hns3_flow_level_range new_flow_level
;
3408 struct hns3_enet_tqp_vector
*tqp_vector
;
3409 int packets_per_msecs
, bytes_per_msecs
;
3412 tqp_vector
= ring_group
->ring
->tqp_vector
;
3414 jiffies_to_msecs(jiffies
- tqp_vector
->last_jiffies
);
3415 if (!time_passed_ms
)
3418 do_div(ring_group
->total_packets
, time_passed_ms
);
3419 packets_per_msecs
= ring_group
->total_packets
;
3421 do_div(ring_group
->total_bytes
, time_passed_ms
);
3422 bytes_per_msecs
= ring_group
->total_bytes
;
3424 new_flow_level
= ring_group
->coal
.flow_level
;
3426 /* Simple throttlerate management
3427 * 0-10MB/s lower (50000 ints/s)
3428 * 10-20MB/s middle (20000 ints/s)
3429 * 20-1249MB/s high (18000 ints/s)
3430 * > 40000pps ultra (8000 ints/s)
3432 switch (new_flow_level
) {
3434 if (bytes_per_msecs
> HNS3_RX_LOW_BYTE_RATE
)
3435 new_flow_level
= HNS3_FLOW_MID
;
3438 if (bytes_per_msecs
> HNS3_RX_MID_BYTE_RATE
)
3439 new_flow_level
= HNS3_FLOW_HIGH
;
3440 else if (bytes_per_msecs
<= HNS3_RX_LOW_BYTE_RATE
)
3441 new_flow_level
= HNS3_FLOW_LOW
;
3443 case HNS3_FLOW_HIGH
:
3444 case HNS3_FLOW_ULTRA
:
3446 if (bytes_per_msecs
<= HNS3_RX_MID_BYTE_RATE
)
3447 new_flow_level
= HNS3_FLOW_MID
;
3451 if (packets_per_msecs
> HNS3_RX_ULTRA_PACKET_RATE
&&
3452 &tqp_vector
->rx_group
== ring_group
)
3453 new_flow_level
= HNS3_FLOW_ULTRA
;
3455 ring_group
->total_bytes
= 0;
3456 ring_group
->total_packets
= 0;
3457 ring_group
->coal
.flow_level
= new_flow_level
;
3462 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group
*ring_group
)
3464 struct hns3_enet_tqp_vector
*tqp_vector
;
3467 if (!ring_group
->ring
)
3470 tqp_vector
= ring_group
->ring
->tqp_vector
;
3471 if (!tqp_vector
->last_jiffies
)
3474 if (ring_group
->total_packets
== 0) {
3475 ring_group
->coal
.int_gl
= HNS3_INT_GL_50K
;
3476 ring_group
->coal
.flow_level
= HNS3_FLOW_LOW
;
3480 if (!hns3_get_new_flow_lvl(ring_group
))
3483 new_int_gl
= ring_group
->coal
.int_gl
;
3484 switch (ring_group
->coal
.flow_level
) {
3486 new_int_gl
= HNS3_INT_GL_50K
;
3489 new_int_gl
= HNS3_INT_GL_20K
;
3491 case HNS3_FLOW_HIGH
:
3492 new_int_gl
= HNS3_INT_GL_18K
;
3494 case HNS3_FLOW_ULTRA
:
3495 new_int_gl
= HNS3_INT_GL_8K
;
3501 if (new_int_gl
!= ring_group
->coal
.int_gl
) {
3502 ring_group
->coal
.int_gl
= new_int_gl
;
3508 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector
*tqp_vector
)
3510 struct hns3_enet_ring_group
*rx_group
= &tqp_vector
->rx_group
;
3511 struct hns3_enet_ring_group
*tx_group
= &tqp_vector
->tx_group
;
3512 bool rx_update
, tx_update
;
3514 /* update param every 1000ms */
3515 if (time_before(jiffies
,
3516 tqp_vector
->last_jiffies
+ msecs_to_jiffies(1000)))
3519 if (rx_group
->coal
.adapt_enable
) {
3520 rx_update
= hns3_get_new_int_gl(rx_group
);
3522 hns3_set_vector_coalesce_rx_gl(tqp_vector
,
3523 rx_group
->coal
.int_gl
);
3526 if (tx_group
->coal
.adapt_enable
) {
3527 tx_update
= hns3_get_new_int_gl(tx_group
);
3529 hns3_set_vector_coalesce_tx_gl(tqp_vector
,
3530 tx_group
->coal
.int_gl
);
3533 tqp_vector
->last_jiffies
= jiffies
;
3536 static int hns3_nic_common_poll(struct napi_struct
*napi
, int budget
)
3538 struct hns3_nic_priv
*priv
= netdev_priv(napi
->dev
);
3539 struct hns3_enet_ring
*ring
;
3540 int rx_pkt_total
= 0;
3542 struct hns3_enet_tqp_vector
*tqp_vector
=
3543 container_of(napi
, struct hns3_enet_tqp_vector
, napi
);
3544 bool clean_complete
= true;
3545 int rx_budget
= budget
;
3547 if (unlikely(test_bit(HNS3_NIC_STATE_DOWN
, &priv
->state
))) {
3548 napi_complete(napi
);
3552 /* Since the actual Tx work is minimal, we can give the Tx a larger
3553 * budget and be more aggressive about cleaning up the Tx descriptors.
3555 hns3_for_each_ring(ring
, tqp_vector
->tx_group
)
3556 hns3_clean_tx_ring(ring
, budget
);
3558 /* make sure rx ring budget not smaller than 1 */
3559 if (tqp_vector
->num_tqps
> 1)
3560 rx_budget
= max(budget
/ tqp_vector
->num_tqps
, 1);
3562 hns3_for_each_ring(ring
, tqp_vector
->rx_group
) {
3563 int rx_cleaned
= hns3_clean_rx_ring(ring
, rx_budget
,
3566 if (rx_cleaned
>= rx_budget
)
3567 clean_complete
= false;
3569 rx_pkt_total
+= rx_cleaned
;
3572 tqp_vector
->rx_group
.total_packets
+= rx_pkt_total
;
3574 if (!clean_complete
)
3577 if (napi_complete(napi
) &&
3578 likely(!test_bit(HNS3_NIC_STATE_DOWN
, &priv
->state
))) {
3579 hns3_update_new_int_gl(tqp_vector
);
3580 hns3_mask_vector_irq(tqp_vector
, 1);
3583 return rx_pkt_total
;
3586 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector
*tqp_vector
,
3587 struct hnae3_ring_chain_node
*head
)
3589 struct pci_dev
*pdev
= tqp_vector
->handle
->pdev
;
3590 struct hnae3_ring_chain_node
*cur_chain
= head
;
3591 struct hnae3_ring_chain_node
*chain
;
3592 struct hns3_enet_ring
*tx_ring
;
3593 struct hns3_enet_ring
*rx_ring
;
3595 tx_ring
= tqp_vector
->tx_group
.ring
;
3597 cur_chain
->tqp_index
= tx_ring
->tqp
->tqp_index
;
3598 hnae3_set_bit(cur_chain
->flag
, HNAE3_RING_TYPE_B
,
3599 HNAE3_RING_TYPE_TX
);
3600 hnae3_set_field(cur_chain
->int_gl_idx
, HNAE3_RING_GL_IDX_M
,
3601 HNAE3_RING_GL_IDX_S
, HNAE3_RING_GL_TX
);
3603 cur_chain
->next
= NULL
;
3605 while (tx_ring
->next
) {
3606 tx_ring
= tx_ring
->next
;
3608 chain
= devm_kzalloc(&pdev
->dev
, sizeof(*chain
),
3611 goto err_free_chain
;
3613 cur_chain
->next
= chain
;
3614 chain
->tqp_index
= tx_ring
->tqp
->tqp_index
;
3615 hnae3_set_bit(chain
->flag
, HNAE3_RING_TYPE_B
,
3616 HNAE3_RING_TYPE_TX
);
3617 hnae3_set_field(chain
->int_gl_idx
,
3618 HNAE3_RING_GL_IDX_M
,
3619 HNAE3_RING_GL_IDX_S
,
3626 rx_ring
= tqp_vector
->rx_group
.ring
;
3627 if (!tx_ring
&& rx_ring
) {
3628 cur_chain
->next
= NULL
;
3629 cur_chain
->tqp_index
= rx_ring
->tqp
->tqp_index
;
3630 hnae3_set_bit(cur_chain
->flag
, HNAE3_RING_TYPE_B
,
3631 HNAE3_RING_TYPE_RX
);
3632 hnae3_set_field(cur_chain
->int_gl_idx
, HNAE3_RING_GL_IDX_M
,
3633 HNAE3_RING_GL_IDX_S
, HNAE3_RING_GL_RX
);
3635 rx_ring
= rx_ring
->next
;
3639 chain
= devm_kzalloc(&pdev
->dev
, sizeof(*chain
), GFP_KERNEL
);
3641 goto err_free_chain
;
3643 cur_chain
->next
= chain
;
3644 chain
->tqp_index
= rx_ring
->tqp
->tqp_index
;
3645 hnae3_set_bit(chain
->flag
, HNAE3_RING_TYPE_B
,
3646 HNAE3_RING_TYPE_RX
);
3647 hnae3_set_field(chain
->int_gl_idx
, HNAE3_RING_GL_IDX_M
,
3648 HNAE3_RING_GL_IDX_S
, HNAE3_RING_GL_RX
);
3652 rx_ring
= rx_ring
->next
;
3658 cur_chain
= head
->next
;
3660 chain
= cur_chain
->next
;
3661 devm_kfree(&pdev
->dev
, cur_chain
);
3669 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector
*tqp_vector
,
3670 struct hnae3_ring_chain_node
*head
)
3672 struct pci_dev
*pdev
= tqp_vector
->handle
->pdev
;
3673 struct hnae3_ring_chain_node
*chain_tmp
, *chain
;
3678 chain_tmp
= chain
->next
;
3679 devm_kfree(&pdev
->dev
, chain
);
3684 static void hns3_add_ring_to_group(struct hns3_enet_ring_group
*group
,
3685 struct hns3_enet_ring
*ring
)
3687 ring
->next
= group
->ring
;
3693 static void hns3_nic_set_cpumask(struct hns3_nic_priv
*priv
)
3695 struct pci_dev
*pdev
= priv
->ae_handle
->pdev
;
3696 struct hns3_enet_tqp_vector
*tqp_vector
;
3697 int num_vectors
= priv
->vector_num
;
3701 numa_node
= dev_to_node(&pdev
->dev
);
3703 for (vector_i
= 0; vector_i
< num_vectors
; vector_i
++) {
3704 tqp_vector
= &priv
->tqp_vector
[vector_i
];
3705 cpumask_set_cpu(cpumask_local_spread(vector_i
, numa_node
),
3706 &tqp_vector
->affinity_mask
);
3710 static int hns3_nic_init_vector_data(struct hns3_nic_priv
*priv
)
3712 struct hnae3_ring_chain_node vector_ring_chain
;
3713 struct hnae3_handle
*h
= priv
->ae_handle
;
3714 struct hns3_enet_tqp_vector
*tqp_vector
;
3718 hns3_nic_set_cpumask(priv
);
3720 for (i
= 0; i
< priv
->vector_num
; i
++) {
3721 tqp_vector
= &priv
->tqp_vector
[i
];
3722 hns3_vector_coalesce_init_hw(tqp_vector
, priv
);
3723 tqp_vector
->num_tqps
= 0;
3726 for (i
= 0; i
< h
->kinfo
.num_tqps
; i
++) {
3727 u16 vector_i
= i
% priv
->vector_num
;
3728 u16 tqp_num
= h
->kinfo
.num_tqps
;
3730 tqp_vector
= &priv
->tqp_vector
[vector_i
];
3732 hns3_add_ring_to_group(&tqp_vector
->tx_group
,
3735 hns3_add_ring_to_group(&tqp_vector
->rx_group
,
3736 &priv
->ring
[i
+ tqp_num
]);
3738 priv
->ring
[i
].tqp_vector
= tqp_vector
;
3739 priv
->ring
[i
+ tqp_num
].tqp_vector
= tqp_vector
;
3740 tqp_vector
->num_tqps
++;
3743 for (i
= 0; i
< priv
->vector_num
; i
++) {
3744 tqp_vector
= &priv
->tqp_vector
[i
];
3746 tqp_vector
->rx_group
.total_bytes
= 0;
3747 tqp_vector
->rx_group
.total_packets
= 0;
3748 tqp_vector
->tx_group
.total_bytes
= 0;
3749 tqp_vector
->tx_group
.total_packets
= 0;
3750 tqp_vector
->handle
= h
;
3752 ret
= hns3_get_vector_ring_chain(tqp_vector
,
3753 &vector_ring_chain
);
3757 ret
= h
->ae_algo
->ops
->map_ring_to_vector(h
,
3758 tqp_vector
->vector_irq
, &vector_ring_chain
);
3760 hns3_free_vector_ring_chain(tqp_vector
, &vector_ring_chain
);
3765 netif_napi_add(priv
->netdev
, &tqp_vector
->napi
,
3766 hns3_nic_common_poll
, NAPI_POLL_WEIGHT
);
3773 netif_napi_del(&priv
->tqp_vector
[i
].napi
);
3778 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv
*priv
)
3780 struct hnae3_handle
*h
= priv
->ae_handle
;
3781 struct hns3_enet_tqp_vector
*tqp_vector
;
3782 struct hnae3_vector_info
*vector
;
3783 struct pci_dev
*pdev
= h
->pdev
;
3784 u16 tqp_num
= h
->kinfo
.num_tqps
;
3789 /* RSS size, cpu online and vector_num should be the same */
3790 /* Should consider 2p/4p later */
3791 vector_num
= min_t(u16
, num_online_cpus(), tqp_num
);
3793 vector
= devm_kcalloc(&pdev
->dev
, vector_num
, sizeof(*vector
),
3798 /* save the actual available vector number */
3799 vector_num
= h
->ae_algo
->ops
->get_vector(h
, vector_num
, vector
);
3801 priv
->vector_num
= vector_num
;
3802 priv
->tqp_vector
= (struct hns3_enet_tqp_vector
*)
3803 devm_kcalloc(&pdev
->dev
, vector_num
, sizeof(*priv
->tqp_vector
),
3805 if (!priv
->tqp_vector
) {
3810 for (i
= 0; i
< priv
->vector_num
; i
++) {
3811 tqp_vector
= &priv
->tqp_vector
[i
];
3812 tqp_vector
->idx
= i
;
3813 tqp_vector
->mask_addr
= vector
[i
].io_addr
;
3814 tqp_vector
->vector_irq
= vector
[i
].vector
;
3815 hns3_vector_coalesce_init(tqp_vector
, priv
);
3819 devm_kfree(&pdev
->dev
, vector
);
3823 static void hns3_clear_ring_group(struct hns3_enet_ring_group
*group
)
3829 static void hns3_nic_uninit_vector_data(struct hns3_nic_priv
*priv
)
3831 struct hnae3_ring_chain_node vector_ring_chain
;
3832 struct hnae3_handle
*h
= priv
->ae_handle
;
3833 struct hns3_enet_tqp_vector
*tqp_vector
;
3836 for (i
= 0; i
< priv
->vector_num
; i
++) {
3837 tqp_vector
= &priv
->tqp_vector
[i
];
3839 if (!tqp_vector
->rx_group
.ring
&& !tqp_vector
->tx_group
.ring
)
3842 /* Since the mapping can be overwritten, when fail to get the
3843 * chain between vector and ring, we should go on to deal with
3844 * the remaining options.
3846 if (hns3_get_vector_ring_chain(tqp_vector
, &vector_ring_chain
))
3847 dev_warn(priv
->dev
, "failed to get ring chain\n");
3849 h
->ae_algo
->ops
->unmap_ring_from_vector(h
,
3850 tqp_vector
->vector_irq
, &vector_ring_chain
);
3852 hns3_free_vector_ring_chain(tqp_vector
, &vector_ring_chain
);
3854 hns3_clear_ring_group(&tqp_vector
->rx_group
);
3855 hns3_clear_ring_group(&tqp_vector
->tx_group
);
3856 netif_napi_del(&priv
->tqp_vector
[i
].napi
);
3860 static void hns3_nic_dealloc_vector_data(struct hns3_nic_priv
*priv
)
3862 struct hnae3_handle
*h
= priv
->ae_handle
;
3863 struct pci_dev
*pdev
= h
->pdev
;
3866 for (i
= 0; i
< priv
->vector_num
; i
++) {
3867 struct hns3_enet_tqp_vector
*tqp_vector
;
3869 tqp_vector
= &priv
->tqp_vector
[i
];
3870 ret
= h
->ae_algo
->ops
->put_vector(h
, tqp_vector
->vector_irq
);
3875 devm_kfree(&pdev
->dev
, priv
->tqp_vector
);
3878 static void hns3_ring_get_cfg(struct hnae3_queue
*q
, struct hns3_nic_priv
*priv
,
3879 unsigned int ring_type
)
3881 int queue_num
= priv
->ae_handle
->kinfo
.num_tqps
;
3882 struct hns3_enet_ring
*ring
;
3885 if (ring_type
== HNAE3_RING_TYPE_TX
) {
3886 ring
= &priv
->ring
[q
->tqp_index
];
3887 desc_num
= priv
->ae_handle
->kinfo
.num_tx_desc
;
3888 ring
->queue_index
= q
->tqp_index
;
3890 ring
= &priv
->ring
[q
->tqp_index
+ queue_num
];
3891 desc_num
= priv
->ae_handle
->kinfo
.num_rx_desc
;
3892 ring
->queue_index
= q
->tqp_index
;
3895 hnae3_set_bit(ring
->flag
, HNAE3_RING_TYPE_B
, ring_type
);
3899 ring
->desc_cb
= NULL
;
3900 ring
->dev
= priv
->dev
;
3901 ring
->desc_dma_addr
= 0;
3902 ring
->buf_size
= q
->buf_size
;
3903 ring
->desc_num
= desc_num
;
3904 ring
->next_to_use
= 0;
3905 ring
->next_to_clean
= 0;
3906 ring
->last_to_use
= 0;
3909 static void hns3_queue_to_ring(struct hnae3_queue
*tqp
,
3910 struct hns3_nic_priv
*priv
)
3912 hns3_ring_get_cfg(tqp
, priv
, HNAE3_RING_TYPE_TX
);
3913 hns3_ring_get_cfg(tqp
, priv
, HNAE3_RING_TYPE_RX
);
3916 static int hns3_get_ring_config(struct hns3_nic_priv
*priv
)
3918 struct hnae3_handle
*h
= priv
->ae_handle
;
3919 struct pci_dev
*pdev
= h
->pdev
;
3922 priv
->ring
= devm_kzalloc(&pdev
->dev
,
3923 array3_size(h
->kinfo
.num_tqps
,
3924 sizeof(*priv
->ring
), 2),
3929 for (i
= 0; i
< h
->kinfo
.num_tqps
; i
++)
3930 hns3_queue_to_ring(h
->kinfo
.tqp
[i
], priv
);
3935 static void hns3_put_ring_config(struct hns3_nic_priv
*priv
)
3940 devm_kfree(priv
->dev
, priv
->ring
);
3944 static int hns3_alloc_ring_memory(struct hns3_enet_ring
*ring
)
3948 if (ring
->desc_num
<= 0 || ring
->buf_size
<= 0)
3951 ring
->desc_cb
= devm_kcalloc(ring_to_dev(ring
), ring
->desc_num
,
3952 sizeof(ring
->desc_cb
[0]), GFP_KERNEL
);
3953 if (!ring
->desc_cb
) {
3958 ret
= hns3_alloc_desc(ring
);
3960 goto out_with_desc_cb
;
3962 if (!HNAE3_IS_TX_RING(ring
)) {
3963 ret
= hns3_alloc_ring_buffers(ring
);
3971 hns3_free_desc(ring
);
3973 devm_kfree(ring_to_dev(ring
), ring
->desc_cb
);
3974 ring
->desc_cb
= NULL
;
3979 void hns3_fini_ring(struct hns3_enet_ring
*ring
)
3981 hns3_free_desc(ring
);
3982 devm_kfree(ring_to_dev(ring
), ring
->desc_cb
);
3983 ring
->desc_cb
= NULL
;
3984 ring
->next_to_clean
= 0;
3985 ring
->next_to_use
= 0;
3986 ring
->last_to_use
= 0;
3987 ring
->pending_buf
= 0;
3989 dev_kfree_skb_any(ring
->skb
);
3994 static int hns3_buf_size2type(u32 buf_size
)
4000 bd_size_type
= HNS3_BD_SIZE_512_TYPE
;
4003 bd_size_type
= HNS3_BD_SIZE_1024_TYPE
;
4006 bd_size_type
= HNS3_BD_SIZE_2048_TYPE
;
4009 bd_size_type
= HNS3_BD_SIZE_4096_TYPE
;
4012 bd_size_type
= HNS3_BD_SIZE_2048_TYPE
;
4015 return bd_size_type
;
4018 static void hns3_init_ring_hw(struct hns3_enet_ring
*ring
)
4020 dma_addr_t dma
= ring
->desc_dma_addr
;
4021 struct hnae3_queue
*q
= ring
->tqp
;
4023 if (!HNAE3_IS_TX_RING(ring
)) {
4024 hns3_write_dev(q
, HNS3_RING_RX_RING_BASEADDR_L_REG
, (u32
)dma
);
4025 hns3_write_dev(q
, HNS3_RING_RX_RING_BASEADDR_H_REG
,
4026 (u32
)((dma
>> 31) >> 1));
4028 hns3_write_dev(q
, HNS3_RING_RX_RING_BD_LEN_REG
,
4029 hns3_buf_size2type(ring
->buf_size
));
4030 hns3_write_dev(q
, HNS3_RING_RX_RING_BD_NUM_REG
,
4031 ring
->desc_num
/ 8 - 1);
4034 hns3_write_dev(q
, HNS3_RING_TX_RING_BASEADDR_L_REG
,
4036 hns3_write_dev(q
, HNS3_RING_TX_RING_BASEADDR_H_REG
,
4037 (u32
)((dma
>> 31) >> 1));
4039 hns3_write_dev(q
, HNS3_RING_TX_RING_BD_NUM_REG
,
4040 ring
->desc_num
/ 8 - 1);
4044 static void hns3_init_tx_ring_tc(struct hns3_nic_priv
*priv
)
4046 struct hnae3_knic_private_info
*kinfo
= &priv
->ae_handle
->kinfo
;
4047 struct hnae3_tc_info
*tc_info
= &kinfo
->tc_info
;
4050 for (i
= 0; i
< HNAE3_MAX_TC
; i
++) {
4053 if (!test_bit(i
, &tc_info
->tc_en
))
4056 for (j
= 0; j
< tc_info
->tqp_count
[i
]; j
++) {
4057 struct hnae3_queue
*q
;
4059 q
= priv
->ring
[tc_info
->tqp_offset
[i
] + j
].tqp
;
4060 hns3_write_dev(q
, HNS3_RING_TX_RING_TC_REG
, i
);
4065 int hns3_init_all_ring(struct hns3_nic_priv
*priv
)
4067 struct hnae3_handle
*h
= priv
->ae_handle
;
4068 int ring_num
= h
->kinfo
.num_tqps
* 2;
4072 for (i
= 0; i
< ring_num
; i
++) {
4073 ret
= hns3_alloc_ring_memory(&priv
->ring
[i
]);
4076 "Alloc ring memory fail! ret=%d\n", ret
);
4077 goto out_when_alloc_ring_memory
;
4080 u64_stats_init(&priv
->ring
[i
].syncp
);
4085 out_when_alloc_ring_memory
:
4086 for (j
= i
- 1; j
>= 0; j
--)
4087 hns3_fini_ring(&priv
->ring
[j
]);
4092 int hns3_uninit_all_ring(struct hns3_nic_priv
*priv
)
4094 struct hnae3_handle
*h
= priv
->ae_handle
;
4097 for (i
= 0; i
< h
->kinfo
.num_tqps
; i
++) {
4098 hns3_fini_ring(&priv
->ring
[i
]);
4099 hns3_fini_ring(&priv
->ring
[i
+ h
->kinfo
.num_tqps
]);
4104 /* Set mac addr if it is configured. or leave it to the AE driver */
4105 static int hns3_init_mac_addr(struct net_device
*netdev
)
4107 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
4108 struct hnae3_handle
*h
= priv
->ae_handle
;
4109 u8 mac_addr_temp
[ETH_ALEN
];
4112 if (h
->ae_algo
->ops
->get_mac_addr
)
4113 h
->ae_algo
->ops
->get_mac_addr(h
, mac_addr_temp
);
4115 /* Check if the MAC address is valid, if not get a random one */
4116 if (!is_valid_ether_addr(mac_addr_temp
)) {
4117 eth_hw_addr_random(netdev
);
4118 dev_warn(priv
->dev
, "using random MAC address %pM\n",
4120 } else if (!ether_addr_equal(netdev
->dev_addr
, mac_addr_temp
)) {
4121 ether_addr_copy(netdev
->dev_addr
, mac_addr_temp
);
4122 ether_addr_copy(netdev
->perm_addr
, mac_addr_temp
);
4127 if (h
->ae_algo
->ops
->set_mac_addr
)
4128 ret
= h
->ae_algo
->ops
->set_mac_addr(h
, netdev
->dev_addr
, true);
4133 static int hns3_init_phy(struct net_device
*netdev
)
4135 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
4138 if (h
->ae_algo
->ops
->mac_connect_phy
)
4139 ret
= h
->ae_algo
->ops
->mac_connect_phy(h
);
4144 static void hns3_uninit_phy(struct net_device
*netdev
)
4146 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
4148 if (h
->ae_algo
->ops
->mac_disconnect_phy
)
4149 h
->ae_algo
->ops
->mac_disconnect_phy(h
);
4152 static void hns3_del_all_fd_rules(struct net_device
*netdev
, bool clear_list
)
4154 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
4156 if (h
->ae_algo
->ops
->del_all_fd_entries
)
4157 h
->ae_algo
->ops
->del_all_fd_entries(h
, clear_list
);
4160 static int hns3_client_start(struct hnae3_handle
*handle
)
4162 if (!handle
->ae_algo
->ops
->client_start
)
4165 return handle
->ae_algo
->ops
->client_start(handle
);
4168 static void hns3_client_stop(struct hnae3_handle
*handle
)
4170 if (!handle
->ae_algo
->ops
->client_stop
)
4173 handle
->ae_algo
->ops
->client_stop(handle
);
4176 static void hns3_info_show(struct hns3_nic_priv
*priv
)
4178 struct hnae3_knic_private_info
*kinfo
= &priv
->ae_handle
->kinfo
;
4180 dev_info(priv
->dev
, "MAC address: %pM\n", priv
->netdev
->dev_addr
);
4181 dev_info(priv
->dev
, "Task queue pairs numbers: %u\n", kinfo
->num_tqps
);
4182 dev_info(priv
->dev
, "RSS size: %u\n", kinfo
->rss_size
);
4183 dev_info(priv
->dev
, "Allocated RSS size: %u\n", kinfo
->req_rss_size
);
4184 dev_info(priv
->dev
, "RX buffer length: %u\n", kinfo
->rx_buf_len
);
4185 dev_info(priv
->dev
, "Desc num per TX queue: %u\n", kinfo
->num_tx_desc
);
4186 dev_info(priv
->dev
, "Desc num per RX queue: %u\n", kinfo
->num_rx_desc
);
4187 dev_info(priv
->dev
, "Total number of enabled TCs: %u\n",
4188 kinfo
->tc_info
.num_tc
);
4189 dev_info(priv
->dev
, "Max mtu size: %u\n", priv
->netdev
->max_mtu
);
4192 static int hns3_client_init(struct hnae3_handle
*handle
)
4194 struct pci_dev
*pdev
= handle
->pdev
;
4195 struct hnae3_ae_dev
*ae_dev
= pci_get_drvdata(pdev
);
4196 u16 alloc_tqps
, max_rss_size
;
4197 struct hns3_nic_priv
*priv
;
4198 struct net_device
*netdev
;
4201 handle
->ae_algo
->ops
->get_tqps_and_rss_info(handle
, &alloc_tqps
,
4203 netdev
= alloc_etherdev_mq(sizeof(struct hns3_nic_priv
), alloc_tqps
);
4207 priv
= netdev_priv(netdev
);
4208 priv
->dev
= &pdev
->dev
;
4209 priv
->netdev
= netdev
;
4210 priv
->ae_handle
= handle
;
4211 priv
->tx_timeout_count
= 0;
4212 priv
->max_non_tso_bd_num
= ae_dev
->dev_specs
.max_non_tso_bd_num
;
4213 set_bit(HNS3_NIC_STATE_DOWN
, &priv
->state
);
4215 handle
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_LEVEL
);
4217 handle
->kinfo
.netdev
= netdev
;
4218 handle
->priv
= (void *)priv
;
4220 hns3_init_mac_addr(netdev
);
4222 hns3_set_default_feature(netdev
);
4224 netdev
->watchdog_timeo
= HNS3_TX_TIMEOUT
;
4225 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
4226 netdev
->netdev_ops
= &hns3_nic_netdev_ops
;
4227 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
4228 hns3_ethtool_set_ops(netdev
);
4230 /* Carrier off reporting is important to ethtool even BEFORE open */
4231 netif_carrier_off(netdev
);
4233 ret
= hns3_get_ring_config(priv
);
4236 goto out_get_ring_cfg
;
4239 ret
= hns3_nic_alloc_vector_data(priv
);
4242 goto out_alloc_vector_data
;
4245 ret
= hns3_nic_init_vector_data(priv
);
4248 goto out_init_vector_data
;
4251 ret
= hns3_init_all_ring(priv
);
4257 ret
= hns3_init_phy(netdev
);
4261 ret
= register_netdev(netdev
);
4263 dev_err(priv
->dev
, "probe register netdev fail!\n");
4264 goto out_reg_netdev_fail
;
4267 /* the device can work without cpu rmap, only aRFS needs it */
4268 ret
= hns3_set_rx_cpu_rmap(netdev
);
4270 dev_warn(priv
->dev
, "set rx cpu rmap fail, ret=%d\n", ret
);
4272 ret
= hns3_nic_init_irq(priv
);
4274 dev_err(priv
->dev
, "init irq failed! ret=%d\n", ret
);
4275 hns3_free_rx_cpu_rmap(netdev
);
4276 goto out_init_irq_fail
;
4279 ret
= hns3_client_start(handle
);
4281 dev_err(priv
->dev
, "hns3_client_start fail! ret=%d\n", ret
);
4282 goto out_client_start
;
4285 hns3_dcbnl_setup(handle
);
4287 hns3_dbg_init(handle
);
4289 /* MTU range: (ETH_MIN_MTU(kernel default) - 9702) */
4290 netdev
->max_mtu
= HNS3_MAX_MTU
;
4292 if (test_bit(HNAE3_DEV_SUPPORT_HW_TX_CSUM_B
, ae_dev
->caps
))
4293 set_bit(HNS3_NIC_STATE_HW_TX_CSUM_ENABLE
, &priv
->state
);
4295 set_bit(HNS3_NIC_STATE_INITED
, &priv
->state
);
4297 if (ae_dev
->dev_version
>= HNAE3_DEVICE_VERSION_V3
)
4298 set_bit(HNAE3_PFLAG_LIMIT_PROMISC
, &handle
->supported_pflags
);
4300 if (netif_msg_drv(handle
))
4301 hns3_info_show(priv
);
4306 hns3_free_rx_cpu_rmap(netdev
);
4307 hns3_nic_uninit_irq(priv
);
4309 unregister_netdev(netdev
);
4310 out_reg_netdev_fail
:
4311 hns3_uninit_phy(netdev
);
4313 hns3_uninit_all_ring(priv
);
4315 hns3_nic_uninit_vector_data(priv
);
4316 out_init_vector_data
:
4317 hns3_nic_dealloc_vector_data(priv
);
4318 out_alloc_vector_data
:
4321 priv
->ae_handle
= NULL
;
4322 free_netdev(netdev
);
4326 static void hns3_client_uninit(struct hnae3_handle
*handle
, bool reset
)
4328 struct net_device
*netdev
= handle
->kinfo
.netdev
;
4329 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
4332 if (netdev
->reg_state
!= NETREG_UNINITIALIZED
)
4333 unregister_netdev(netdev
);
4335 hns3_client_stop(handle
);
4337 hns3_uninit_phy(netdev
);
4339 if (!test_and_clear_bit(HNS3_NIC_STATE_INITED
, &priv
->state
)) {
4340 netdev_warn(netdev
, "already uninitialized\n");
4341 goto out_netdev_free
;
4344 hns3_free_rx_cpu_rmap(netdev
);
4346 hns3_nic_uninit_irq(priv
);
4348 hns3_del_all_fd_rules(netdev
, true);
4350 hns3_clear_all_ring(handle
, true);
4352 hns3_nic_uninit_vector_data(priv
);
4354 hns3_nic_dealloc_vector_data(priv
);
4356 ret
= hns3_uninit_all_ring(priv
);
4358 netdev_err(netdev
, "uninit ring error\n");
4360 hns3_put_ring_config(priv
);
4363 hns3_dbg_uninit(handle
);
4364 free_netdev(netdev
);
4367 static void hns3_link_status_change(struct hnae3_handle
*handle
, bool linkup
)
4369 struct net_device
*netdev
= handle
->kinfo
.netdev
;
4375 netif_tx_wake_all_queues(netdev
);
4376 netif_carrier_on(netdev
);
4377 if (netif_msg_link(handle
))
4378 netdev_info(netdev
, "link up\n");
4380 netif_carrier_off(netdev
);
4381 netif_tx_stop_all_queues(netdev
);
4382 if (netif_msg_link(handle
))
4383 netdev_info(netdev
, "link down\n");
4387 static int hns3_client_setup_tc(struct hnae3_handle
*handle
, u8 tc
)
4389 struct hnae3_knic_private_info
*kinfo
= &handle
->kinfo
;
4390 struct net_device
*ndev
= kinfo
->netdev
;
4392 if (tc
> HNAE3_MAX_TC
)
4398 return hns3_nic_set_real_num_queue(ndev
);
4401 static void hns3_clear_tx_ring(struct hns3_enet_ring
*ring
)
4403 while (ring
->next_to_clean
!= ring
->next_to_use
) {
4404 ring
->desc
[ring
->next_to_clean
].tx
.bdtp_fe_sc_vld_ra_ri
= 0;
4405 hns3_free_buffer_detach(ring
, ring
->next_to_clean
, 0);
4406 ring_ptr_move_fw(ring
, next_to_clean
);
4409 ring
->pending_buf
= 0;
4412 static int hns3_clear_rx_ring(struct hns3_enet_ring
*ring
)
4414 struct hns3_desc_cb res_cbs
;
4417 while (ring
->next_to_use
!= ring
->next_to_clean
) {
4418 /* When a buffer is not reused, it's memory has been
4419 * freed in hns3_handle_rx_bd or will be freed by
4420 * stack, so we need to replace the buffer here.
4422 if (!ring
->desc_cb
[ring
->next_to_use
].reuse_flag
) {
4423 ret
= hns3_alloc_and_map_buffer(ring
, &res_cbs
);
4425 u64_stats_update_begin(&ring
->syncp
);
4426 ring
->stats
.sw_err_cnt
++;
4427 u64_stats_update_end(&ring
->syncp
);
4428 /* if alloc new buffer fail, exit directly
4429 * and reclear in up flow.
4431 netdev_warn(ring_to_netdev(ring
),
4432 "reserve buffer map failed, ret = %d\n",
4436 hns3_replace_buffer(ring
, ring
->next_to_use
, &res_cbs
);
4438 ring_ptr_move_fw(ring
, next_to_use
);
4441 /* Free the pending skb in rx ring */
4443 dev_kfree_skb_any(ring
->skb
);
4445 ring
->pending_buf
= 0;
4451 static void hns3_force_clear_rx_ring(struct hns3_enet_ring
*ring
)
4453 while (ring
->next_to_use
!= ring
->next_to_clean
) {
4454 /* When a buffer is not reused, it's memory has been
4455 * freed in hns3_handle_rx_bd or will be freed by
4456 * stack, so only need to unmap the buffer here.
4458 if (!ring
->desc_cb
[ring
->next_to_use
].reuse_flag
) {
4459 hns3_unmap_buffer(ring
,
4460 &ring
->desc_cb
[ring
->next_to_use
]);
4461 ring
->desc_cb
[ring
->next_to_use
].dma
= 0;
4464 ring_ptr_move_fw(ring
, next_to_use
);
4468 static void hns3_clear_all_ring(struct hnae3_handle
*h
, bool force
)
4470 struct net_device
*ndev
= h
->kinfo
.netdev
;
4471 struct hns3_nic_priv
*priv
= netdev_priv(ndev
);
4474 for (i
= 0; i
< h
->kinfo
.num_tqps
; i
++) {
4475 struct hns3_enet_ring
*ring
;
4477 ring
= &priv
->ring
[i
];
4478 hns3_clear_tx_ring(ring
);
4480 ring
= &priv
->ring
[i
+ h
->kinfo
.num_tqps
];
4481 /* Continue to clear other rings even if clearing some
4485 hns3_force_clear_rx_ring(ring
);
4487 hns3_clear_rx_ring(ring
);
4491 int hns3_nic_reset_all_ring(struct hnae3_handle
*h
)
4493 struct net_device
*ndev
= h
->kinfo
.netdev
;
4494 struct hns3_nic_priv
*priv
= netdev_priv(ndev
);
4495 struct hns3_enet_ring
*rx_ring
;
4499 for (i
= 0; i
< h
->kinfo
.num_tqps
; i
++) {
4500 ret
= h
->ae_algo
->ops
->reset_queue(h
, i
);
4504 hns3_init_ring_hw(&priv
->ring
[i
]);
4506 /* We need to clear tx ring here because self test will
4507 * use the ring and will not run down before up
4509 hns3_clear_tx_ring(&priv
->ring
[i
]);
4510 priv
->ring
[i
].next_to_clean
= 0;
4511 priv
->ring
[i
].next_to_use
= 0;
4512 priv
->ring
[i
].last_to_use
= 0;
4514 rx_ring
= &priv
->ring
[i
+ h
->kinfo
.num_tqps
];
4515 hns3_init_ring_hw(rx_ring
);
4516 ret
= hns3_clear_rx_ring(rx_ring
);
4520 /* We can not know the hardware head and tail when this
4521 * function is called in reset flow, so we reuse all desc.
4523 for (j
= 0; j
< rx_ring
->desc_num
; j
++)
4524 hns3_reuse_buffer(rx_ring
, j
);
4526 rx_ring
->next_to_clean
= 0;
4527 rx_ring
->next_to_use
= 0;
4530 hns3_init_tx_ring_tc(priv
);
4535 static void hns3_store_coal(struct hns3_nic_priv
*priv
)
4537 /* ethtool only support setting and querying one coal
4538 * configuration for now, so save the vector 0' coal
4539 * configuration here in order to restore it.
4541 memcpy(&priv
->tx_coal
, &priv
->tqp_vector
[0].tx_group
.coal
,
4542 sizeof(struct hns3_enet_coalesce
));
4543 memcpy(&priv
->rx_coal
, &priv
->tqp_vector
[0].rx_group
.coal
,
4544 sizeof(struct hns3_enet_coalesce
));
4547 static void hns3_restore_coal(struct hns3_nic_priv
*priv
)
4549 u16 vector_num
= priv
->vector_num
;
4552 for (i
= 0; i
< vector_num
; i
++) {
4553 memcpy(&priv
->tqp_vector
[i
].tx_group
.coal
, &priv
->tx_coal
,
4554 sizeof(struct hns3_enet_coalesce
));
4555 memcpy(&priv
->tqp_vector
[i
].rx_group
.coal
, &priv
->rx_coal
,
4556 sizeof(struct hns3_enet_coalesce
));
4560 static int hns3_reset_notify_down_enet(struct hnae3_handle
*handle
)
4562 struct hnae3_knic_private_info
*kinfo
= &handle
->kinfo
;
4563 struct net_device
*ndev
= kinfo
->netdev
;
4564 struct hns3_nic_priv
*priv
= netdev_priv(ndev
);
4566 if (test_and_set_bit(HNS3_NIC_STATE_RESETTING
, &priv
->state
))
4569 if (!netif_running(ndev
))
4572 return hns3_nic_net_stop(ndev
);
4575 static int hns3_reset_notify_up_enet(struct hnae3_handle
*handle
)
4577 struct hnae3_knic_private_info
*kinfo
= &handle
->kinfo
;
4578 struct hns3_nic_priv
*priv
= netdev_priv(kinfo
->netdev
);
4581 clear_bit(HNS3_NIC_STATE_RESETTING
, &priv
->state
);
4583 if (netif_running(kinfo
->netdev
)) {
4584 ret
= hns3_nic_net_open(kinfo
->netdev
);
4586 set_bit(HNS3_NIC_STATE_RESETTING
, &priv
->state
);
4587 netdev_err(kinfo
->netdev
,
4588 "net up fail, ret=%d!\n", ret
);
4596 static int hns3_reset_notify_init_enet(struct hnae3_handle
*handle
)
4598 struct net_device
*netdev
= handle
->kinfo
.netdev
;
4599 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
4602 /* Carrier off reporting is important to ethtool even BEFORE open */
4603 netif_carrier_off(netdev
);
4605 ret
= hns3_get_ring_config(priv
);
4609 ret
= hns3_nic_alloc_vector_data(priv
);
4613 hns3_restore_coal(priv
);
4615 ret
= hns3_nic_init_vector_data(priv
);
4617 goto err_dealloc_vector
;
4619 ret
= hns3_init_all_ring(priv
);
4621 goto err_uninit_vector
;
4623 /* the device can work without cpu rmap, only aRFS needs it */
4624 ret
= hns3_set_rx_cpu_rmap(netdev
);
4626 dev_warn(priv
->dev
, "set rx cpu rmap fail, ret=%d\n", ret
);
4628 ret
= hns3_nic_init_irq(priv
);
4630 dev_err(priv
->dev
, "init irq failed! ret=%d\n", ret
);
4631 hns3_free_rx_cpu_rmap(netdev
);
4632 goto err_init_irq_fail
;
4635 if (!hns3_is_phys_func(handle
->pdev
))
4636 hns3_init_mac_addr(netdev
);
4638 ret
= hns3_client_start(handle
);
4640 dev_err(priv
->dev
, "hns3_client_start fail! ret=%d\n", ret
);
4641 goto err_client_start_fail
;
4644 set_bit(HNS3_NIC_STATE_INITED
, &priv
->state
);
4648 err_client_start_fail
:
4649 hns3_free_rx_cpu_rmap(netdev
);
4650 hns3_nic_uninit_irq(priv
);
4652 hns3_uninit_all_ring(priv
);
4654 hns3_nic_uninit_vector_data(priv
);
4656 hns3_nic_dealloc_vector_data(priv
);
4658 hns3_put_ring_config(priv
);
4663 static int hns3_reset_notify_uninit_enet(struct hnae3_handle
*handle
)
4665 struct net_device
*netdev
= handle
->kinfo
.netdev
;
4666 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
4669 if (!test_and_clear_bit(HNS3_NIC_STATE_INITED
, &priv
->state
)) {
4670 netdev_warn(netdev
, "already uninitialized\n");
4674 hns3_free_rx_cpu_rmap(netdev
);
4675 hns3_nic_uninit_irq(priv
);
4676 hns3_clear_all_ring(handle
, true);
4677 hns3_reset_tx_queue(priv
->ae_handle
);
4679 hns3_nic_uninit_vector_data(priv
);
4681 hns3_store_coal(priv
);
4683 hns3_nic_dealloc_vector_data(priv
);
4685 ret
= hns3_uninit_all_ring(priv
);
4687 netdev_err(netdev
, "uninit ring error\n");
4689 hns3_put_ring_config(priv
);
4694 static int hns3_reset_notify(struct hnae3_handle
*handle
,
4695 enum hnae3_reset_notify_type type
)
4700 case HNAE3_UP_CLIENT
:
4701 ret
= hns3_reset_notify_up_enet(handle
);
4703 case HNAE3_DOWN_CLIENT
:
4704 ret
= hns3_reset_notify_down_enet(handle
);
4706 case HNAE3_INIT_CLIENT
:
4707 ret
= hns3_reset_notify_init_enet(handle
);
4709 case HNAE3_UNINIT_CLIENT
:
4710 ret
= hns3_reset_notify_uninit_enet(handle
);
4719 static int hns3_change_channels(struct hnae3_handle
*handle
, u32 new_tqp_num
,
4720 bool rxfh_configured
)
4724 ret
= handle
->ae_algo
->ops
->set_channels(handle
, new_tqp_num
,
4727 dev_err(&handle
->pdev
->dev
,
4728 "Change tqp num(%u) fail.\n", new_tqp_num
);
4732 ret
= hns3_reset_notify(handle
, HNAE3_INIT_CLIENT
);
4736 ret
= hns3_reset_notify(handle
, HNAE3_UP_CLIENT
);
4738 hns3_reset_notify(handle
, HNAE3_UNINIT_CLIENT
);
4743 int hns3_set_channels(struct net_device
*netdev
,
4744 struct ethtool_channels
*ch
)
4746 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
4747 struct hnae3_knic_private_info
*kinfo
= &h
->kinfo
;
4748 bool rxfh_configured
= netif_is_rxfh_configured(netdev
);
4749 u32 new_tqp_num
= ch
->combined_count
;
4753 if (hns3_nic_resetting(netdev
))
4756 if (ch
->rx_count
|| ch
->tx_count
)
4759 if (kinfo
->tc_info
.mqprio_active
) {
4760 dev_err(&netdev
->dev
,
4761 "it's not allowed to set channels via ethtool when MQPRIO mode is on\n");
4765 if (new_tqp_num
> hns3_get_max_available_channels(h
) ||
4767 dev_err(&netdev
->dev
,
4768 "Change tqps fail, the tqp range is from 1 to %u",
4769 hns3_get_max_available_channels(h
));
4773 if (kinfo
->rss_size
== new_tqp_num
)
4776 netif_dbg(h
, drv
, netdev
,
4777 "set channels: tqp_num=%u, rxfh=%d\n",
4778 new_tqp_num
, rxfh_configured
);
4780 ret
= hns3_reset_notify(h
, HNAE3_DOWN_CLIENT
);
4784 ret
= hns3_reset_notify(h
, HNAE3_UNINIT_CLIENT
);
4788 org_tqp_num
= h
->kinfo
.num_tqps
;
4789 ret
= hns3_change_channels(h
, new_tqp_num
, rxfh_configured
);
4794 "Change channels fail, revert to old value\n");
4795 ret1
= hns3_change_channels(h
, org_tqp_num
, rxfh_configured
);
4798 "revert to old channel fail\n");
4808 static const struct hns3_hw_error_info hns3_hw_err
[] = {
4809 { .type
= HNAE3_PPU_POISON_ERROR
,
4810 .msg
= "PPU poison" },
4811 { .type
= HNAE3_CMDQ_ECC_ERROR
,
4812 .msg
= "IMP CMDQ error" },
4813 { .type
= HNAE3_IMP_RD_POISON_ERROR
,
4814 .msg
= "IMP RD poison" },
4815 { .type
= HNAE3_ROCEE_AXI_RESP_ERROR
,
4816 .msg
= "ROCEE AXI RESP error" },
4819 static void hns3_process_hw_error(struct hnae3_handle
*handle
,
4820 enum hnae3_hw_error_type type
)
4824 for (i
= 0; i
< ARRAY_SIZE(hns3_hw_err
); i
++) {
4825 if (hns3_hw_err
[i
].type
== type
) {
4826 dev_err(&handle
->pdev
->dev
, "Detected %s!\n",
4827 hns3_hw_err
[i
].msg
);
4833 static const struct hnae3_client_ops client_ops
= {
4834 .init_instance
= hns3_client_init
,
4835 .uninit_instance
= hns3_client_uninit
,
4836 .link_status_change
= hns3_link_status_change
,
4837 .setup_tc
= hns3_client_setup_tc
,
4838 .reset_notify
= hns3_reset_notify
,
4839 .process_hw_error
= hns3_process_hw_error
,
4842 /* hns3_init_module - Driver registration routine
4843 * hns3_init_module is the first routine called when the driver is
4844 * loaded. All it does is register with the PCI subsystem.
4846 static int __init
hns3_init_module(void)
4850 pr_info("%s: %s - version\n", hns3_driver_name
, hns3_driver_string
);
4851 pr_info("%s: %s\n", hns3_driver_name
, hns3_copyright
);
4853 client
.type
= HNAE3_CLIENT_KNIC
;
4854 snprintf(client
.name
, HNAE3_CLIENT_NAME_LENGTH
, "%s",
4857 client
.ops
= &client_ops
;
4859 INIT_LIST_HEAD(&client
.node
);
4861 hns3_dbg_register_debugfs(hns3_driver_name
);
4863 ret
= hnae3_register_client(&client
);
4865 goto err_reg_client
;
4867 ret
= pci_register_driver(&hns3_driver
);
4869 goto err_reg_driver
;
4874 hnae3_unregister_client(&client
);
4876 hns3_dbg_unregister_debugfs();
4879 module_init(hns3_init_module
);
4881 /* hns3_exit_module - Driver exit cleanup routine
4882 * hns3_exit_module is called just before the driver is removed
4885 static void __exit
hns3_exit_module(void)
4887 pci_unregister_driver(&hns3_driver
);
4888 hnae3_unregister_client(&client
);
4889 hns3_dbg_unregister_debugfs();
4891 module_exit(hns3_exit_module
);
4893 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
4894 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
4895 MODULE_LICENSE("GPL");
4896 MODULE_ALIAS("pci:hns-nic");