WIP FPC-III support
[linux/fpc-iii.git] / drivers / net / ethernet / hisilicon / hns3 / hns3vf / hclgevf_mbx.c
blob5b2dcd97c1078c83ab8d1bfcc7c9f2f82da27f7b
1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
4 #include "hclge_mbx.h"
5 #include "hclgevf_main.h"
6 #include "hnae3.h"
8 #define CREATE_TRACE_POINTS
9 #include "hclgevf_trace.h"
11 static int hclgevf_resp_to_errno(u16 resp_code)
13 return resp_code ? -resp_code : 0;
16 static void hclgevf_reset_mbx_resp_status(struct hclgevf_dev *hdev)
18 /* this function should be called with mbx_resp.mbx_mutex held
19 * to prtect the received_response from race condition
21 hdev->mbx_resp.received_resp = false;
22 hdev->mbx_resp.origin_mbx_msg = 0;
23 hdev->mbx_resp.resp_status = 0;
24 memset(hdev->mbx_resp.additional_info, 0, HCLGE_MBX_MAX_RESP_DATA_SIZE);
27 /* hclgevf_get_mbx_resp: used to get a response from PF after VF sends a mailbox
28 * message to PF.
29 * @hdev: pointer to struct hclgevf_dev
30 * @resp_msg: pointer to store the original message type and response status
31 * @len: the resp_msg data array length.
33 static int hclgevf_get_mbx_resp(struct hclgevf_dev *hdev, u16 code0, u16 code1,
34 u8 *resp_data, u16 resp_len)
36 #define HCLGEVF_MAX_TRY_TIMES 500
37 #define HCLGEVF_SLEEP_USECOND 1000
38 struct hclgevf_mbx_resp_status *mbx_resp;
39 u16 r_code0, r_code1;
40 int i = 0;
42 if (resp_len > HCLGE_MBX_MAX_RESP_DATA_SIZE) {
43 dev_err(&hdev->pdev->dev,
44 "VF mbx response len(=%u) exceeds maximum(=%u)\n",
45 resp_len,
46 HCLGE_MBX_MAX_RESP_DATA_SIZE);
47 return -EINVAL;
50 while ((!hdev->mbx_resp.received_resp) && (i < HCLGEVF_MAX_TRY_TIMES)) {
51 if (test_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state))
52 return -EIO;
54 usleep_range(HCLGEVF_SLEEP_USECOND, HCLGEVF_SLEEP_USECOND * 2);
55 i++;
58 if (i >= HCLGEVF_MAX_TRY_TIMES) {
59 dev_err(&hdev->pdev->dev,
60 "VF could not get mbx(%u,%u) resp(=%d) from PF in %d tries\n",
61 code0, code1, hdev->mbx_resp.received_resp, i);
62 return -EIO;
65 mbx_resp = &hdev->mbx_resp;
66 r_code0 = (u16)(mbx_resp->origin_mbx_msg >> 16);
67 r_code1 = (u16)(mbx_resp->origin_mbx_msg & 0xff);
69 if (mbx_resp->resp_status)
70 return mbx_resp->resp_status;
72 if (resp_data)
73 memcpy(resp_data, &mbx_resp->additional_info[0], resp_len);
75 hclgevf_reset_mbx_resp_status(hdev);
77 if (!(r_code0 == code0 && r_code1 == code1 && !mbx_resp->resp_status)) {
78 dev_err(&hdev->pdev->dev,
79 "VF could not match resp code(code0=%u,code1=%u), %d\n",
80 code0, code1, mbx_resp->resp_status);
81 dev_err(&hdev->pdev->dev,
82 "VF could not match resp r_code(r_code0=%u,r_code1=%u)\n",
83 r_code0, r_code1);
84 return -EIO;
87 return 0;
90 int hclgevf_send_mbx_msg(struct hclgevf_dev *hdev,
91 struct hclge_vf_to_pf_msg *send_msg, bool need_resp,
92 u8 *resp_data, u16 resp_len)
94 struct hclge_mbx_vf_to_pf_cmd *req;
95 struct hclgevf_desc desc;
96 int status;
98 req = (struct hclge_mbx_vf_to_pf_cmd *)desc.data;
100 if (!send_msg) {
101 dev_err(&hdev->pdev->dev,
102 "failed to send mbx, msg is NULL\n");
103 return -EINVAL;
106 hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_VF_TO_PF, false);
107 if (need_resp)
108 hnae3_set_bit(req->mbx_need_resp, HCLGE_MBX_NEED_RESP_B, 1);
110 memcpy(&req->msg, send_msg, sizeof(struct hclge_vf_to_pf_msg));
112 trace_hclge_vf_mbx_send(hdev, req);
114 /* synchronous send */
115 if (need_resp) {
116 mutex_lock(&hdev->mbx_resp.mbx_mutex);
117 hclgevf_reset_mbx_resp_status(hdev);
118 status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
119 if (status) {
120 dev_err(&hdev->pdev->dev,
121 "VF failed(=%d) to send mbx message to PF\n",
122 status);
123 mutex_unlock(&hdev->mbx_resp.mbx_mutex);
124 return status;
127 status = hclgevf_get_mbx_resp(hdev, send_msg->code,
128 send_msg->subcode, resp_data,
129 resp_len);
130 mutex_unlock(&hdev->mbx_resp.mbx_mutex);
131 } else {
132 /* asynchronous send */
133 status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
134 if (status) {
135 dev_err(&hdev->pdev->dev,
136 "VF failed(=%d) to send mbx message to PF\n",
137 status);
138 return status;
142 return status;
145 static bool hclgevf_cmd_crq_empty(struct hclgevf_hw *hw)
147 u32 tail = hclgevf_read_dev(hw, HCLGEVF_NIC_CRQ_TAIL_REG);
149 return tail == hw->cmq.crq.next_to_use;
152 void hclgevf_mbx_handler(struct hclgevf_dev *hdev)
154 struct hclgevf_mbx_resp_status *resp;
155 struct hclge_mbx_pf_to_vf_cmd *req;
156 struct hclgevf_cmq_ring *crq;
157 struct hclgevf_desc *desc;
158 u16 *msg_q;
159 u16 flag;
160 u8 *temp;
161 int i;
163 resp = &hdev->mbx_resp;
164 crq = &hdev->hw.cmq.crq;
166 while (!hclgevf_cmd_crq_empty(&hdev->hw)) {
167 if (test_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state)) {
168 dev_info(&hdev->pdev->dev, "vf crq need init\n");
169 return;
172 desc = &crq->desc[crq->next_to_use];
173 req = (struct hclge_mbx_pf_to_vf_cmd *)desc->data;
175 flag = le16_to_cpu(crq->desc[crq->next_to_use].flag);
176 if (unlikely(!hnae3_get_bit(flag, HCLGEVF_CMDQ_RX_OUTVLD_B))) {
177 dev_warn(&hdev->pdev->dev,
178 "dropped invalid mailbox message, code = %u\n",
179 req->msg.code);
181 /* dropping/not processing this invalid message */
182 crq->desc[crq->next_to_use].flag = 0;
183 hclge_mbx_ring_ptr_move_crq(crq);
184 continue;
187 trace_hclge_vf_mbx_get(hdev, req);
189 /* synchronous messages are time critical and need preferential
190 * treatment. Therefore, we need to acknowledge all the sync
191 * responses as quickly as possible so that waiting tasks do not
192 * timeout and simultaneously queue the async messages for later
193 * prcessing in context of mailbox task i.e. the slow path.
195 switch (req->msg.code) {
196 case HCLGE_MBX_PF_VF_RESP:
197 if (resp->received_resp)
198 dev_warn(&hdev->pdev->dev,
199 "VF mbx resp flag not clear(%u)\n",
200 req->msg.vf_mbx_msg_code);
201 resp->received_resp = true;
203 resp->origin_mbx_msg =
204 (req->msg.vf_mbx_msg_code << 16);
205 resp->origin_mbx_msg |= req->msg.vf_mbx_msg_subcode;
206 resp->resp_status =
207 hclgevf_resp_to_errno(req->msg.resp_status);
209 temp = (u8 *)req->msg.resp_data;
210 for (i = 0; i < HCLGE_MBX_MAX_RESP_DATA_SIZE; i++) {
211 resp->additional_info[i] = *temp;
212 temp++;
214 break;
215 case HCLGE_MBX_LINK_STAT_CHANGE:
216 case HCLGE_MBX_ASSERTING_RESET:
217 case HCLGE_MBX_LINK_STAT_MODE:
218 case HCLGE_MBX_PUSH_VLAN_INFO:
219 case HCLGE_MBX_PUSH_PROMISC_INFO:
220 /* set this mbx event as pending. This is required as we
221 * might loose interrupt event when mbx task is busy
222 * handling. This shall be cleared when mbx task just
223 * enters handling state.
225 hdev->mbx_event_pending = true;
227 /* we will drop the async msg if we find ARQ as full
228 * and continue with next message
230 if (atomic_read(&hdev->arq.count) >=
231 HCLGE_MBX_MAX_ARQ_MSG_NUM) {
232 dev_warn(&hdev->pdev->dev,
233 "Async Q full, dropping msg(%u)\n",
234 req->msg.code);
235 break;
238 /* tail the async message in arq */
239 msg_q = hdev->arq.msg_q[hdev->arq.tail];
240 memcpy(&msg_q[0], &req->msg,
241 HCLGE_MBX_MAX_ARQ_MSG_SIZE * sizeof(u16));
242 hclge_mbx_tail_ptr_move_arq(hdev->arq);
243 atomic_inc(&hdev->arq.count);
245 hclgevf_mbx_task_schedule(hdev);
247 break;
248 default:
249 dev_err(&hdev->pdev->dev,
250 "VF received unsupported(%u) mbx msg from PF\n",
251 req->msg.code);
252 break;
254 crq->desc[crq->next_to_use].flag = 0;
255 hclge_mbx_ring_ptr_move_crq(crq);
258 /* Write back CMDQ_RQ header pointer, M7 need this pointer */
259 hclgevf_write_dev(&hdev->hw, HCLGEVF_NIC_CRQ_HEAD_REG,
260 crq->next_to_use);
263 static void hclgevf_parse_promisc_info(struct hclgevf_dev *hdev,
264 u16 promisc_info)
266 if (!promisc_info)
267 dev_info(&hdev->pdev->dev,
268 "Promisc mode is closed by host for being untrusted.\n");
271 void hclgevf_mbx_async_handler(struct hclgevf_dev *hdev)
273 enum hnae3_reset_type reset_type;
274 u16 link_status, state;
275 u16 *msg_q, *vlan_info;
276 u8 duplex;
277 u32 speed;
278 u32 tail;
279 u8 idx;
281 /* we can safely clear it now as we are at start of the async message
282 * processing
284 hdev->mbx_event_pending = false;
286 tail = hdev->arq.tail;
288 /* process all the async queue messages */
289 while (tail != hdev->arq.head) {
290 if (test_bit(HCLGEVF_STATE_CMD_DISABLE, &hdev->state)) {
291 dev_info(&hdev->pdev->dev,
292 "vf crq need init in async\n");
293 return;
296 msg_q = hdev->arq.msg_q[hdev->arq.head];
298 switch (msg_q[0]) {
299 case HCLGE_MBX_LINK_STAT_CHANGE:
300 link_status = msg_q[1];
301 memcpy(&speed, &msg_q[2], sizeof(speed));
302 duplex = (u8)msg_q[4];
304 /* update upper layer with new link link status */
305 hclgevf_update_link_status(hdev, link_status);
306 hclgevf_update_speed_duplex(hdev, speed, duplex);
308 break;
309 case HCLGE_MBX_LINK_STAT_MODE:
310 idx = (u8)msg_q[1];
311 if (idx)
312 memcpy(&hdev->hw.mac.supported, &msg_q[2],
313 sizeof(unsigned long));
314 else
315 memcpy(&hdev->hw.mac.advertising, &msg_q[2],
316 sizeof(unsigned long));
317 break;
318 case HCLGE_MBX_ASSERTING_RESET:
319 /* PF has asserted reset hence VF should go in pending
320 * state and poll for the hardware reset status till it
321 * has been completely reset. After this stack should
322 * eventually be re-initialized.
324 reset_type = (enum hnae3_reset_type)msg_q[1];
325 set_bit(reset_type, &hdev->reset_pending);
326 set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state);
327 hclgevf_reset_task_schedule(hdev);
329 break;
330 case HCLGE_MBX_PUSH_VLAN_INFO:
331 state = msg_q[1];
332 vlan_info = &msg_q[1];
333 hclgevf_update_port_base_vlan_info(hdev, state,
334 (u8 *)vlan_info, 8);
335 break;
336 case HCLGE_MBX_PUSH_PROMISC_INFO:
337 hclgevf_parse_promisc_info(hdev, msg_q[1]);
338 break;
339 default:
340 dev_err(&hdev->pdev->dev,
341 "fetched unsupported(%u) message from arq\n",
342 msg_q[0]);
343 break;
346 hclge_mbx_head_ptr_move_arq(hdev->arq);
347 atomic_dec(&hdev->arq.count);
348 msg_q = hdev->arq.msg_q[hdev->arq.head];