1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2019, Intel Corporation. */
8 ice_acquire_nvm(struct ice_hw
*hw
, enum ice_aq_res_access_type access
);
9 void ice_release_nvm(struct ice_hw
*hw
);
11 ice_read_flat_nvm(struct ice_hw
*hw
, u32 offset
, u32
*length
, u8
*data
,
12 bool read_shadow_ram
);
14 ice_get_pfa_module_tlv(struct ice_hw
*hw
, u16
*module_tlv
, u16
*module_tlv_len
,
17 ice_read_pba_string(struct ice_hw
*hw
, u8
*pba_num
, u32 pba_num_size
);
18 enum ice_status
ice_init_nvm(struct ice_hw
*hw
);
19 enum ice_status
ice_read_sr_word(struct ice_hw
*hw
, u16 offset
, u16
*data
);
21 ice_aq_update_nvm(struct ice_hw
*hw
, u16 module_typeid
, u32 offset
,
22 u16 length
, void *data
, bool last_command
, u8 command_flags
,
23 struct ice_sq_cd
*cd
);
25 ice_aq_erase_nvm(struct ice_hw
*hw
, u16 module_typeid
, struct ice_sq_cd
*cd
);
26 enum ice_status
ice_nvm_validate_checksum(struct ice_hw
*hw
);
27 enum ice_status
ice_nvm_write_activate(struct ice_hw
*hw
, u8 cmd_flags
);
28 enum ice_status
ice_aq_nvm_update_empr(struct ice_hw
*hw
);
30 ice_nvm_set_pkg_data(struct ice_hw
*hw
, bool del_pkg_data_flag
, u8
*data
,
31 u16 length
, struct ice_sq_cd
*cd
);
33 ice_nvm_pass_component_tbl(struct ice_hw
*hw
, u8
*data
, u16 length
,
34 u8 transfer_flag
, u8
*comp_response
,
35 u8
*comp_response_code
, struct ice_sq_cd
*cd
);
36 #endif /* _ICE_NVM_H_ */