WIP FPC-III support
[linux/fpc-iii.git] / drivers / net / ethernet / intel / igbvf / vf.c
blobb8ba3f94c363229b230d3c8dbe1a882149e6e265
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009 - 2018 Intel Corporation. */
4 #include "vf.h"
6 static s32 e1000_check_for_link_vf(struct e1000_hw *hw);
7 static s32 e1000_get_link_up_info_vf(struct e1000_hw *hw, u16 *speed,
8 u16 *duplex);
9 static s32 e1000_init_hw_vf(struct e1000_hw *hw);
10 static s32 e1000_reset_hw_vf(struct e1000_hw *hw);
12 static void e1000_update_mc_addr_list_vf(struct e1000_hw *hw, u8 *,
13 u32, u32, u32);
14 static void e1000_rar_set_vf(struct e1000_hw *, u8 *, u32);
15 static s32 e1000_read_mac_addr_vf(struct e1000_hw *);
16 static s32 e1000_set_uc_addr_vf(struct e1000_hw *hw, u32 subcmd, u8 *addr);
17 static s32 e1000_set_vfta_vf(struct e1000_hw *, u16, bool);
19 /**
20 * e1000_init_mac_params_vf - Inits MAC params
21 * @hw: pointer to the HW structure
22 **/
23 static s32 e1000_init_mac_params_vf(struct e1000_hw *hw)
25 struct e1000_mac_info *mac = &hw->mac;
27 /* VF's have no MTA Registers - PF feature only */
28 mac->mta_reg_count = 128;
29 /* VF's have no access to RAR entries */
30 mac->rar_entry_count = 1;
32 /* Function pointers */
33 /* reset */
34 mac->ops.reset_hw = e1000_reset_hw_vf;
35 /* hw initialization */
36 mac->ops.init_hw = e1000_init_hw_vf;
37 /* check for link */
38 mac->ops.check_for_link = e1000_check_for_link_vf;
39 /* link info */
40 mac->ops.get_link_up_info = e1000_get_link_up_info_vf;
41 /* multicast address update */
42 mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_vf;
43 /* set mac address */
44 mac->ops.rar_set = e1000_rar_set_vf;
45 /* read mac address */
46 mac->ops.read_mac_addr = e1000_read_mac_addr_vf;
47 /* set mac filter */
48 mac->ops.set_uc_addr = e1000_set_uc_addr_vf;
49 /* set vlan filter table array */
50 mac->ops.set_vfta = e1000_set_vfta_vf;
52 return E1000_SUCCESS;
55 /**
56 * e1000_init_function_pointers_vf - Inits function pointers
57 * @hw: pointer to the HW structure
58 **/
59 void e1000_init_function_pointers_vf(struct e1000_hw *hw)
61 hw->mac.ops.init_params = e1000_init_mac_params_vf;
62 hw->mbx.ops.init_params = e1000_init_mbx_params_vf;
65 /**
66 * e1000_get_link_up_info_vf - Gets link info.
67 * @hw: pointer to the HW structure
68 * @speed: pointer to 16 bit value to store link speed.
69 * @duplex: pointer to 16 bit value to store duplex.
71 * Since we cannot read the PHY and get accurate link info, we must rely upon
72 * the status register's data which is often stale and inaccurate.
73 **/
74 static s32 e1000_get_link_up_info_vf(struct e1000_hw *hw, u16 *speed,
75 u16 *duplex)
77 s32 status;
79 status = er32(STATUS);
80 if (status & E1000_STATUS_SPEED_1000)
81 *speed = SPEED_1000;
82 else if (status & E1000_STATUS_SPEED_100)
83 *speed = SPEED_100;
84 else
85 *speed = SPEED_10;
87 if (status & E1000_STATUS_FD)
88 *duplex = FULL_DUPLEX;
89 else
90 *duplex = HALF_DUPLEX;
92 return E1000_SUCCESS;
95 /**
96 * e1000_reset_hw_vf - Resets the HW
97 * @hw: pointer to the HW structure
99 * VF's provide a function level reset. This is done using bit 26 of ctrl_reg.
100 * This is all the reset we can perform on a VF.
102 static s32 e1000_reset_hw_vf(struct e1000_hw *hw)
104 struct e1000_mbx_info *mbx = &hw->mbx;
105 u32 timeout = E1000_VF_INIT_TIMEOUT;
106 u32 ret_val = -E1000_ERR_MAC_INIT;
107 u32 msgbuf[3];
108 u8 *addr = (u8 *)(&msgbuf[1]);
109 u32 ctrl;
111 /* assert VF queue/interrupt reset */
112 ctrl = er32(CTRL);
113 ew32(CTRL, ctrl | E1000_CTRL_RST);
115 /* we cannot initialize while the RSTI / RSTD bits are asserted */
116 while (!mbx->ops.check_for_rst(hw) && timeout) {
117 timeout--;
118 udelay(5);
121 if (timeout) {
122 /* mailbox timeout can now become active */
123 mbx->timeout = E1000_VF_MBX_INIT_TIMEOUT;
125 /* notify PF of VF reset completion */
126 msgbuf[0] = E1000_VF_RESET;
127 mbx->ops.write_posted(hw, msgbuf, 1);
129 mdelay(10);
131 /* set our "perm_addr" based on info provided by PF */
132 ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
133 if (!ret_val) {
134 if (msgbuf[0] == (E1000_VF_RESET |
135 E1000_VT_MSGTYPE_ACK))
136 memcpy(hw->mac.perm_addr, addr, ETH_ALEN);
137 else
138 ret_val = -E1000_ERR_MAC_INIT;
142 return ret_val;
146 * e1000_init_hw_vf - Inits the HW
147 * @hw: pointer to the HW structure
149 * Not much to do here except clear the PF Reset indication if there is one.
151 static s32 e1000_init_hw_vf(struct e1000_hw *hw)
153 /* attempt to set and restore our mac address */
154 e1000_rar_set_vf(hw, hw->mac.addr, 0);
156 return E1000_SUCCESS;
160 * e1000_hash_mc_addr_vf - Generate a multicast hash value
161 * @hw: pointer to the HW structure
162 * @mc_addr: pointer to a multicast address
164 * Generates a multicast address hash value which is used to determine
165 * the multicast filter table array address and new table value. See
166 * e1000_mta_set_generic()
168 static u32 e1000_hash_mc_addr_vf(struct e1000_hw *hw, u8 *mc_addr)
170 u32 hash_value, hash_mask;
171 u8 bit_shift = 0;
173 /* Register count multiplied by bits per register */
174 hash_mask = (hw->mac.mta_reg_count * 32) - 1;
176 /* The bit_shift is the number of left-shifts
177 * where 0xFF would still fall within the hash mask.
179 while (hash_mask >> bit_shift != 0xFF)
180 bit_shift++;
182 hash_value = hash_mask & (((mc_addr[4] >> (8 - bit_shift)) |
183 (((u16)mc_addr[5]) << bit_shift)));
185 return hash_value;
189 * e1000_update_mc_addr_list_vf - Update Multicast addresses
190 * @hw: pointer to the HW structure
191 * @mc_addr_list: array of multicast addresses to program
192 * @mc_addr_count: number of multicast addresses to program
193 * @rar_used_count: the first RAR register free to program
194 * @rar_count: total number of supported Receive Address Registers
196 * Updates the Receive Address Registers and Multicast Table Array.
197 * The caller must have a packed mc_addr_list of multicast addresses.
198 * The parameter rar_count will usually be hw->mac.rar_entry_count
199 * unless there are workarounds that change this.
201 static void e1000_update_mc_addr_list_vf(struct e1000_hw *hw,
202 u8 *mc_addr_list, u32 mc_addr_count,
203 u32 rar_used_count, u32 rar_count)
205 struct e1000_mbx_info *mbx = &hw->mbx;
206 u32 msgbuf[E1000_VFMAILBOX_SIZE];
207 u16 *hash_list = (u16 *)&msgbuf[1];
208 u32 hash_value;
209 u32 cnt, i;
210 s32 ret_val;
212 /* Each entry in the list uses 1 16 bit word. We have 30
213 * 16 bit words available in our HW msg buffer (minus 1 for the
214 * msg type). That's 30 hash values if we pack 'em right. If
215 * there are more than 30 MC addresses to add then punt the
216 * extras for now and then add code to handle more than 30 later.
217 * It would be unusual for a server to request that many multi-cast
218 * addresses except for in large enterprise network environments.
221 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
222 msgbuf[0] = E1000_VF_SET_MULTICAST;
223 msgbuf[0] |= cnt << E1000_VT_MSGINFO_SHIFT;
225 for (i = 0; i < cnt; i++) {
226 hash_value = e1000_hash_mc_addr_vf(hw, mc_addr_list);
227 hash_list[i] = hash_value & 0x0FFFF;
228 mc_addr_list += ETH_ALEN;
231 ret_val = mbx->ops.write_posted(hw, msgbuf, E1000_VFMAILBOX_SIZE);
232 if (!ret_val)
233 mbx->ops.read_posted(hw, msgbuf, 1);
237 * e1000_set_vfta_vf - Set/Unset vlan filter table address
238 * @hw: pointer to the HW structure
239 * @vid: determines the vfta register and bit to set/unset
240 * @set: if true then set bit, else clear bit
242 static s32 e1000_set_vfta_vf(struct e1000_hw *hw, u16 vid, bool set)
244 struct e1000_mbx_info *mbx = &hw->mbx;
245 u32 msgbuf[2];
246 s32 err;
248 msgbuf[0] = E1000_VF_SET_VLAN;
249 msgbuf[1] = vid;
250 /* Setting the 8 bit field MSG INFO to true indicates "add" */
251 if (set)
252 msgbuf[0] |= BIT(E1000_VT_MSGINFO_SHIFT);
254 mbx->ops.write_posted(hw, msgbuf, 2);
256 err = mbx->ops.read_posted(hw, msgbuf, 2);
258 msgbuf[0] &= ~E1000_VT_MSGTYPE_CTS;
260 /* if nacked the vlan was rejected */
261 if (!err && (msgbuf[0] == (E1000_VF_SET_VLAN | E1000_VT_MSGTYPE_NACK)))
262 err = -E1000_ERR_MAC_INIT;
264 return err;
268 * e1000_rlpml_set_vf - Set the maximum receive packet length
269 * @hw: pointer to the HW structure
270 * @max_size: value to assign to max frame size
272 void e1000_rlpml_set_vf(struct e1000_hw *hw, u16 max_size)
274 struct e1000_mbx_info *mbx = &hw->mbx;
275 u32 msgbuf[2];
276 s32 ret_val;
278 msgbuf[0] = E1000_VF_SET_LPE;
279 msgbuf[1] = max_size;
281 ret_val = mbx->ops.write_posted(hw, msgbuf, 2);
282 if (!ret_val)
283 mbx->ops.read_posted(hw, msgbuf, 1);
287 * e1000_rar_set_vf - set device MAC address
288 * @hw: pointer to the HW structure
289 * @addr: pointer to the receive address
290 * @index: receive address array register
292 static void e1000_rar_set_vf(struct e1000_hw *hw, u8 *addr, u32 index)
294 struct e1000_mbx_info *mbx = &hw->mbx;
295 u32 msgbuf[3];
296 u8 *msg_addr = (u8 *)(&msgbuf[1]);
297 s32 ret_val;
299 memset(msgbuf, 0, 12);
300 msgbuf[0] = E1000_VF_SET_MAC_ADDR;
301 memcpy(msg_addr, addr, ETH_ALEN);
302 ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
304 if (!ret_val)
305 ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
307 msgbuf[0] &= ~E1000_VT_MSGTYPE_CTS;
309 /* if nacked the address was rejected, use "perm_addr" */
310 if (!ret_val &&
311 (msgbuf[0] == (E1000_VF_SET_MAC_ADDR | E1000_VT_MSGTYPE_NACK)))
312 e1000_read_mac_addr_vf(hw);
316 * e1000_read_mac_addr_vf - Read device MAC address
317 * @hw: pointer to the HW structure
319 static s32 e1000_read_mac_addr_vf(struct e1000_hw *hw)
321 memcpy(hw->mac.addr, hw->mac.perm_addr, ETH_ALEN);
323 return E1000_SUCCESS;
327 * e1000_set_uc_addr_vf - Set or clear unicast filters
328 * @hw: pointer to the HW structure
329 * @sub_cmd: add or clear filters
330 * @addr: pointer to the filter MAC address
332 static s32 e1000_set_uc_addr_vf(struct e1000_hw *hw, u32 sub_cmd, u8 *addr)
334 struct e1000_mbx_info *mbx = &hw->mbx;
335 u32 msgbuf[3], msgbuf_chk;
336 u8 *msg_addr = (u8 *)(&msgbuf[1]);
337 s32 ret_val;
339 memset(msgbuf, 0, sizeof(msgbuf));
340 msgbuf[0] |= sub_cmd;
341 msgbuf[0] |= E1000_VF_SET_MAC_ADDR;
342 msgbuf_chk = msgbuf[0];
344 if (addr)
345 memcpy(msg_addr, addr, ETH_ALEN);
347 ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
349 if (!ret_val)
350 ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
352 msgbuf[0] &= ~E1000_VT_MSGTYPE_CTS;
354 if (!ret_val) {
355 msgbuf[0] &= ~E1000_VT_MSGTYPE_CTS;
357 if (msgbuf[0] == (msgbuf_chk | E1000_VT_MSGTYPE_NACK))
358 return -ENOSPC;
361 return ret_val;
365 * e1000_check_for_link_vf - Check for link for a virtual interface
366 * @hw: pointer to the HW structure
368 * Checks to see if the underlying PF is still talking to the VF and
369 * if it is then it reports the link state to the hardware, otherwise
370 * it reports link down and returns an error.
372 static s32 e1000_check_for_link_vf(struct e1000_hw *hw)
374 struct e1000_mbx_info *mbx = &hw->mbx;
375 struct e1000_mac_info *mac = &hw->mac;
376 s32 ret_val = E1000_SUCCESS;
377 u32 in_msg = 0;
379 /* We only want to run this if there has been a rst asserted.
380 * in this case that could mean a link change, device reset,
381 * or a virtual function reset
384 /* If we were hit with a reset or timeout drop the link */
385 if (!mbx->ops.check_for_rst(hw) || !mbx->timeout)
386 mac->get_link_status = true;
388 if (!mac->get_link_status)
389 goto out;
391 /* if link status is down no point in checking to see if PF is up */
392 if (!(er32(STATUS) & E1000_STATUS_LU))
393 goto out;
395 /* if the read failed it could just be a mailbox collision, best wait
396 * until we are called again and don't report an error
398 if (mbx->ops.read(hw, &in_msg, 1))
399 goto out;
401 /* if incoming message isn't clear to send we are waiting on response */
402 if (!(in_msg & E1000_VT_MSGTYPE_CTS)) {
403 /* msg is not CTS and is NACK we must have lost CTS status */
404 if (in_msg & E1000_VT_MSGTYPE_NACK)
405 ret_val = -E1000_ERR_MAC_INIT;
406 goto out;
409 /* the PF is talking, if we timed out in the past we reinit */
410 if (!mbx->timeout) {
411 ret_val = -E1000_ERR_MAC_INIT;
412 goto out;
415 /* if we passed all the tests above then the link is up and we no
416 * longer need to check for link
418 mac->get_link_status = false;
420 out:
421 return ret_val;