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WIP FPC-III support
[linux/fpc-iii.git] / drivers / net / ethernet / mellanox / mlxsw / core.c
blob685037e052af2d6a8255e28ef7f4f8740c0a6352
1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
3
4 #include <linux/kernel.h>
5 #include <linux/module.h>
6 #include <linux/device.h>
7 #include <linux/export.h>
8 #include <linux/err.h>
9 #include <linux/if_link.h>
10 #include <linux/netdevice.h>
11 #include <linux/completion.h>
12 #include <linux/skbuff.h>
13 #include <linux/etherdevice.h>
14 #include <linux/types.h>
15 #include <linux/string.h>
16 #include <linux/gfp.h>
17 #include <linux/random.h>
18 #include <linux/jiffies.h>
19 #include <linux/mutex.h>
20 #include <linux/rcupdate.h>
21 #include <linux/slab.h>
22 #include <linux/workqueue.h>
23 #include <linux/firmware.h>
24 #include <asm/byteorder.h>
25 #include <net/devlink.h>
26 #include <trace/events/devlink.h>
27
28 #include "core.h"
29 #include "core_env.h"
30 #include "item.h"
31 #include "cmd.h"
32 #include "port.h"
33 #include "trap.h"
34 #include "emad.h"
35 #include "reg.h"
36 #include "resources.h"
37 #include "../mlxfw/mlxfw.h"
38
39 static LIST_HEAD(mlxsw_core_driver_list);
40 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);
41
42 static const char mlxsw_core_driver_name[] = "mlxsw_core";
43
44 static struct workqueue_struct *mlxsw_wq;
45 static struct workqueue_struct *mlxsw_owq;
46
47 struct mlxsw_core_port {
48 struct devlink_port devlink_port;
49 void *port_driver_priv;
50 u8 local_port;
51 };
52
53 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port)
54 {
55 return mlxsw_core_port->port_driver_priv;
56 }
57 EXPORT_SYMBOL(mlxsw_core_port_driver_priv);
58
59 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port)
60 {
61 return mlxsw_core_port->port_driver_priv != NULL;
62 }
63
64 struct mlxsw_core {
65 struct mlxsw_driver *driver;
66 const struct mlxsw_bus *bus;
67 void *bus_priv;
68 const struct mlxsw_bus_info *bus_info;
69 struct workqueue_struct *emad_wq;
70 struct list_head rx_listener_list;
71 struct list_head event_listener_list;
72 struct {
73 atomic64_t tid;
74 struct list_head trans_list;
75 spinlock_t trans_list_lock; /* protects trans_list writes */
76 bool use_emad;
77 bool enable_string_tlv;
78 } emad;
79 struct {
80 u8 *mapping; /* lag_id+port_index to local_port mapping */
81 } lag;
82 struct mlxsw_res res;
83 struct mlxsw_hwmon *hwmon;
84 struct mlxsw_thermal *thermal;
85 struct mlxsw_core_port *ports;
86 unsigned int max_ports;
87 bool fw_flash_in_progress;
88 struct {
89 struct devlink_health_reporter *fw_fatal;
90 } health;
91 struct mlxsw_env *env;
92 bool is_initialized; /* Denotes if core was already initialized. */
93 unsigned long driver_priv[];
94 /* driver_priv has to be always the last item */
95 };
96
97 #define MLXSW_PORT_MAX_PORTS_DEFAULT 0x40
98
99 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core)
100 {
101 /* Switch ports are numbered from 1 to queried value */
102 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT))
103 mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core,
104 MAX_SYSTEM_PORT) + 1;
105 else
106 mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1;
107
108 mlxsw_core->ports = kcalloc(mlxsw_core->max_ports,
109 sizeof(struct mlxsw_core_port), GFP_KERNEL);
110 if (!mlxsw_core->ports)
111 return -ENOMEM;
112
113 return 0;
114 }
115
116 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core)
117 {
118 kfree(mlxsw_core->ports);
119 }
120
121 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core)
122 {
123 return mlxsw_core->max_ports;
124 }
125 EXPORT_SYMBOL(mlxsw_core_max_ports);
126
127 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core)
128 {
129 return mlxsw_core->driver_priv;
130 }
131 EXPORT_SYMBOL(mlxsw_core_driver_priv);
132
133 bool mlxsw_core_res_query_enabled(const struct mlxsw_core *mlxsw_core)
134 {
135 return mlxsw_core->driver->res_query_enabled;
136 }
137 EXPORT_SYMBOL(mlxsw_core_res_query_enabled);
138
139 bool mlxsw_core_temp_warn_enabled(const struct mlxsw_core *mlxsw_core)
140 {
141 return mlxsw_core->driver->temp_warn_enabled;
142 }
143
144 bool
145 mlxsw_core_fw_rev_minor_subminor_validate(const struct mlxsw_fw_rev *rev,
146 const struct mlxsw_fw_rev *req_rev)
147 {
148 return rev->minor > req_rev->minor ||
149 (rev->minor == req_rev->minor &&
150 rev->subminor >= req_rev->subminor);
151 }
152 EXPORT_SYMBOL(mlxsw_core_fw_rev_minor_subminor_validate);
153
154 struct mlxsw_rx_listener_item {
155 struct list_head list;
156 struct mlxsw_rx_listener rxl;
157 void *priv;
158 bool enabled;
159 };
160
161 struct mlxsw_event_listener_item {
162 struct list_head list;
163 struct mlxsw_core *mlxsw_core;
164 struct mlxsw_event_listener el;
165 void *priv;
166 };
167
168 /******************
169 * EMAD processing
170 ******************/
171
172 /* emad_eth_hdr_dmac
173 * Destination MAC in EMAD's Ethernet header.
174 * Must be set to 01:02:c9:00:00:01
175 */
176 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6);
177
178 /* emad_eth_hdr_smac
179 * Source MAC in EMAD's Ethernet header.
180 * Must be set to 00:02:c9:01:02:03
181 */
182 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6);
183
184 /* emad_eth_hdr_ethertype
185 * Ethertype in EMAD's Ethernet header.
186 * Must be set to 0x8932
187 */
188 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16);
189
190 /* emad_eth_hdr_mlx_proto
191 * Mellanox protocol.
192 * Must be set to 0x0.
193 */
194 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8);
195
196 /* emad_eth_hdr_ver
197 * Mellanox protocol version.
198 * Must be set to 0x0.
199 */
200 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4);
201
202 /* emad_op_tlv_type
203 * Type of the TLV.
204 * Must be set to 0x1 (operation TLV).
205 */
206 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5);
207
208 /* emad_op_tlv_len
209 * Length of the operation TLV in u32.
210 * Must be set to 0x4.
211 */
212 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11);
213
214 /* emad_op_tlv_dr
215 * Direct route bit. Setting to 1 indicates the EMAD is a direct route
216 * EMAD. DR TLV must follow.
217 *
218 * Note: Currently not supported and must not be set.
219 */
220 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1);
221
222 /* emad_op_tlv_status
223 * Returned status in case of EMAD response. Must be set to 0 in case
224 * of EMAD request.
225 * 0x0 - success
226 * 0x1 - device is busy. Requester should retry
227 * 0x2 - Mellanox protocol version not supported
228 * 0x3 - unknown TLV
229 * 0x4 - register not supported
230 * 0x5 - operation class not supported
231 * 0x6 - EMAD method not supported
232 * 0x7 - bad parameter (e.g. port out of range)
233 * 0x8 - resource not available
234 * 0x9 - message receipt acknowledgment. Requester should retry
235 * 0x70 - internal error
236 */
237 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7);
238
239 /* emad_op_tlv_register_id
240 * Register ID of register within register TLV.
241 */
242 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16);
243
244 /* emad_op_tlv_r
245 * Response bit. Setting to 1 indicates Response, otherwise request.
246 */
247 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1);
248
249 /* emad_op_tlv_method
250 * EMAD method type.
251 * 0x1 - query
252 * 0x2 - write
253 * 0x3 - send (currently not supported)
254 * 0x4 - event
255 */
256 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7);
257
258 /* emad_op_tlv_class
259 * EMAD operation class. Must be set to 0x1 (REG_ACCESS).
260 */
261 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8);
262
263 /* emad_op_tlv_tid
264 * EMAD transaction ID. Used for pairing request and response EMADs.
265 */
266 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64);
267
268 /* emad_string_tlv_type
269 * Type of the TLV.
270 * Must be set to 0x2 (string TLV).
271 */
272 MLXSW_ITEM32(emad, string_tlv, type, 0x00, 27, 5);
273
274 /* emad_string_tlv_len
275 * Length of the string TLV in u32.
276 */
277 MLXSW_ITEM32(emad, string_tlv, len, 0x00, 16, 11);
278
279 #define MLXSW_EMAD_STRING_TLV_STRING_LEN 128
280
281 /* emad_string_tlv_string
282 * String provided by the device's firmware in case of erroneous register access
283 */
284 MLXSW_ITEM_BUF(emad, string_tlv, string, 0x04,
285 MLXSW_EMAD_STRING_TLV_STRING_LEN);
286
287 /* emad_reg_tlv_type
288 * Type of the TLV.
289 * Must be set to 0x3 (register TLV).
290 */
291 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5);
292
293 /* emad_reg_tlv_len
294 * Length of the operation TLV in u32.
295 */
296 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11);
297
298 /* emad_end_tlv_type
299 * Type of the TLV.
300 * Must be set to 0x0 (end TLV).
301 */
302 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5);
303
304 /* emad_end_tlv_len
305 * Length of the end TLV in u32.
306 * Must be set to 1.
307 */
308 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11);
309
310 enum mlxsw_core_reg_access_type {
311 MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
312 MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
313 };
314
315 static inline const char *
316 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)
317 {
318 switch (type) {
319 case MLXSW_CORE_REG_ACCESS_TYPE_QUERY:
320 return "query";
321 case MLXSW_CORE_REG_ACCESS_TYPE_WRITE:
322 return "write";
323 }
324 BUG();
325 }
326
327 static void mlxsw_emad_pack_end_tlv(char *end_tlv)
328 {
329 mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END);
330 mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN);
331 }
332
333 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv,
334 const struct mlxsw_reg_info *reg,
335 char *payload)
336 {
337 mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG);
338 mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1);
339 memcpy(reg_tlv + sizeof(u32), payload, reg->len);
340 }
341
342 static void mlxsw_emad_pack_string_tlv(char *string_tlv)
343 {
344 mlxsw_emad_string_tlv_type_set(string_tlv, MLXSW_EMAD_TLV_TYPE_STRING);
345 mlxsw_emad_string_tlv_len_set(string_tlv, MLXSW_EMAD_STRING_TLV_LEN);
346 }
347
348 static void mlxsw_emad_pack_op_tlv(char *op_tlv,
349 const struct mlxsw_reg_info *reg,
350 enum mlxsw_core_reg_access_type type,
351 u64 tid)
352 {
353 mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP);
354 mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN);
355 mlxsw_emad_op_tlv_dr_set(op_tlv, 0);
356 mlxsw_emad_op_tlv_status_set(op_tlv, 0);
357 mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id);
358 mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST);
359 if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY)
360 mlxsw_emad_op_tlv_method_set(op_tlv,
361 MLXSW_EMAD_OP_TLV_METHOD_QUERY);
362 else
363 mlxsw_emad_op_tlv_method_set(op_tlv,
364 MLXSW_EMAD_OP_TLV_METHOD_WRITE);
365 mlxsw_emad_op_tlv_class_set(op_tlv,
366 MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS);
367 mlxsw_emad_op_tlv_tid_set(op_tlv, tid);
368 }
369
370 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb)
371 {
372 char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN);
373
374 mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC);
375 mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC);
376 mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE);
377 mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO);
378 mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION);
379
380 skb_reset_mac_header(skb);
381
382 return 0;
383 }
384
385 static void mlxsw_emad_construct(struct sk_buff *skb,
386 const struct mlxsw_reg_info *reg,
387 char *payload,
388 enum mlxsw_core_reg_access_type type,
389 u64 tid, bool enable_string_tlv)
390 {
391 char *buf;
392
393 buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32));
394 mlxsw_emad_pack_end_tlv(buf);
395
396 buf = skb_push(skb, reg->len + sizeof(u32));
397 mlxsw_emad_pack_reg_tlv(buf, reg, payload);
398
399 if (enable_string_tlv) {
400 buf = skb_push(skb, MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32));
401 mlxsw_emad_pack_string_tlv(buf);
402 }
403
404 buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32));
405 mlxsw_emad_pack_op_tlv(buf, reg, type, tid);
406
407 mlxsw_emad_construct_eth_hdr(skb);
408 }
409
410 struct mlxsw_emad_tlv_offsets {
411 u16 op_tlv;
412 u16 string_tlv;
413 u16 reg_tlv;
414 };
415
416 static bool mlxsw_emad_tlv_is_string_tlv(const char *tlv)
417 {
418 u8 tlv_type = mlxsw_emad_string_tlv_type_get(tlv);
419
420 return tlv_type == MLXSW_EMAD_TLV_TYPE_STRING;
421 }
422
423 static void mlxsw_emad_tlv_parse(struct sk_buff *skb)
424 {
425 struct mlxsw_emad_tlv_offsets *offsets =
426 (struct mlxsw_emad_tlv_offsets *) skb->cb;
427
428 offsets->op_tlv = MLXSW_EMAD_ETH_HDR_LEN;
429 offsets->string_tlv = 0;
430 offsets->reg_tlv = MLXSW_EMAD_ETH_HDR_LEN +
431 MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
432
433 /* If string TLV is present, it must come after the operation TLV. */
434 if (mlxsw_emad_tlv_is_string_tlv(skb->data + offsets->reg_tlv)) {
435 offsets->string_tlv = offsets->reg_tlv;
436 offsets->reg_tlv += MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32);
437 }
438 }
439
440 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb)
441 {
442 struct mlxsw_emad_tlv_offsets *offsets =
443 (struct mlxsw_emad_tlv_offsets *) skb->cb;
444
445 return ((char *) (skb->data + offsets->op_tlv));
446 }
447
448 static char *mlxsw_emad_string_tlv(const struct sk_buff *skb)
449 {
450 struct mlxsw_emad_tlv_offsets *offsets =
451 (struct mlxsw_emad_tlv_offsets *) skb->cb;
452
453 if (!offsets->string_tlv)
454 return NULL;
455
456 return ((char *) (skb->data + offsets->string_tlv));
457 }
458
459 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb)
460 {
461 struct mlxsw_emad_tlv_offsets *offsets =
462 (struct mlxsw_emad_tlv_offsets *) skb->cb;
463
464 return ((char *) (skb->data + offsets->reg_tlv));
465 }
466
467 static char *mlxsw_emad_reg_payload(const char *reg_tlv)
468 {
469 return ((char *) (reg_tlv + sizeof(u32)));
470 }
471
472 static char *mlxsw_emad_reg_payload_cmd(const char *mbox)
473 {
474 return ((char *) (mbox + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32)));
475 }
476
477 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb)
478 {
479 char *op_tlv;
480
481 op_tlv = mlxsw_emad_op_tlv(skb);
482 return mlxsw_emad_op_tlv_tid_get(op_tlv);
483 }
484
485 static bool mlxsw_emad_is_resp(const struct sk_buff *skb)
486 {
487 char *op_tlv;
488
489 op_tlv = mlxsw_emad_op_tlv(skb);
490 return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE);
491 }
492
493 static int mlxsw_emad_process_status(char *op_tlv,
494 enum mlxsw_emad_op_tlv_status *p_status)
495 {
496 *p_status = mlxsw_emad_op_tlv_status_get(op_tlv);
497
498 switch (*p_status) {
499 case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS:
500 return 0;
501 case MLXSW_EMAD_OP_TLV_STATUS_BUSY:
502 case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK:
503 return -EAGAIN;
504 case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED:
505 case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV:
506 case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED:
507 case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED:
508 case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED:
509 case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER:
510 case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE:
511 case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR:
512 default:
513 return -EIO;
514 }
515 }
516
517 static int
518 mlxsw_emad_process_status_skb(struct sk_buff *skb,
519 enum mlxsw_emad_op_tlv_status *p_status)
520 {
521 return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status);
522 }
523
524 struct mlxsw_reg_trans {
525 struct list_head list;
526 struct list_head bulk_list;
527 struct mlxsw_core *core;
528 struct sk_buff *tx_skb;
529 struct mlxsw_tx_info tx_info;
530 struct delayed_work timeout_dw;
531 unsigned int retries;
532 u64 tid;
533 struct completion completion;
534 atomic_t active;
535 mlxsw_reg_trans_cb_t *cb;
536 unsigned long cb_priv;
537 const struct mlxsw_reg_info *reg;
538 enum mlxsw_core_reg_access_type type;
539 int err;
540 char *emad_err_string;
541 enum mlxsw_emad_op_tlv_status emad_status;
542 struct rcu_head rcu;
543 };
544
545 static void mlxsw_emad_process_string_tlv(const struct sk_buff *skb,
546 struct mlxsw_reg_trans *trans)
547 {
548 char *string_tlv;
549 char *string;
550
551 string_tlv = mlxsw_emad_string_tlv(skb);
552 if (!string_tlv)
553 return;
554
555 trans->emad_err_string = kzalloc(MLXSW_EMAD_STRING_TLV_STRING_LEN,
556 GFP_ATOMIC);
557 if (!trans->emad_err_string)
558 return;
559
560 string = mlxsw_emad_string_tlv_string_data(string_tlv);
561 strlcpy(trans->emad_err_string, string,
562 MLXSW_EMAD_STRING_TLV_STRING_LEN);
563 }
564
565 #define MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS 3000
566 #define MLXSW_EMAD_TIMEOUT_MS 200
567
568 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans)
569 {
570 unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS);
571
572 if (trans->core->fw_flash_in_progress)
573 timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS);
574
575 queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw,
576 timeout << trans->retries);
577 }
578
579 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
580 struct mlxsw_reg_trans *trans)
581 {
582 struct sk_buff *skb;
583 int err;
584
585 skb = skb_copy(trans->tx_skb, GFP_KERNEL);
586 if (!skb)
587 return -ENOMEM;
588
589 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0,
590 skb->data + mlxsw_core->driver->txhdr_len,
591 skb->len - mlxsw_core->driver->txhdr_len);
592
593 atomic_set(&trans->active, 1);
594 err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info);
595 if (err) {
596 dev_kfree_skb(skb);
597 return err;
598 }
599 mlxsw_emad_trans_timeout_schedule(trans);
600 return 0;
601 }
602
603 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err)
604 {
605 struct mlxsw_core *mlxsw_core = trans->core;
606
607 dev_kfree_skb(trans->tx_skb);
608 spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
609 list_del_rcu(&trans->list);
610 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
611 trans->err = err;
612 complete(&trans->completion);
613 }
614
615 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core,
616 struct mlxsw_reg_trans *trans)
617 {
618 int err;
619
620 if (trans->retries < MLXSW_EMAD_MAX_RETRY) {
621 trans->retries++;
622 err = mlxsw_emad_transmit(trans->core, trans);
623 if (err == 0)
624 return;
625
626 if (!atomic_dec_and_test(&trans->active))
627 return;
628 } else {
629 err = -EIO;
630 }
631 mlxsw_emad_trans_finish(trans, err);
632 }
633
634 static void mlxsw_emad_trans_timeout_work(struct work_struct *work)
635 {
636 struct mlxsw_reg_trans *trans = container_of(work,
637 struct mlxsw_reg_trans,
638 timeout_dw.work);
639
640 if (!atomic_dec_and_test(&trans->active))
641 return;
642
643 mlxsw_emad_transmit_retry(trans->core, trans);
644 }
645
646 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core,
647 struct mlxsw_reg_trans *trans,
648 struct sk_buff *skb)
649 {
650 int err;
651
652 if (!atomic_dec_and_test(&trans->active))
653 return;
654
655 err = mlxsw_emad_process_status_skb(skb, &trans->emad_status);
656 if (err == -EAGAIN) {
657 mlxsw_emad_transmit_retry(mlxsw_core, trans);
658 } else {
659 if (err == 0) {
660 char *reg_tlv = mlxsw_emad_reg_tlv(skb);
661
662 if (trans->cb)
663 trans->cb(mlxsw_core,
664 mlxsw_emad_reg_payload(reg_tlv),
665 trans->reg->len, trans->cb_priv);
666 } else {
667 mlxsw_emad_process_string_tlv(skb, trans);
668 }
669 mlxsw_emad_trans_finish(trans, err);
670 }
671 }
672
673 /* called with rcu read lock held */
674 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port,
675 void *priv)
676 {
677 struct mlxsw_core *mlxsw_core = priv;
678 struct mlxsw_reg_trans *trans;
679
680 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0,
681 skb->data, skb->len);
682
683 mlxsw_emad_tlv_parse(skb);
684
685 if (!mlxsw_emad_is_resp(skb))
686 goto free_skb;
687
688 list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) {
689 if (mlxsw_emad_get_tid(skb) == trans->tid) {
690 mlxsw_emad_process_response(mlxsw_core, trans, skb);
691 break;
692 }
693 }
694
695 free_skb:
696 dev_kfree_skb(skb);
697 }
698
699 static const struct mlxsw_listener mlxsw_emad_rx_listener =
700 MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false,
701 EMAD, DISCARD);
702
703 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core)
704 {
705 struct workqueue_struct *emad_wq;
706 u64 tid;
707 int err;
708
709 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
710 return 0;
711
712 emad_wq = alloc_workqueue("mlxsw_core_emad", 0, 0);
713 if (!emad_wq)
714 return -ENOMEM;
715 mlxsw_core->emad_wq = emad_wq;
716
717 /* Set the upper 32 bits of the transaction ID field to a random
718 * number. This allows us to discard EMADs addressed to other
719 * devices.
720 */
721 get_random_bytes(&tid, 4);
722 tid <<= 32;
723 atomic64_set(&mlxsw_core->emad.tid, tid);
724
725 INIT_LIST_HEAD(&mlxsw_core->emad.trans_list);
726 spin_lock_init(&mlxsw_core->emad.trans_list_lock);
727
728 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener,
729 mlxsw_core);
730 if (err)
731 goto err_trap_register;
732
733 err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core);
734 if (err)
735 goto err_emad_trap_set;
736 mlxsw_core->emad.use_emad = true;
737
738 return 0;
739
740 err_emad_trap_set:
741 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
742 mlxsw_core);
743 err_trap_register:
744 destroy_workqueue(mlxsw_core->emad_wq);
745 return err;
746 }
747
748 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core)
749 {
750
751 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
752 return;
753
754 mlxsw_core->emad.use_emad = false;
755 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
756 mlxsw_core);
757 destroy_workqueue(mlxsw_core->emad_wq);
758 }
759
760 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core,
761 u16 reg_len, bool enable_string_tlv)
762 {
763 struct sk_buff *skb;
764 u16 emad_len;
765
766 emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN +
767 (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) *
768 sizeof(u32) + mlxsw_core->driver->txhdr_len);
769 if (enable_string_tlv)
770 emad_len += MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32);
771 if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN)
772 return NULL;
773
774 skb = netdev_alloc_skb(NULL, emad_len);
775 if (!skb)
776 return NULL;
777 memset(skb->data, 0, emad_len);
778 skb_reserve(skb, emad_len);
779
780 return skb;
781 }
782
783 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core,
784 const struct mlxsw_reg_info *reg,
785 char *payload,
786 enum mlxsw_core_reg_access_type type,
787 struct mlxsw_reg_trans *trans,
788 struct list_head *bulk_list,
789 mlxsw_reg_trans_cb_t *cb,
790 unsigned long cb_priv, u64 tid)
791 {
792 bool enable_string_tlv;
793 struct sk_buff *skb;
794 int err;
795
796 dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n",
797 tid, reg->id, mlxsw_reg_id_str(reg->id),
798 mlxsw_core_reg_access_type_str(type));
799
800 /* Since this can be changed during emad_reg_access, read it once and
801 * use the value all the way.
802 */
803 enable_string_tlv = mlxsw_core->emad.enable_string_tlv;
804
805 skb = mlxsw_emad_alloc(mlxsw_core, reg->len, enable_string_tlv);
806 if (!skb)
807 return -ENOMEM;
808
809 list_add_tail(&trans->bulk_list, bulk_list);
810 trans->core = mlxsw_core;
811 trans->tx_skb = skb;
812 trans->tx_info.local_port = MLXSW_PORT_CPU_PORT;
813 trans->tx_info.is_emad = true;
814 INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work);
815 trans->tid = tid;
816 init_completion(&trans->completion);
817 trans->cb = cb;
818 trans->cb_priv = cb_priv;
819 trans->reg = reg;
820 trans->type = type;
821
822 mlxsw_emad_construct(skb, reg, payload, type, trans->tid,
823 enable_string_tlv);
824 mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info);
825
826 spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
827 list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list);
828 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
829 err = mlxsw_emad_transmit(mlxsw_core, trans);
830 if (err)
831 goto err_out;
832 return 0;
833
834 err_out:
835 spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
836 list_del_rcu(&trans->list);
837 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
838 list_del(&trans->bulk_list);
839 dev_kfree_skb(trans->tx_skb);
840 return err;
841 }
842
843 /*****************
844 * Core functions
845 *****************/
846
847 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver)
848 {
849 spin_lock(&mlxsw_core_driver_list_lock);
850 list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list);
851 spin_unlock(&mlxsw_core_driver_list_lock);
852 return 0;
853 }
854 EXPORT_SYMBOL(mlxsw_core_driver_register);
855
856 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver)
857 {
858 spin_lock(&mlxsw_core_driver_list_lock);
859 list_del(&mlxsw_driver->list);
860 spin_unlock(&mlxsw_core_driver_list_lock);
861 }
862 EXPORT_SYMBOL(mlxsw_core_driver_unregister);
863
864 static struct mlxsw_driver *__driver_find(const char *kind)
865 {
866 struct mlxsw_driver *mlxsw_driver;
867
868 list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) {
869 if (strcmp(mlxsw_driver->kind, kind) == 0)
870 return mlxsw_driver;
871 }
872 return NULL;
873 }
874
875 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind)
876 {
877 struct mlxsw_driver *mlxsw_driver;
878
879 spin_lock(&mlxsw_core_driver_list_lock);
880 mlxsw_driver = __driver_find(kind);
881 spin_unlock(&mlxsw_core_driver_list_lock);
882 return mlxsw_driver;
883 }
884
885 struct mlxsw_core_fw_info {
886 struct mlxfw_dev mlxfw_dev;
887 struct mlxsw_core *mlxsw_core;
888 };
889
890 static int mlxsw_core_fw_component_query(struct mlxfw_dev *mlxfw_dev,
891 u16 component_index, u32 *p_max_size,
892 u8 *p_align_bits, u16 *p_max_write_size)
893 {
894 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
895 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
896 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
897 char mcqi_pl[MLXSW_REG_MCQI_LEN];
898 int err;
899
900 mlxsw_reg_mcqi_pack(mcqi_pl, component_index);
901 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcqi), mcqi_pl);
902 if (err)
903 return err;
904 mlxsw_reg_mcqi_unpack(mcqi_pl, p_max_size, p_align_bits, p_max_write_size);
905
906 *p_align_bits = max_t(u8, *p_align_bits, 2);
907 *p_max_write_size = min_t(u16, *p_max_write_size, MLXSW_REG_MCDA_MAX_DATA_LEN);
908 return 0;
909 }
910
911 static int mlxsw_core_fw_fsm_lock(struct mlxfw_dev *mlxfw_dev, u32 *fwhandle)
912 {
913 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
914 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
915 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
916 char mcc_pl[MLXSW_REG_MCC_LEN];
917 u8 control_state;
918 int err;
919
920 mlxsw_reg_mcc_pack(mcc_pl, 0, 0, 0, 0);
921 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
922 if (err)
923 return err;
924
925 mlxsw_reg_mcc_unpack(mcc_pl, fwhandle, NULL, &control_state);
926 if (control_state != MLXFW_FSM_STATE_IDLE)
927 return -EBUSY;
928
929 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_LOCK_UPDATE_HANDLE, 0, *fwhandle, 0);
930 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
931 }
932
933 static int mlxsw_core_fw_fsm_component_update(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
934 u16 component_index, u32 component_size)
935 {
936 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
937 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
938 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
939 char mcc_pl[MLXSW_REG_MCC_LEN];
940
941 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_UPDATE_COMPONENT,
942 component_index, fwhandle, component_size);
943 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
944 }
945
946 static int mlxsw_core_fw_fsm_block_download(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
947 u8 *data, u16 size, u32 offset)
948 {
949 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
950 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
951 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
952 char mcda_pl[MLXSW_REG_MCDA_LEN];
953
954 mlxsw_reg_mcda_pack(mcda_pl, fwhandle, offset, size, data);
955 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcda), mcda_pl);
956 }
957
958 static int mlxsw_core_fw_fsm_component_verify(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
959 u16 component_index)
960 {
961 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
962 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
963 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
964 char mcc_pl[MLXSW_REG_MCC_LEN];
965
966 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_VERIFY_COMPONENT,
967 component_index, fwhandle, 0);
968 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
969 }
970
971 static int mlxsw_core_fw_fsm_activate(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
972 {
973 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
974 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
975 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
976 char mcc_pl[MLXSW_REG_MCC_LEN];
977
978 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_ACTIVATE, 0, fwhandle, 0);
979 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
980 }
981
982 static int mlxsw_core_fw_fsm_query_state(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
983 enum mlxfw_fsm_state *fsm_state,
984 enum mlxfw_fsm_state_err *fsm_state_err)
985 {
986 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
987 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
988 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
989 char mcc_pl[MLXSW_REG_MCC_LEN];
990 u8 control_state;
991 u8 error_code;
992 int err;
993
994 mlxsw_reg_mcc_pack(mcc_pl, 0, 0, fwhandle, 0);
995 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
996 if (err)
997 return err;
998
999 mlxsw_reg_mcc_unpack(mcc_pl, NULL, &error_code, &control_state);
1000 *fsm_state = control_state;
1001 *fsm_state_err = min_t(enum mlxfw_fsm_state_err, error_code, MLXFW_FSM_STATE_ERR_MAX);
1002 return 0;
1003 }
1004
1005 static void mlxsw_core_fw_fsm_cancel(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
1006 {
1007 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1008 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1009 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1010 char mcc_pl[MLXSW_REG_MCC_LEN];
1011
1012 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_CANCEL, 0, fwhandle, 0);
1013 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1014 }
1015
1016 static void mlxsw_core_fw_fsm_release(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
1017 {
1018 struct mlxsw_core_fw_info *mlxsw_core_fw_info =
1019 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev);
1020 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core;
1021 char mcc_pl[MLXSW_REG_MCC_LEN];
1022
1023 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_RELEASE_UPDATE_HANDLE, 0, fwhandle, 0);
1024 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl);
1025 }
1026
1027 static const struct mlxfw_dev_ops mlxsw_core_fw_mlxsw_dev_ops = {
1028 .component_query = mlxsw_core_fw_component_query,
1029 .fsm_lock = mlxsw_core_fw_fsm_lock,
1030 .fsm_component_update = mlxsw_core_fw_fsm_component_update,
1031 .fsm_block_download = mlxsw_core_fw_fsm_block_download,
1032 .fsm_component_verify = mlxsw_core_fw_fsm_component_verify,
1033 .fsm_activate = mlxsw_core_fw_fsm_activate,
1034 .fsm_query_state = mlxsw_core_fw_fsm_query_state,
1035 .fsm_cancel = mlxsw_core_fw_fsm_cancel,
1036 .fsm_release = mlxsw_core_fw_fsm_release,
1037 };
1038
1039 static int mlxsw_core_fw_flash(struct mlxsw_core *mlxsw_core, const struct firmware *firmware,
1040 struct netlink_ext_ack *extack)
1041 {
1042 struct mlxsw_core_fw_info mlxsw_core_fw_info = {
1043 .mlxfw_dev = {
1044 .ops = &mlxsw_core_fw_mlxsw_dev_ops,
1045 .psid = mlxsw_core->bus_info->psid,
1046 .psid_size = strlen(mlxsw_core->bus_info->psid),
1047 .devlink = priv_to_devlink(mlxsw_core),
1048 },
1049 .mlxsw_core = mlxsw_core
1050 };
1051 int err;
1052
1053 mlxsw_core->fw_flash_in_progress = true;
1054 err = mlxfw_firmware_flash(&mlxsw_core_fw_info.mlxfw_dev, firmware, extack);
1055 mlxsw_core->fw_flash_in_progress = false;
1056
1057 return err;
1058 }
1059
1060 static int mlxsw_core_fw_rev_validate(struct mlxsw_core *mlxsw_core,
1061 const struct mlxsw_bus_info *mlxsw_bus_info,
1062 const struct mlxsw_fw_rev *req_rev,
1063 const char *filename)
1064 {
1065 const struct mlxsw_fw_rev *rev = &mlxsw_bus_info->fw_rev;
1066 union devlink_param_value value;
1067 const struct firmware *firmware;
1068 int err;
1069
1070 /* Don't check if driver does not require it */
1071 if (!req_rev || !filename)
1072 return 0;
1073
1074 /* Don't check if devlink 'fw_load_policy' param is 'flash' */
1075 err = devlink_param_driverinit_value_get(priv_to_devlink(mlxsw_core),
1076 DEVLINK_PARAM_GENERIC_ID_FW_LOAD_POLICY,
1077 &value);
1078 if (err)
1079 return err;
1080 if (value.vu8 == DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_FLASH)
1081 return 0;
1082
1083 /* Validate driver & FW are compatible */
1084 if (rev->major != req_rev->major) {
1085 WARN(1, "Mismatch in major FW version [%d:%d] is never expected; Please contact support\n",
1086 rev->major, req_rev->major);
1087 return -EINVAL;
1088 }
1089 if (mlxsw_core_fw_rev_minor_subminor_validate(rev, req_rev))
1090 return 0;
1091
1092 dev_err(mlxsw_bus_info->dev, "The firmware version %d.%d.%d is incompatible with the driver (required >= %d.%d.%d)\n",
1093 rev->major, rev->minor, rev->subminor, req_rev->major,
1094 req_rev->minor, req_rev->subminor);
1095 dev_info(mlxsw_bus_info->dev, "Flashing firmware using file %s\n", filename);
1096
1097 err = request_firmware_direct(&firmware, filename, mlxsw_bus_info->dev);
1098 if (err) {
1099 dev_err(mlxsw_bus_info->dev, "Could not request firmware file %s\n", filename);
1100 return err;
1101 }
1102
1103 err = mlxsw_core_fw_flash(mlxsw_core, firmware, NULL);
1104 release_firmware(firmware);
1105 if (err)
1106 dev_err(mlxsw_bus_info->dev, "Could not upgrade firmware\n");
1107
1108 /* On FW flash success, tell the caller FW reset is needed
1109 * if current FW supports it.
1110 */
1111 if (rev->minor >= req_rev->can_reset_minor)
1112 return err ? err : -EAGAIN;
1113 else
1114 return 0;
1115 }
1116
1117 static int mlxsw_core_fw_flash_update(struct mlxsw_core *mlxsw_core,
1118 struct devlink_flash_update_params *params,
1119 struct netlink_ext_ack *extack)
1120 {
1121 return mlxsw_core_fw_flash(mlxsw_core, params->fw, extack);
1122 }
1123
1124 static int mlxsw_core_devlink_param_fw_load_policy_validate(struct devlink *devlink, u32 id,
1125 union devlink_param_value val,
1126 struct netlink_ext_ack *extack)
1127 {
1128 if (val.vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_DRIVER &&
1129 val.vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_FLASH) {
1130 NL_SET_ERR_MSG_MOD(extack, "'fw_load_policy' must be 'driver' or 'flash'");
1131 return -EINVAL;
1132 }
1133
1134 return 0;
1135 }
1136
1137 static const struct devlink_param mlxsw_core_fw_devlink_params[] = {
1138 DEVLINK_PARAM_GENERIC(FW_LOAD_POLICY, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,
1139 mlxsw_core_devlink_param_fw_load_policy_validate),
1140 };
1141
1142 static int mlxsw_core_fw_params_register(struct mlxsw_core *mlxsw_core)
1143 {
1144 struct devlink *devlink = priv_to_devlink(mlxsw_core);
1145 union devlink_param_value value;
1146 int err;
1147
1148 err = devlink_params_register(devlink, mlxsw_core_fw_devlink_params,
1149 ARRAY_SIZE(mlxsw_core_fw_devlink_params));
1150 if (err)
1151 return err;
1152
1153 value.vu8 = DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_DRIVER;
1154 devlink_param_driverinit_value_set(devlink, DEVLINK_PARAM_GENERIC_ID_FW_LOAD_POLICY, value);
1155 return 0;
1156 }
1157
1158 static void mlxsw_core_fw_params_unregister(struct mlxsw_core *mlxsw_core)
1159 {
1160 devlink_params_unregister(priv_to_devlink(mlxsw_core), mlxsw_core_fw_devlink_params,
1161 ARRAY_SIZE(mlxsw_core_fw_devlink_params));
1162 }
1163
1164 static int mlxsw_devlink_port_split(struct devlink *devlink,
1165 unsigned int port_index,
1166 unsigned int count,
1167 struct netlink_ext_ack *extack)
1168 {
1169 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1170
1171 if (port_index >= mlxsw_core->max_ports) {
1172 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
1173 return -EINVAL;
1174 }
1175 if (!mlxsw_core->driver->port_split)
1176 return -EOPNOTSUPP;
1177 return mlxsw_core->driver->port_split(mlxsw_core, port_index, count,
1178 extack);
1179 }
1180
1181 static int mlxsw_devlink_port_unsplit(struct devlink *devlink,
1182 unsigned int port_index,
1183 struct netlink_ext_ack *extack)
1184 {
1185 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1186
1187 if (port_index >= mlxsw_core->max_ports) {
1188 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
1189 return -EINVAL;
1190 }
1191 if (!mlxsw_core->driver->port_unsplit)
1192 return -EOPNOTSUPP;
1193 return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index,
1194 extack);
1195 }
1196
1197 static int
1198 mlxsw_devlink_sb_pool_get(struct devlink *devlink,
1199 unsigned int sb_index, u16 pool_index,
1200 struct devlink_sb_pool_info *pool_info)
1201 {
1202 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1203 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1204
1205 if (!mlxsw_driver->sb_pool_get)
1206 return -EOPNOTSUPP;
1207 return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index,
1208 pool_index, pool_info);
1209 }
1210
1211 static int
1212 mlxsw_devlink_sb_pool_set(struct devlink *devlink,
1213 unsigned int sb_index, u16 pool_index, u32 size,
1214 enum devlink_sb_threshold_type threshold_type,
1215 struct netlink_ext_ack *extack)
1216 {
1217 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1218 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1219
1220 if (!mlxsw_driver->sb_pool_set)
1221 return -EOPNOTSUPP;
1222 return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index,
1223 pool_index, size, threshold_type,
1224 extack);
1225 }
1226
1227 static void *__dl_port(struct devlink_port *devlink_port)
1228 {
1229 return container_of(devlink_port, struct mlxsw_core_port, devlink_port);
1230 }
1231
1232 static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port,
1233 enum devlink_port_type port_type)
1234 {
1235 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1236 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1237 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1238
1239 if (!mlxsw_driver->port_type_set)
1240 return -EOPNOTSUPP;
1241
1242 return mlxsw_driver->port_type_set(mlxsw_core,
1243 mlxsw_core_port->local_port,
1244 port_type);
1245 }
1246
1247 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port,
1248 unsigned int sb_index, u16 pool_index,
1249 u32 *p_threshold)
1250 {
1251 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1252 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1253 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1254
1255 if (!mlxsw_driver->sb_port_pool_get ||
1256 !mlxsw_core_port_check(mlxsw_core_port))
1257 return -EOPNOTSUPP;
1258 return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index,
1259 pool_index, p_threshold);
1260 }
1261
1262 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port,
1263 unsigned int sb_index, u16 pool_index,
1264 u32 threshold,
1265 struct netlink_ext_ack *extack)
1266 {
1267 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1268 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1269 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1270
1271 if (!mlxsw_driver->sb_port_pool_set ||
1272 !mlxsw_core_port_check(mlxsw_core_port))
1273 return -EOPNOTSUPP;
1274 return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index,
1275 pool_index, threshold, extack);
1276 }
1277
1278 static int
1279 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port,
1280 unsigned int sb_index, u16 tc_index,
1281 enum devlink_sb_pool_type pool_type,
1282 u16 *p_pool_index, u32 *p_threshold)
1283 {
1284 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1285 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1286 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1287
1288 if (!mlxsw_driver->sb_tc_pool_bind_get ||
1289 !mlxsw_core_port_check(mlxsw_core_port))
1290 return -EOPNOTSUPP;
1291 return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index,
1292 tc_index, pool_type,
1293 p_pool_index, p_threshold);
1294 }
1295
1296 static int
1297 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port,
1298 unsigned int sb_index, u16 tc_index,
1299 enum devlink_sb_pool_type pool_type,
1300 u16 pool_index, u32 threshold,
1301 struct netlink_ext_ack *extack)
1302 {
1303 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1304 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1305 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1306
1307 if (!mlxsw_driver->sb_tc_pool_bind_set ||
1308 !mlxsw_core_port_check(mlxsw_core_port))
1309 return -EOPNOTSUPP;
1310 return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index,
1311 tc_index, pool_type,
1312 pool_index, threshold, extack);
1313 }
1314
1315 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink,
1316 unsigned int sb_index)
1317 {
1318 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1319 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1320
1321 if (!mlxsw_driver->sb_occ_snapshot)
1322 return -EOPNOTSUPP;
1323 return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index);
1324 }
1325
1326 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink,
1327 unsigned int sb_index)
1328 {
1329 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1330 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1331
1332 if (!mlxsw_driver->sb_occ_max_clear)
1333 return -EOPNOTSUPP;
1334 return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index);
1335 }
1336
1337 static int
1338 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port,
1339 unsigned int sb_index, u16 pool_index,
1340 u32 *p_cur, u32 *p_max)
1341 {
1342 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1343 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1344 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1345
1346 if (!mlxsw_driver->sb_occ_port_pool_get ||
1347 !mlxsw_core_port_check(mlxsw_core_port))
1348 return -EOPNOTSUPP;
1349 return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index,
1350 pool_index, p_cur, p_max);
1351 }
1352
1353 static int
1354 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port,
1355 unsigned int sb_index, u16 tc_index,
1356 enum devlink_sb_pool_type pool_type,
1357 u32 *p_cur, u32 *p_max)
1358 {
1359 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
1360 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1361 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
1362
1363 if (!mlxsw_driver->sb_occ_tc_port_bind_get ||
1364 !mlxsw_core_port_check(mlxsw_core_port))
1365 return -EOPNOTSUPP;
1366 return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port,
1367 sb_index, tc_index,
1368 pool_type, p_cur, p_max);
1369 }
1370
1371 static int
1372 mlxsw_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req,
1373 struct netlink_ext_ack *extack)
1374 {
1375 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1376 char fw_info_psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE];
1377 u32 hw_rev, fw_major, fw_minor, fw_sub_minor;
1378 char mgir_pl[MLXSW_REG_MGIR_LEN];
1379 char buf[32];
1380 int err;
1381
1382 err = devlink_info_driver_name_put(req,
1383 mlxsw_core->bus_info->device_kind);
1384 if (err)
1385 return err;
1386
1387 mlxsw_reg_mgir_pack(mgir_pl);
1388 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mgir), mgir_pl);
1389 if (err)
1390 return err;
1391 mlxsw_reg_mgir_unpack(mgir_pl, &hw_rev, fw_info_psid, &fw_major,
1392 &fw_minor, &fw_sub_minor);
1393
1394 sprintf(buf, "%X", hw_rev);
1395 err = devlink_info_version_fixed_put(req, "hw.revision", buf);
1396 if (err)
1397 return err;
1398
1399 err = devlink_info_version_fixed_put(req, "fw.psid", fw_info_psid);
1400 if (err)
1401 return err;
1402
1403 sprintf(buf, "%d.%d.%d", fw_major, fw_minor, fw_sub_minor);
1404 err = devlink_info_version_running_put(req, "fw.version", buf);
1405 if (err)
1406 return err;
1407
1408 return 0;
1409 }
1410
1411 static int
1412 mlxsw_devlink_core_bus_device_reload_down(struct devlink *devlink,
1413 bool netns_change, enum devlink_reload_action action,
1414 enum devlink_reload_limit limit,
1415 struct netlink_ext_ack *extack)
1416 {
1417 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1418
1419 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET))
1420 return -EOPNOTSUPP;
1421
1422 mlxsw_core_bus_device_unregister(mlxsw_core, true);
1423 return 0;
1424 }
1425
1426 static int
1427 mlxsw_devlink_core_bus_device_reload_up(struct devlink *devlink, enum devlink_reload_action action,
1428 enum devlink_reload_limit limit, u32 *actions_performed,
1429 struct netlink_ext_ack *extack)
1430 {
1431 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1432
1433 *actions_performed = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) |
1434 BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE);
1435 return mlxsw_core_bus_device_register(mlxsw_core->bus_info,
1436 mlxsw_core->bus,
1437 mlxsw_core->bus_priv, true,
1438 devlink, extack);
1439 }
1440
1441 static int mlxsw_devlink_flash_update(struct devlink *devlink,
1442 struct devlink_flash_update_params *params,
1443 struct netlink_ext_ack *extack)
1444 {
1445 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1446
1447 return mlxsw_core_fw_flash_update(mlxsw_core, params, extack);
1448 }
1449
1450 static int mlxsw_devlink_trap_init(struct devlink *devlink,
1451 const struct devlink_trap *trap,
1452 void *trap_ctx)
1453 {
1454 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1455 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1456
1457 if (!mlxsw_driver->trap_init)
1458 return -EOPNOTSUPP;
1459 return mlxsw_driver->trap_init(mlxsw_core, trap, trap_ctx);
1460 }
1461
1462 static void mlxsw_devlink_trap_fini(struct devlink *devlink,
1463 const struct devlink_trap *trap,
1464 void *trap_ctx)
1465 {
1466 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1467 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1468
1469 if (!mlxsw_driver->trap_fini)
1470 return;
1471 mlxsw_driver->trap_fini(mlxsw_core, trap, trap_ctx);
1472 }
1473
1474 static int mlxsw_devlink_trap_action_set(struct devlink *devlink,
1475 const struct devlink_trap *trap,
1476 enum devlink_trap_action action,
1477 struct netlink_ext_ack *extack)
1478 {
1479 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1480 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1481
1482 if (!mlxsw_driver->trap_action_set)
1483 return -EOPNOTSUPP;
1484 return mlxsw_driver->trap_action_set(mlxsw_core, trap, action, extack);
1485 }
1486
1487 static int
1488 mlxsw_devlink_trap_group_init(struct devlink *devlink,
1489 const struct devlink_trap_group *group)
1490 {
1491 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1492 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1493
1494 if (!mlxsw_driver->trap_group_init)
1495 return -EOPNOTSUPP;
1496 return mlxsw_driver->trap_group_init(mlxsw_core, group);
1497 }
1498
1499 static int
1500 mlxsw_devlink_trap_group_set(struct devlink *devlink,
1501 const struct devlink_trap_group *group,
1502 const struct devlink_trap_policer *policer,
1503 struct netlink_ext_ack *extack)
1504 {
1505 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1506 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1507
1508 if (!mlxsw_driver->trap_group_set)
1509 return -EOPNOTSUPP;
1510 return mlxsw_driver->trap_group_set(mlxsw_core, group, policer, extack);
1511 }
1512
1513 static int
1514 mlxsw_devlink_trap_policer_init(struct devlink *devlink,
1515 const struct devlink_trap_policer *policer)
1516 {
1517 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1518 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1519
1520 if (!mlxsw_driver->trap_policer_init)
1521 return -EOPNOTSUPP;
1522 return mlxsw_driver->trap_policer_init(mlxsw_core, policer);
1523 }
1524
1525 static void
1526 mlxsw_devlink_trap_policer_fini(struct devlink *devlink,
1527 const struct devlink_trap_policer *policer)
1528 {
1529 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1530 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1531
1532 if (!mlxsw_driver->trap_policer_fini)
1533 return;
1534 mlxsw_driver->trap_policer_fini(mlxsw_core, policer);
1535 }
1536
1537 static int
1538 mlxsw_devlink_trap_policer_set(struct devlink *devlink,
1539 const struct devlink_trap_policer *policer,
1540 u64 rate, u64 burst,
1541 struct netlink_ext_ack *extack)
1542 {
1543 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1544 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1545
1546 if (!mlxsw_driver->trap_policer_set)
1547 return -EOPNOTSUPP;
1548 return mlxsw_driver->trap_policer_set(mlxsw_core, policer, rate, burst,
1549 extack);
1550 }
1551
1552 static int
1553 mlxsw_devlink_trap_policer_counter_get(struct devlink *devlink,
1554 const struct devlink_trap_policer *policer,
1555 u64 *p_drops)
1556 {
1557 struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
1558 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
1559
1560 if (!mlxsw_driver->trap_policer_counter_get)
1561 return -EOPNOTSUPP;
1562 return mlxsw_driver->trap_policer_counter_get(mlxsw_core, policer,
1563 p_drops);
1564 }
1565
1566 static const struct devlink_ops mlxsw_devlink_ops = {
1567 .reload_actions = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) |
1568 BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE),
1569 .reload_down = mlxsw_devlink_core_bus_device_reload_down,
1570 .reload_up = mlxsw_devlink_core_bus_device_reload_up,
1571 .port_type_set = mlxsw_devlink_port_type_set,
1572 .port_split = mlxsw_devlink_port_split,
1573 .port_unsplit = mlxsw_devlink_port_unsplit,
1574 .sb_pool_get = mlxsw_devlink_sb_pool_get,
1575 .sb_pool_set = mlxsw_devlink_sb_pool_set,
1576 .sb_port_pool_get = mlxsw_devlink_sb_port_pool_get,
1577 .sb_port_pool_set = mlxsw_devlink_sb_port_pool_set,
1578 .sb_tc_pool_bind_get = mlxsw_devlink_sb_tc_pool_bind_get,
1579 .sb_tc_pool_bind_set = mlxsw_devlink_sb_tc_pool_bind_set,
1580 .sb_occ_snapshot = mlxsw_devlink_sb_occ_snapshot,
1581 .sb_occ_max_clear = mlxsw_devlink_sb_occ_max_clear,
1582 .sb_occ_port_pool_get = mlxsw_devlink_sb_occ_port_pool_get,
1583 .sb_occ_tc_port_bind_get = mlxsw_devlink_sb_occ_tc_port_bind_get,
1584 .info_get = mlxsw_devlink_info_get,
1585 .flash_update = mlxsw_devlink_flash_update,
1586 .trap_init = mlxsw_devlink_trap_init,
1587 .trap_fini = mlxsw_devlink_trap_fini,
1588 .trap_action_set = mlxsw_devlink_trap_action_set,
1589 .trap_group_init = mlxsw_devlink_trap_group_init,
1590 .trap_group_set = mlxsw_devlink_trap_group_set,
1591 .trap_policer_init = mlxsw_devlink_trap_policer_init,
1592 .trap_policer_fini = mlxsw_devlink_trap_policer_fini,
1593 .trap_policer_set = mlxsw_devlink_trap_policer_set,
1594 .trap_policer_counter_get = mlxsw_devlink_trap_policer_counter_get,
1595 };
1596
1597 static int mlxsw_core_params_register(struct mlxsw_core *mlxsw_core)
1598 {
1599 int err;
1600
1601 err = mlxsw_core_fw_params_register(mlxsw_core);
1602 if (err)
1603 return err;
1604
1605 if (mlxsw_core->driver->params_register) {
1606 err = mlxsw_core->driver->params_register(mlxsw_core);
1607 if (err)
1608 goto err_params_register;
1609 }
1610 return 0;
1611
1612 err_params_register:
1613 mlxsw_core_fw_params_unregister(mlxsw_core);
1614 return err;
1615 }
1616
1617 static void mlxsw_core_params_unregister(struct mlxsw_core *mlxsw_core)
1618 {
1619 mlxsw_core_fw_params_unregister(mlxsw_core);
1620 if (mlxsw_core->driver->params_register)
1621 mlxsw_core->driver->params_unregister(mlxsw_core);
1622 }
1623
1624 struct mlxsw_core_health_event {
1625 struct mlxsw_core *mlxsw_core;
1626 char mfde_pl[MLXSW_REG_MFDE_LEN];
1627 struct work_struct work;
1628 };
1629
1630 static void mlxsw_core_health_event_work(struct work_struct *work)
1631 {
1632 struct mlxsw_core_health_event *event;
1633 struct mlxsw_core *mlxsw_core;
1634
1635 event = container_of(work, struct mlxsw_core_health_event, work);
1636 mlxsw_core = event->mlxsw_core;
1637 devlink_health_report(mlxsw_core->health.fw_fatal, "FW fatal event occurred",
1638 event->mfde_pl);
1639 kfree(event);
1640 }
1641
1642 static void mlxsw_core_health_listener_func(const struct mlxsw_reg_info *reg,
1643 char *mfde_pl, void *priv)
1644 {
1645 struct mlxsw_core_health_event *event;
1646 struct mlxsw_core *mlxsw_core = priv;
1647
1648 event = kmalloc(sizeof(*event), GFP_ATOMIC);
1649 if (!event)
1650 return;
1651 event->mlxsw_core = mlxsw_core;
1652 memcpy(event->mfde_pl, mfde_pl, sizeof(event->mfde_pl));
1653 INIT_WORK(&event->work, mlxsw_core_health_event_work);
1654 mlxsw_core_schedule_work(&event->work);
1655 }
1656
1657 static const struct mlxsw_listener mlxsw_core_health_listener =
1658 MLXSW_EVENTL(mlxsw_core_health_listener_func, MFDE, MFDE);
1659
1660 static int mlxsw_core_health_fw_fatal_dump(struct devlink_health_reporter *reporter,
1661 struct devlink_fmsg *fmsg, void *priv_ctx,
1662 struct netlink_ext_ack *extack)
1663 {
1664 char *mfde_pl = priv_ctx;
1665 char *val_str;
1666 u8 event_id;
1667 u32 val;
1668 int err;
1669
1670 if (!priv_ctx)
1671 /* User-triggered dumps are not possible */
1672 return -EOPNOTSUPP;
1673
1674 val = mlxsw_reg_mfde_irisc_id_get(mfde_pl);
1675 err = devlink_fmsg_u8_pair_put(fmsg, "irisc_id", val);
1676 if (err)
1677 return err;
1678 err = devlink_fmsg_arr_pair_nest_start(fmsg, "event");
1679 if (err)
1680 return err;
1681
1682 event_id = mlxsw_reg_mfde_event_id_get(mfde_pl);
1683 err = devlink_fmsg_u8_pair_put(fmsg, "id", event_id);
1684 if (err)
1685 return err;
1686 switch (event_id) {
1687 case MLXSW_REG_MFDE_EVENT_ID_CRSPACE_TO:
1688 val_str = "CR space timeout";
1689 break;
1690 case MLXSW_REG_MFDE_EVENT_ID_KVD_IM_STOP:
1691 val_str = "KVD insertion machine stopped";
1692 break;
1693 default:
1694 val_str = NULL;
1695 }
1696 if (val_str) {
1697 err = devlink_fmsg_string_pair_put(fmsg, "desc", val_str);
1698 if (err)
1699 return err;
1700 }
1701 err = devlink_fmsg_arr_pair_nest_end(fmsg);
1702 if (err)
1703 return err;
1704
1705 val = mlxsw_reg_mfde_method_get(mfde_pl);
1706 switch (val) {
1707 case MLXSW_REG_MFDE_METHOD_QUERY:
1708 val_str = "query";
1709 break;
1710 case MLXSW_REG_MFDE_METHOD_WRITE:
1711 val_str = "write";
1712 break;
1713 default:
1714 val_str = NULL;
1715 }
1716 if (val_str) {
1717 err = devlink_fmsg_string_pair_put(fmsg, "method", val_str);
1718 if (err)
1719 return err;
1720 }
1721
1722 val = mlxsw_reg_mfde_long_process_get(mfde_pl);
1723 err = devlink_fmsg_bool_pair_put(fmsg, "long_process", val);
1724 if (err)
1725 return err;
1726
1727 val = mlxsw_reg_mfde_command_type_get(mfde_pl);
1728 switch (val) {
1729 case MLXSW_REG_MFDE_COMMAND_TYPE_MAD:
1730 val_str = "mad";
1731 break;
1732 case MLXSW_REG_MFDE_COMMAND_TYPE_EMAD:
1733 val_str = "emad";
1734 break;
1735 case MLXSW_REG_MFDE_COMMAND_TYPE_CMDIF:
1736 val_str = "cmdif";
1737 break;
1738 default:
1739 val_str = NULL;
1740 }
1741 if (val_str) {
1742 err = devlink_fmsg_string_pair_put(fmsg, "command_type", val_str);
1743 if (err)
1744 return err;
1745 }
1746
1747 val = mlxsw_reg_mfde_reg_attr_id_get(mfde_pl);
1748 err = devlink_fmsg_u32_pair_put(fmsg, "reg_attr_id", val);
1749 if (err)
1750 return err;
1751
1752 if (event_id == MLXSW_REG_MFDE_EVENT_ID_CRSPACE_TO) {
1753 val = mlxsw_reg_mfde_log_address_get(mfde_pl);
1754 err = devlink_fmsg_u32_pair_put(fmsg, "log_address", val);
1755 if (err)
1756 return err;
1757 val = mlxsw_reg_mfde_log_id_get(mfde_pl);
1758 err = devlink_fmsg_u8_pair_put(fmsg, "log_irisc_id", val);
1759 if (err)
1760 return err;
1761 } else if (event_id == MLXSW_REG_MFDE_EVENT_ID_KVD_IM_STOP) {
1762 val = mlxsw_reg_mfde_pipes_mask_get(mfde_pl);
1763 err = devlink_fmsg_u32_pair_put(fmsg, "pipes_mask", val);
1764 if (err)
1765 return err;
1766 }
1767
1768 return 0;
1769 }
1770
1771 static int
1772 mlxsw_core_health_fw_fatal_test(struct devlink_health_reporter *reporter,
1773 struct netlink_ext_ack *extack)
1774 {
1775 struct mlxsw_core *mlxsw_core = devlink_health_reporter_priv(reporter);
1776 char mfgd_pl[MLXSW_REG_MFGD_LEN];
1777 int err;
1778
1779 /* Read the register first to make sure no other bits are changed. */
1780 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
1781 if (err)
1782 return err;
1783 mlxsw_reg_mfgd_trigger_test_set(mfgd_pl, true);
1784 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
1785 }
1786
1787 static const struct devlink_health_reporter_ops
1788 mlxsw_core_health_fw_fatal_ops = {
1789 .name = "fw_fatal",
1790 .dump = mlxsw_core_health_fw_fatal_dump,
1791 .test = mlxsw_core_health_fw_fatal_test,
1792 };
1793
1794 static int mlxsw_core_health_fw_fatal_config(struct mlxsw_core *mlxsw_core,
1795 bool enable)
1796 {
1797 char mfgd_pl[MLXSW_REG_MFGD_LEN];
1798 int err;
1799
1800 /* Read the register first to make sure no other bits are changed. */
1801 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
1802 if (err)
1803 return err;
1804 mlxsw_reg_mfgd_fatal_event_mode_set(mfgd_pl, enable);
1805 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl);
1806 }
1807
1808 static int mlxsw_core_health_init(struct mlxsw_core *mlxsw_core)
1809 {
1810 struct devlink *devlink = priv_to_devlink(mlxsw_core);
1811 struct devlink_health_reporter *fw_fatal;
1812 int err;
1813
1814 if (!mlxsw_core->driver->fw_fatal_enabled)
1815 return 0;
1816
1817 fw_fatal = devlink_health_reporter_create(devlink, &mlxsw_core_health_fw_fatal_ops,
1818 0, mlxsw_core);
1819 if (IS_ERR(fw_fatal)) {
1820 dev_err(mlxsw_core->bus_info->dev, "Failed to create fw fatal reporter");
1821 return PTR_ERR(fw_fatal);
1822 }
1823 mlxsw_core->health.fw_fatal = fw_fatal;
1824
1825 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core);
1826 if (err)
1827 goto err_trap_register;
1828
1829 err = mlxsw_core_health_fw_fatal_config(mlxsw_core, true);
1830 if (err)
1831 goto err_fw_fatal_config;
1832
1833 return 0;
1834
1835 err_fw_fatal_config:
1836 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core);
1837 err_trap_register:
1838 devlink_health_reporter_destroy(mlxsw_core->health.fw_fatal);
1839 return err;
1840 }
1841
1842 static void mlxsw_core_health_fini(struct mlxsw_core *mlxsw_core)
1843 {
1844 if (!mlxsw_core->driver->fw_fatal_enabled)
1845 return;
1846
1847 mlxsw_core_health_fw_fatal_config(mlxsw_core, false);
1848 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core);
1849 /* Make sure there is no more event work scheduled */
1850 mlxsw_core_flush_owq();
1851 devlink_health_reporter_destroy(mlxsw_core->health.fw_fatal);
1852 }
1853
1854 static int
1855 __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
1856 const struct mlxsw_bus *mlxsw_bus,
1857 void *bus_priv, bool reload,
1858 struct devlink *devlink,
1859 struct netlink_ext_ack *extack)
1860 {
1861 const char *device_kind = mlxsw_bus_info->device_kind;
1862 struct mlxsw_core *mlxsw_core;
1863 struct mlxsw_driver *mlxsw_driver;
1864 struct mlxsw_res *res;
1865 size_t alloc_size;
1866 int err;
1867
1868 mlxsw_driver = mlxsw_core_driver_get(device_kind);
1869 if (!mlxsw_driver)
1870 return -EINVAL;
1871
1872 if (!reload) {
1873 alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size;
1874 devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size);
1875 if (!devlink) {
1876 err = -ENOMEM;
1877 goto err_devlink_alloc;
1878 }
1879 }
1880
1881 mlxsw_core = devlink_priv(devlink);
1882 INIT_LIST_HEAD(&mlxsw_core->rx_listener_list);
1883 INIT_LIST_HEAD(&mlxsw_core->event_listener_list);
1884 mlxsw_core->driver = mlxsw_driver;
1885 mlxsw_core->bus = mlxsw_bus;
1886 mlxsw_core->bus_priv = bus_priv;
1887 mlxsw_core->bus_info = mlxsw_bus_info;
1888
1889 res = mlxsw_driver->res_query_enabled ? &mlxsw_core->res : NULL;
1890 err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, res);
1891 if (err)
1892 goto err_bus_init;
1893
1894 if (mlxsw_driver->resources_register && !reload) {
1895 err = mlxsw_driver->resources_register(mlxsw_core);
1896 if (err)
1897 goto err_register_resources;
1898 }
1899
1900 err = mlxsw_ports_init(mlxsw_core);
1901 if (err)
1902 goto err_ports_init;
1903
1904 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) &&
1905 MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) {
1906 alloc_size = sizeof(u8) *
1907 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) *
1908 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS);
1909 mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL);
1910 if (!mlxsw_core->lag.mapping) {
1911 err = -ENOMEM;
1912 goto err_alloc_lag_mapping;
1913 }
1914 }
1915
1916 err = mlxsw_emad_init(mlxsw_core);
1917 if (err)
1918 goto err_emad_init;
1919
1920 if (!reload) {
1921 err = devlink_register(devlink, mlxsw_bus_info->dev);
1922 if (err)
1923 goto err_devlink_register;
1924 }
1925
1926 if (!reload) {
1927 err = mlxsw_core_params_register(mlxsw_core);
1928 if (err)
1929 goto err_register_params;
1930 }
1931
1932 err = mlxsw_core_fw_rev_validate(mlxsw_core, mlxsw_bus_info, mlxsw_driver->fw_req_rev,
1933 mlxsw_driver->fw_filename);
1934 if (err)
1935 goto err_fw_rev_validate;
1936
1937 err = mlxsw_core_health_init(mlxsw_core);
1938 if (err)
1939 goto err_health_init;
1940
1941 if (mlxsw_driver->init) {
1942 err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info, extack);
1943 if (err)
1944 goto err_driver_init;
1945 }
1946
1947 err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon);
1948 if (err)
1949 goto err_hwmon_init;
1950
1951 err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info,
1952 &mlxsw_core->thermal);
1953 if (err)
1954 goto err_thermal_init;
1955
1956 err = mlxsw_env_init(mlxsw_core, &mlxsw_core->env);
1957 if (err)
1958 goto err_env_init;
1959
1960 mlxsw_core->is_initialized = true;
1961 devlink_params_publish(devlink);
1962
1963 if (!reload)
1964 devlink_reload_enable(devlink);
1965
1966 return 0;
1967
1968 err_env_init:
1969 mlxsw_thermal_fini(mlxsw_core->thermal);
1970 err_thermal_init:
1971 mlxsw_hwmon_fini(mlxsw_core->hwmon);
1972 err_hwmon_init:
1973 if (mlxsw_core->driver->fini)
1974 mlxsw_core->driver->fini(mlxsw_core);
1975 err_driver_init:
1976 mlxsw_core_health_fini(mlxsw_core);
1977 err_health_init:
1978 err_fw_rev_validate:
1979 if (!reload)
1980 mlxsw_core_params_unregister(mlxsw_core);
1981 err_register_params:
1982 if (!reload)
1983 devlink_unregister(devlink);
1984 err_devlink_register:
1985 mlxsw_emad_fini(mlxsw_core);
1986 err_emad_init:
1987 kfree(mlxsw_core->lag.mapping);
1988 err_alloc_lag_mapping:
1989 mlxsw_ports_fini(mlxsw_core);
1990 err_ports_init:
1991 if (!reload)
1992 devlink_resources_unregister(devlink, NULL);
1993 err_register_resources:
1994 mlxsw_bus->fini(bus_priv);
1995 err_bus_init:
1996 if (!reload)
1997 devlink_free(devlink);
1998 err_devlink_alloc:
1999 return err;
2000 }
2001
2002 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
2003 const struct mlxsw_bus *mlxsw_bus,
2004 void *bus_priv, bool reload,
2005 struct devlink *devlink,
2006 struct netlink_ext_ack *extack)
2007 {
2008 bool called_again = false;
2009 int err;
2010
2011 again:
2012 err = __mlxsw_core_bus_device_register(mlxsw_bus_info, mlxsw_bus,
2013 bus_priv, reload,
2014 devlink, extack);
2015 /* -EAGAIN is returned in case the FW was updated. FW needs
2016 * a reset, so lets try to call __mlxsw_core_bus_device_register()
2017 * again.
2018 */
2019 if (err == -EAGAIN && !called_again) {
2020 called_again = true;
2021 goto again;
2022 }
2023
2024 return err;
2025 }
2026 EXPORT_SYMBOL(mlxsw_core_bus_device_register);
2027
2028 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core,
2029 bool reload)
2030 {
2031 struct devlink *devlink = priv_to_devlink(mlxsw_core);
2032
2033 if (!reload)
2034 devlink_reload_disable(devlink);
2035 if (devlink_is_reload_failed(devlink)) {
2036 if (!reload)
2037 /* Only the parts that were not de-initialized in the
2038 * failed reload attempt need to be de-initialized.
2039 */
2040 goto reload_fail_deinit;
2041 else
2042 return;
2043 }
2044
2045 devlink_params_unpublish(devlink);
2046 mlxsw_core->is_initialized = false;
2047 mlxsw_env_fini(mlxsw_core->env);
2048 mlxsw_thermal_fini(mlxsw_core->thermal);
2049 mlxsw_hwmon_fini(mlxsw_core->hwmon);
2050 if (mlxsw_core->driver->fini)
2051 mlxsw_core->driver->fini(mlxsw_core);
2052 mlxsw_core_health_fini(mlxsw_core);
2053 if (!reload)
2054 mlxsw_core_params_unregister(mlxsw_core);
2055 if (!reload)
2056 devlink_unregister(devlink);
2057 mlxsw_emad_fini(mlxsw_core);
2058 kfree(mlxsw_core->lag.mapping);
2059 mlxsw_ports_fini(mlxsw_core);
2060 if (!reload)
2061 devlink_resources_unregister(devlink, NULL);
2062 mlxsw_core->bus->fini(mlxsw_core->bus_priv);
2063 if (!reload)
2064 devlink_free(devlink);
2065
2066 return;
2067
2068 reload_fail_deinit:
2069 mlxsw_core_params_unregister(mlxsw_core);
2070 devlink_unregister(devlink);
2071 devlink_resources_unregister(devlink, NULL);
2072 devlink_free(devlink);
2073 }
2074 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister);
2075
2076 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
2077 const struct mlxsw_tx_info *tx_info)
2078 {
2079 return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv,
2080 tx_info);
2081 }
2082 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy);
2083
2084 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
2085 const struct mlxsw_tx_info *tx_info)
2086 {
2087 return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb,
2088 tx_info);
2089 }
2090 EXPORT_SYMBOL(mlxsw_core_skb_transmit);
2091
2092 void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core,
2093 struct sk_buff *skb, u8 local_port)
2094 {
2095 if (mlxsw_core->driver->ptp_transmitted)
2096 mlxsw_core->driver->ptp_transmitted(mlxsw_core, skb,
2097 local_port);
2098 }
2099 EXPORT_SYMBOL(mlxsw_core_ptp_transmitted);
2100
2101 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a,
2102 const struct mlxsw_rx_listener *rxl_b)
2103 {
2104 return (rxl_a->func == rxl_b->func &&
2105 rxl_a->local_port == rxl_b->local_port &&
2106 rxl_a->trap_id == rxl_b->trap_id &&
2107 rxl_a->mirror_reason == rxl_b->mirror_reason);
2108 }
2109
2110 static struct mlxsw_rx_listener_item *
2111 __find_rx_listener_item(struct mlxsw_core *mlxsw_core,
2112 const struct mlxsw_rx_listener *rxl)
2113 {
2114 struct mlxsw_rx_listener_item *rxl_item;
2115
2116 list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) {
2117 if (__is_rx_listener_equal(&rxl_item->rxl, rxl))
2118 return rxl_item;
2119 }
2120 return NULL;
2121 }
2122
2123 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
2124 const struct mlxsw_rx_listener *rxl,
2125 void *priv, bool enabled)
2126 {
2127 struct mlxsw_rx_listener_item *rxl_item;
2128
2129 rxl_item = __find_rx_listener_item(mlxsw_core, rxl);
2130 if (rxl_item)
2131 return -EEXIST;
2132 rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL);
2133 if (!rxl_item)
2134 return -ENOMEM;
2135 rxl_item->rxl = *rxl;
2136 rxl_item->priv = priv;
2137 rxl_item->enabled = enabled;
2138
2139 list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list);
2140 return 0;
2141 }
2142 EXPORT_SYMBOL(mlxsw_core_rx_listener_register);
2143
2144 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
2145 const struct mlxsw_rx_listener *rxl)
2146 {
2147 struct mlxsw_rx_listener_item *rxl_item;
2148
2149 rxl_item = __find_rx_listener_item(mlxsw_core, rxl);
2150 if (!rxl_item)
2151 return;
2152 list_del_rcu(&rxl_item->list);
2153 synchronize_rcu();
2154 kfree(rxl_item);
2155 }
2156 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister);
2157
2158 static void
2159 mlxsw_core_rx_listener_state_set(struct mlxsw_core *mlxsw_core,
2160 const struct mlxsw_rx_listener *rxl,
2161 bool enabled)
2162 {
2163 struct mlxsw_rx_listener_item *rxl_item;
2164
2165 rxl_item = __find_rx_listener_item(mlxsw_core, rxl);
2166 if (WARN_ON(!rxl_item))
2167 return;
2168 rxl_item->enabled = enabled;
2169 }
2170
2171 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port,
2172 void *priv)
2173 {
2174 struct mlxsw_event_listener_item *event_listener_item = priv;
2175 struct mlxsw_core *mlxsw_core;
2176 struct mlxsw_reg_info reg;
2177 char *payload;
2178 char *reg_tlv;
2179 char *op_tlv;
2180
2181 mlxsw_core = event_listener_item->mlxsw_core;
2182 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0,
2183 skb->data, skb->len);
2184
2185 mlxsw_emad_tlv_parse(skb);
2186 op_tlv = mlxsw_emad_op_tlv(skb);
2187 reg_tlv = mlxsw_emad_reg_tlv(skb);
2188
2189 reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv);
2190 reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32);
2191 payload = mlxsw_emad_reg_payload(reg_tlv);
2192 event_listener_item->el.func(&reg, payload, event_listener_item->priv);
2193 dev_kfree_skb(skb);
2194 }
2195
2196 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a,
2197 const struct mlxsw_event_listener *el_b)
2198 {
2199 return (el_a->func == el_b->func &&
2200 el_a->trap_id == el_b->trap_id);
2201 }
2202
2203 static struct mlxsw_event_listener_item *
2204 __find_event_listener_item(struct mlxsw_core *mlxsw_core,
2205 const struct mlxsw_event_listener *el)
2206 {
2207 struct mlxsw_event_listener_item *el_item;
2208
2209 list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) {
2210 if (__is_event_listener_equal(&el_item->el, el))
2211 return el_item;
2212 }
2213 return NULL;
2214 }
2215
2216 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
2217 const struct mlxsw_event_listener *el,
2218 void *priv)
2219 {
2220 int err;
2221 struct mlxsw_event_listener_item *el_item;
2222 const struct mlxsw_rx_listener rxl = {
2223 .func = mlxsw_core_event_listener_func,
2224 .local_port = MLXSW_PORT_DONT_CARE,
2225 .trap_id = el->trap_id,
2226 };
2227
2228 el_item = __find_event_listener_item(mlxsw_core, el);
2229 if (el_item)
2230 return -EEXIST;
2231 el_item = kmalloc(sizeof(*el_item), GFP_KERNEL);
2232 if (!el_item)
2233 return -ENOMEM;
2234 el_item->mlxsw_core = mlxsw_core;
2235 el_item->el = *el;
2236 el_item->priv = priv;
2237
2238 err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item, true);
2239 if (err)
2240 goto err_rx_listener_register;
2241
2242 /* No reason to save item if we did not manage to register an RX
2243 * listener for it.
2244 */
2245 list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list);
2246
2247 return 0;
2248
2249 err_rx_listener_register:
2250 kfree(el_item);
2251 return err;
2252 }
2253 EXPORT_SYMBOL(mlxsw_core_event_listener_register);
2254
2255 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
2256 const struct mlxsw_event_listener *el)
2257 {
2258 struct mlxsw_event_listener_item *el_item;
2259 const struct mlxsw_rx_listener rxl = {
2260 .func = mlxsw_core_event_listener_func,
2261 .local_port = MLXSW_PORT_DONT_CARE,
2262 .trap_id = el->trap_id,
2263 };
2264
2265 el_item = __find_event_listener_item(mlxsw_core, el);
2266 if (!el_item)
2267 return;
2268 mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl);
2269 list_del(&el_item->list);
2270 kfree(el_item);
2271 }
2272 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister);
2273
2274 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core,
2275 const struct mlxsw_listener *listener,
2276 void *priv, bool enabled)
2277 {
2278 if (listener->is_event) {
2279 WARN_ON(!enabled);
2280 return mlxsw_core_event_listener_register(mlxsw_core,
2281 &listener->event_listener,
2282 priv);
2283 } else {
2284 return mlxsw_core_rx_listener_register(mlxsw_core,
2285 &listener->rx_listener,
2286 priv, enabled);
2287 }
2288 }
2289
2290 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core,
2291 const struct mlxsw_listener *listener,
2292 void *priv)
2293 {
2294 if (listener->is_event)
2295 mlxsw_core_event_listener_unregister(mlxsw_core,
2296 &listener->event_listener);
2297 else
2298 mlxsw_core_rx_listener_unregister(mlxsw_core,
2299 &listener->rx_listener);
2300 }
2301
2302 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
2303 const struct mlxsw_listener *listener, void *priv)
2304 {
2305 enum mlxsw_reg_htgt_trap_group trap_group;
2306 enum mlxsw_reg_hpkt_action action;
2307 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2308 int err;
2309
2310 err = mlxsw_core_listener_register(mlxsw_core, listener, priv,
2311 listener->enabled_on_register);
2312 if (err)
2313 return err;
2314
2315 action = listener->enabled_on_register ? listener->en_action :
2316 listener->dis_action;
2317 trap_group = listener->enabled_on_register ? listener->en_trap_group :
2318 listener->dis_trap_group;
2319 mlxsw_reg_hpkt_pack(hpkt_pl, action, listener->trap_id,
2320 trap_group, listener->is_ctrl);
2321 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
2322 if (err)
2323 goto err_trap_set;
2324
2325 return 0;
2326
2327 err_trap_set:
2328 mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
2329 return err;
2330 }
2331 EXPORT_SYMBOL(mlxsw_core_trap_register);
2332
2333 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
2334 const struct mlxsw_listener *listener,
2335 void *priv)
2336 {
2337 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2338
2339 if (!listener->is_event) {
2340 mlxsw_reg_hpkt_pack(hpkt_pl, listener->dis_action,
2341 listener->trap_id, listener->dis_trap_group,
2342 listener->is_ctrl);
2343 mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
2344 }
2345
2346 mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
2347 }
2348 EXPORT_SYMBOL(mlxsw_core_trap_unregister);
2349
2350 int mlxsw_core_trap_state_set(struct mlxsw_core *mlxsw_core,
2351 const struct mlxsw_listener *listener,
2352 bool enabled)
2353 {
2354 enum mlxsw_reg_htgt_trap_group trap_group;
2355 enum mlxsw_reg_hpkt_action action;
2356 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2357 int err;
2358
2359 /* Not supported for event listener */
2360 if (WARN_ON(listener->is_event))
2361 return -EINVAL;
2362
2363 action = enabled ? listener->en_action : listener->dis_action;
2364 trap_group = enabled ? listener->en_trap_group :
2365 listener->dis_trap_group;
2366 mlxsw_reg_hpkt_pack(hpkt_pl, action, listener->trap_id,
2367 trap_group, listener->is_ctrl);
2368 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
2369 if (err)
2370 return err;
2371
2372 mlxsw_core_rx_listener_state_set(mlxsw_core, &listener->rx_listener,
2373 enabled);
2374 return 0;
2375 }
2376 EXPORT_SYMBOL(mlxsw_core_trap_state_set);
2377
2378 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core)
2379 {
2380 return atomic64_inc_return(&mlxsw_core->emad.tid);
2381 }
2382
2383 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core,
2384 const struct mlxsw_reg_info *reg,
2385 char *payload,
2386 enum mlxsw_core_reg_access_type type,
2387 struct list_head *bulk_list,
2388 mlxsw_reg_trans_cb_t *cb,
2389 unsigned long cb_priv)
2390 {
2391 u64 tid = mlxsw_core_tid_get(mlxsw_core);
2392 struct mlxsw_reg_trans *trans;
2393 int err;
2394
2395 trans = kzalloc(sizeof(*trans), GFP_KERNEL);
2396 if (!trans)
2397 return -ENOMEM;
2398
2399 err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans,
2400 bulk_list, cb, cb_priv, tid);
2401 if (err) {
2402 kfree_rcu(trans, rcu);
2403 return err;
2404 }
2405 return 0;
2406 }
2407
2408 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
2409 const struct mlxsw_reg_info *reg, char *payload,
2410 struct list_head *bulk_list,
2411 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
2412 {
2413 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
2414 MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
2415 bulk_list, cb, cb_priv);
2416 }
2417 EXPORT_SYMBOL(mlxsw_reg_trans_query);
2418
2419 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
2420 const struct mlxsw_reg_info *reg, char *payload,
2421 struct list_head *bulk_list,
2422 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
2423 {
2424 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
2425 MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
2426 bulk_list, cb, cb_priv);
2427 }
2428 EXPORT_SYMBOL(mlxsw_reg_trans_write);
2429
2430 #define MLXSW_REG_TRANS_ERR_STRING_SIZE 256
2431
2432 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans)
2433 {
2434 char err_string[MLXSW_REG_TRANS_ERR_STRING_SIZE];
2435 struct mlxsw_core *mlxsw_core = trans->core;
2436 int err;
2437
2438 wait_for_completion(&trans->completion);
2439 cancel_delayed_work_sync(&trans->timeout_dw);
2440 err = trans->err;
2441
2442 if (trans->retries)
2443 dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n",
2444 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid);
2445 if (err) {
2446 dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n",
2447 trans->tid, trans->reg->id,
2448 mlxsw_reg_id_str(trans->reg->id),
2449 mlxsw_core_reg_access_type_str(trans->type),
2450 trans->emad_status,
2451 mlxsw_emad_op_tlv_status_str(trans->emad_status));
2452
2453 snprintf(err_string, MLXSW_REG_TRANS_ERR_STRING_SIZE,
2454 "(tid=%llx,reg_id=%x(%s)) %s (%s)\n", trans->tid,
2455 trans->reg->id, mlxsw_reg_id_str(trans->reg->id),
2456 mlxsw_emad_op_tlv_status_str(trans->emad_status),
2457 trans->emad_err_string ? trans->emad_err_string : "");
2458
2459 trace_devlink_hwerr(priv_to_devlink(mlxsw_core),
2460 trans->emad_status, err_string);
2461
2462 kfree(trans->emad_err_string);
2463 }
2464
2465 list_del(&trans->bulk_list);
2466 kfree_rcu(trans, rcu);
2467 return err;
2468 }
2469
2470 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list)
2471 {
2472 struct mlxsw_reg_trans *trans;
2473 struct mlxsw_reg_trans *tmp;
2474 int sum_err = 0;
2475 int err;
2476
2477 list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) {
2478 err = mlxsw_reg_trans_wait(trans);
2479 if (err && sum_err == 0)
2480 sum_err = err; /* first error to be returned */
2481 }
2482 return sum_err;
2483 }
2484 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait);
2485
2486 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core,
2487 const struct mlxsw_reg_info *reg,
2488 char *payload,
2489 enum mlxsw_core_reg_access_type type)
2490 {
2491 enum mlxsw_emad_op_tlv_status status;
2492 int err, n_retry;
2493 bool reset_ok;
2494 char *in_mbox, *out_mbox, *tmp;
2495
2496 dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n",
2497 reg->id, mlxsw_reg_id_str(reg->id),
2498 mlxsw_core_reg_access_type_str(type));
2499
2500 in_mbox = mlxsw_cmd_mbox_alloc();
2501 if (!in_mbox)
2502 return -ENOMEM;
2503
2504 out_mbox = mlxsw_cmd_mbox_alloc();
2505 if (!out_mbox) {
2506 err = -ENOMEM;
2507 goto free_in_mbox;
2508 }
2509
2510 mlxsw_emad_pack_op_tlv(in_mbox, reg, type,
2511 mlxsw_core_tid_get(mlxsw_core));
2512 tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
2513 mlxsw_emad_pack_reg_tlv(tmp, reg, payload);
2514
2515 /* There is a special treatment needed for MRSR (reset) register.
2516 * The command interface will return error after the command
2517 * is executed, so tell the lower layer to expect it
2518 * and cope accordingly.
2519 */
2520 reset_ok = reg->id == MLXSW_REG_MRSR_ID;
2521
2522 n_retry = 0;
2523 retry:
2524 err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox);
2525 if (!err) {
2526 err = mlxsw_emad_process_status(out_mbox, &status);
2527 if (err) {
2528 if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY)
2529 goto retry;
2530 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n",
2531 status, mlxsw_emad_op_tlv_status_str(status));
2532 }
2533 }
2534
2535 if (!err)
2536 memcpy(payload, mlxsw_emad_reg_payload_cmd(out_mbox),
2537 reg->len);
2538
2539 mlxsw_cmd_mbox_free(out_mbox);
2540 free_in_mbox:
2541 mlxsw_cmd_mbox_free(in_mbox);
2542 if (err)
2543 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n",
2544 reg->id, mlxsw_reg_id_str(reg->id),
2545 mlxsw_core_reg_access_type_str(type));
2546 return err;
2547 }
2548
2549 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core,
2550 char *payload, size_t payload_len,
2551 unsigned long cb_priv)
2552 {
2553 char *orig_payload = (char *) cb_priv;
2554
2555 memcpy(orig_payload, payload, payload_len);
2556 }
2557
2558 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core,
2559 const struct mlxsw_reg_info *reg,
2560 char *payload,
2561 enum mlxsw_core_reg_access_type type)
2562 {
2563 LIST_HEAD(bulk_list);
2564 int err;
2565
2566 /* During initialization EMAD interface is not available to us,
2567 * so we default to command interface. We switch to EMAD interface
2568 * after setting the appropriate traps.
2569 */
2570 if (!mlxsw_core->emad.use_emad)
2571 return mlxsw_core_reg_access_cmd(mlxsw_core, reg,
2572 payload, type);
2573
2574 err = mlxsw_core_reg_access_emad(mlxsw_core, reg,
2575 payload, type, &bulk_list,
2576 mlxsw_core_reg_access_cb,
2577 (unsigned long) payload);
2578 if (err)
2579 return err;
2580 return mlxsw_reg_trans_bulk_wait(&bulk_list);
2581 }
2582
2583 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
2584 const struct mlxsw_reg_info *reg, char *payload)
2585 {
2586 return mlxsw_core_reg_access(mlxsw_core, reg, payload,
2587 MLXSW_CORE_REG_ACCESS_TYPE_QUERY);
2588 }
2589 EXPORT_SYMBOL(mlxsw_reg_query);
2590
2591 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
2592 const struct mlxsw_reg_info *reg, char *payload)
2593 {
2594 return mlxsw_core_reg_access(mlxsw_core, reg, payload,
2595 MLXSW_CORE_REG_ACCESS_TYPE_WRITE);
2596 }
2597 EXPORT_SYMBOL(mlxsw_reg_write);
2598
2599 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
2600 struct mlxsw_rx_info *rx_info)
2601 {
2602 struct mlxsw_rx_listener_item *rxl_item;
2603 const struct mlxsw_rx_listener *rxl;
2604 u8 local_port;
2605 bool found = false;
2606
2607 if (rx_info->is_lag) {
2608 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n",
2609 __func__, rx_info->u.lag_id,
2610 rx_info->trap_id);
2611 /* Upper layer does not care if the skb came from LAG or not,
2612 * so just get the local_port for the lag port and push it up.
2613 */
2614 local_port = mlxsw_core_lag_mapping_get(mlxsw_core,
2615 rx_info->u.lag_id,
2616 rx_info->lag_port_index);
2617 } else {
2618 local_port = rx_info->u.sys_port;
2619 }
2620
2621 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n",
2622 __func__, local_port, rx_info->trap_id);
2623
2624 if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) ||
2625 (local_port >= mlxsw_core->max_ports))
2626 goto drop;
2627
2628 rcu_read_lock();
2629 list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) {
2630 rxl = &rxl_item->rxl;
2631 if ((rxl->local_port == MLXSW_PORT_DONT_CARE ||
2632 rxl->local_port == local_port) &&
2633 rxl->trap_id == rx_info->trap_id &&
2634 rxl->mirror_reason == rx_info->mirror_reason) {
2635 if (rxl_item->enabled)
2636 found = true;
2637 break;
2638 }
2639 }
2640 if (!found) {
2641 rcu_read_unlock();
2642 goto drop;
2643 }
2644
2645 rxl->func(skb, local_port, rxl_item->priv);
2646 rcu_read_unlock();
2647 return;
2648
2649 drop:
2650 dev_kfree_skb(skb);
2651 }
2652 EXPORT_SYMBOL(mlxsw_core_skb_receive);
2653
2654 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
2655 u16 lag_id, u8 port_index)
2656 {
2657 return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id +
2658 port_index;
2659 }
2660
2661 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
2662 u16 lag_id, u8 port_index, u8 local_port)
2663 {
2664 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
2665 lag_id, port_index);
2666
2667 mlxsw_core->lag.mapping[index] = local_port;
2668 }
2669 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set);
2670
2671 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
2672 u16 lag_id, u8 port_index)
2673 {
2674 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
2675 lag_id, port_index);
2676
2677 return mlxsw_core->lag.mapping[index];
2678 }
2679 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get);
2680
2681 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
2682 u16 lag_id, u8 local_port)
2683 {
2684 int i;
2685
2686 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) {
2687 int index = mlxsw_core_lag_mapping_index(mlxsw_core,
2688 lag_id, i);
2689
2690 if (mlxsw_core->lag.mapping[index] == local_port)
2691 mlxsw_core->lag.mapping[index] = 0;
2692 }
2693 }
2694 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear);
2695
2696 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
2697 enum mlxsw_res_id res_id)
2698 {
2699 return mlxsw_res_valid(&mlxsw_core->res, res_id);
2700 }
2701 EXPORT_SYMBOL(mlxsw_core_res_valid);
2702
2703 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
2704 enum mlxsw_res_id res_id)
2705 {
2706 return mlxsw_res_get(&mlxsw_core->res, res_id);
2707 }
2708 EXPORT_SYMBOL(mlxsw_core_res_get);
2709
2710 static int __mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port,
2711 enum devlink_port_flavour flavour,
2712 u32 port_number, bool split,
2713 u32 split_port_subnumber,
2714 bool splittable, u32 lanes,
2715 const unsigned char *switch_id,
2716 unsigned char switch_id_len)
2717 {
2718 struct devlink *devlink = priv_to_devlink(mlxsw_core);
2719 struct mlxsw_core_port *mlxsw_core_port =
2720 &mlxsw_core->ports[local_port];
2721 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2722 struct devlink_port_attrs attrs = {};
2723 int err;
2724
2725 attrs.split = split;
2726 attrs.lanes = lanes;
2727 attrs.splittable = splittable;
2728 attrs.flavour = flavour;
2729 attrs.phys.port_number = port_number;
2730 attrs.phys.split_subport_number = split_port_subnumber;
2731 memcpy(attrs.switch_id.id, switch_id, switch_id_len);
2732 attrs.switch_id.id_len = switch_id_len;
2733 mlxsw_core_port->local_port = local_port;
2734 devlink_port_attrs_set(devlink_port, &attrs);
2735 err = devlink_port_register(devlink, devlink_port, local_port);
2736 if (err)
2737 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
2738 return err;
2739 }
2740
2741 static void __mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port)
2742 {
2743 struct mlxsw_core_port *mlxsw_core_port =
2744 &mlxsw_core->ports[local_port];
2745 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2746
2747 devlink_port_unregister(devlink_port);
2748 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
2749 }
2750
2751 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port,
2752 u32 port_number, bool split,
2753 u32 split_port_subnumber,
2754 bool splittable, u32 lanes,
2755 const unsigned char *switch_id,
2756 unsigned char switch_id_len)
2757 {
2758 return __mlxsw_core_port_init(mlxsw_core, local_port,
2759 DEVLINK_PORT_FLAVOUR_PHYSICAL,
2760 port_number, split, split_port_subnumber,
2761 splittable, lanes,
2762 switch_id, switch_id_len);
2763 }
2764 EXPORT_SYMBOL(mlxsw_core_port_init);
2765
2766 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port)
2767 {
2768 __mlxsw_core_port_fini(mlxsw_core, local_port);
2769 }
2770 EXPORT_SYMBOL(mlxsw_core_port_fini);
2771
2772 int mlxsw_core_cpu_port_init(struct mlxsw_core *mlxsw_core,
2773 void *port_driver_priv,
2774 const unsigned char *switch_id,
2775 unsigned char switch_id_len)
2776 {
2777 struct mlxsw_core_port *mlxsw_core_port =
2778 &mlxsw_core->ports[MLXSW_PORT_CPU_PORT];
2779 int err;
2780
2781 err = __mlxsw_core_port_init(mlxsw_core, MLXSW_PORT_CPU_PORT,
2782 DEVLINK_PORT_FLAVOUR_CPU,
2783 0, false, 0, false, 0,
2784 switch_id, switch_id_len);
2785 if (err)
2786 return err;
2787
2788 mlxsw_core_port->port_driver_priv = port_driver_priv;
2789 return 0;
2790 }
2791 EXPORT_SYMBOL(mlxsw_core_cpu_port_init);
2792
2793 void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core)
2794 {
2795 __mlxsw_core_port_fini(mlxsw_core, MLXSW_PORT_CPU_PORT);
2796 }
2797 EXPORT_SYMBOL(mlxsw_core_cpu_port_fini);
2798
2799 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
2800 void *port_driver_priv, struct net_device *dev)
2801 {
2802 struct mlxsw_core_port *mlxsw_core_port =
2803 &mlxsw_core->ports[local_port];
2804 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2805
2806 mlxsw_core_port->port_driver_priv = port_driver_priv;
2807 devlink_port_type_eth_set(devlink_port, dev);
2808 }
2809 EXPORT_SYMBOL(mlxsw_core_port_eth_set);
2810
2811 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
2812 void *port_driver_priv)
2813 {
2814 struct mlxsw_core_port *mlxsw_core_port =
2815 &mlxsw_core->ports[local_port];
2816 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2817
2818 mlxsw_core_port->port_driver_priv = port_driver_priv;
2819 devlink_port_type_ib_set(devlink_port, NULL);
2820 }
2821 EXPORT_SYMBOL(mlxsw_core_port_ib_set);
2822
2823 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
2824 void *port_driver_priv)
2825 {
2826 struct mlxsw_core_port *mlxsw_core_port =
2827 &mlxsw_core->ports[local_port];
2828 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2829
2830 mlxsw_core_port->port_driver_priv = port_driver_priv;
2831 devlink_port_type_clear(devlink_port);
2832 }
2833 EXPORT_SYMBOL(mlxsw_core_port_clear);
2834
2835 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
2836 u8 local_port)
2837 {
2838 struct mlxsw_core_port *mlxsw_core_port =
2839 &mlxsw_core->ports[local_port];
2840 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2841
2842 return devlink_port->type;
2843 }
2844 EXPORT_SYMBOL(mlxsw_core_port_type_get);
2845
2846
2847 struct devlink_port *
2848 mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
2849 u8 local_port)
2850 {
2851 struct mlxsw_core_port *mlxsw_core_port =
2852 &mlxsw_core->ports[local_port];
2853 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
2854
2855 return devlink_port;
2856 }
2857 EXPORT_SYMBOL(mlxsw_core_port_devlink_port_get);
2858
2859 bool mlxsw_core_port_is_xm(const struct mlxsw_core *mlxsw_core, u8 local_port)
2860 {
2861 const struct mlxsw_bus_info *bus_info = mlxsw_core->bus_info;
2862 int i;
2863
2864 for (i = 0; i < bus_info->xm_local_ports_count; i++)
2865 if (bus_info->xm_local_ports[i] == local_port)
2866 return true;
2867 return false;
2868 }
2869 EXPORT_SYMBOL(mlxsw_core_port_is_xm);
2870
2871 struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core)
2872 {
2873 return mlxsw_core->env;
2874 }
2875
2876 bool mlxsw_core_is_initialized(const struct mlxsw_core *mlxsw_core)
2877 {
2878 return mlxsw_core->is_initialized;
2879 }
2880
2881 int mlxsw_core_module_max_width(struct mlxsw_core *mlxsw_core, u8 module)
2882 {
2883 enum mlxsw_reg_pmtm_module_type module_type;
2884 char pmtm_pl[MLXSW_REG_PMTM_LEN];
2885 int err;
2886
2887 mlxsw_reg_pmtm_pack(pmtm_pl, module);
2888 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(pmtm), pmtm_pl);
2889 if (err)
2890 return err;
2891 mlxsw_reg_pmtm_unpack(pmtm_pl, &module_type);
2892
2893 /* Here we need to get the module width according to the module type. */
2894
2895 switch (module_type) {
2896 case MLXSW_REG_PMTM_MODULE_TYPE_C2C8X:
2897 case MLXSW_REG_PMTM_MODULE_TYPE_QSFP_DD:
2898 case MLXSW_REG_PMTM_MODULE_TYPE_OSFP:
2899 return 8;
2900 case MLXSW_REG_PMTM_MODULE_TYPE_C2C4X:
2901 case MLXSW_REG_PMTM_MODULE_TYPE_BP_4X:
2902 case MLXSW_REG_PMTM_MODULE_TYPE_QSFP:
2903 return 4;
2904 case MLXSW_REG_PMTM_MODULE_TYPE_C2C2X:
2905 case MLXSW_REG_PMTM_MODULE_TYPE_BP_2X:
2906 case MLXSW_REG_PMTM_MODULE_TYPE_SFP_DD:
2907 case MLXSW_REG_PMTM_MODULE_TYPE_DSFP:
2908 return 2;
2909 case MLXSW_REG_PMTM_MODULE_TYPE_C2C1X:
2910 case MLXSW_REG_PMTM_MODULE_TYPE_BP_1X:
2911 case MLXSW_REG_PMTM_MODULE_TYPE_SFP:
2912 return 1;
2913 default:
2914 return -EINVAL;
2915 }
2916 }
2917 EXPORT_SYMBOL(mlxsw_core_module_max_width);
2918
2919 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core,
2920 const char *buf, size_t size)
2921 {
2922 __be32 *m = (__be32 *) buf;
2923 int i;
2924 int count = size / sizeof(__be32);
2925
2926 for (i = count - 1; i >= 0; i--)
2927 if (m[i])
2928 break;
2929 i++;
2930 count = i ? i : 1;
2931 for (i = 0; i < count; i += 4)
2932 dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n",
2933 i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]),
2934 be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3]));
2935 }
2936
2937 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod,
2938 u32 in_mod, bool out_mbox_direct, bool reset_ok,
2939 char *in_mbox, size_t in_mbox_size,
2940 char *out_mbox, size_t out_mbox_size)
2941 {
2942 u8 status;
2943 int err;
2944
2945 BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32));
2946 if (!mlxsw_core->bus->cmd_exec)
2947 return -EOPNOTSUPP;
2948
2949 dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
2950 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod);
2951 if (in_mbox) {
2952 dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n");
2953 mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size);
2954 }
2955
2956 err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode,
2957 opcode_mod, in_mod, out_mbox_direct,
2958 in_mbox, in_mbox_size,
2959 out_mbox, out_mbox_size, &status);
2960
2961 if (!err && out_mbox) {
2962 dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n");
2963 mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size);
2964 }
2965
2966 if (reset_ok && err == -EIO &&
2967 status == MLXSW_CMD_STATUS_RUNNING_RESET) {
2968 err = 0;
2969 } else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) {
2970 dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n",
2971 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
2972 in_mod, status, mlxsw_cmd_status_str(status));
2973 } else if (err == -ETIMEDOUT) {
2974 dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
2975 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
2976 in_mod);
2977 }
2978
2979 return err;
2980 }
2981 EXPORT_SYMBOL(mlxsw_cmd_exec);
2982
2983 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay)
2984 {
2985 return queue_delayed_work(mlxsw_wq, dwork, delay);
2986 }
2987 EXPORT_SYMBOL(mlxsw_core_schedule_dw);
2988
2989 bool mlxsw_core_schedule_work(struct work_struct *work)
2990 {
2991 return queue_work(mlxsw_owq, work);
2992 }
2993 EXPORT_SYMBOL(mlxsw_core_schedule_work);
2994
2995 void mlxsw_core_flush_owq(void)
2996 {
2997 flush_workqueue(mlxsw_owq);
2998 }
2999 EXPORT_SYMBOL(mlxsw_core_flush_owq);
3000
3001 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
3002 const struct mlxsw_config_profile *profile,
3003 u64 *p_single_size, u64 *p_double_size,
3004 u64 *p_linear_size)
3005 {
3006 struct mlxsw_driver *driver = mlxsw_core->driver;
3007
3008 if (!driver->kvd_sizes_get)
3009 return -EINVAL;
3010
3011 return driver->kvd_sizes_get(mlxsw_core, profile,
3012 p_single_size, p_double_size,
3013 p_linear_size);
3014 }
3015 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get);
3016
3017 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox,
3018 struct mlxsw_res *res)
3019 {
3020 int index, i;
3021 u64 data;
3022 u16 id;
3023 int err;
3024
3025 if (!res)
3026 return 0;
3027
3028 mlxsw_cmd_mbox_zero(mbox);
3029
3030 for (index = 0; index < MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES;
3031 index++) {
3032 err = mlxsw_cmd_query_resources(mlxsw_core, mbox, index);
3033 if (err)
3034 return err;
3035
3036 for (i = 0; i < MLXSW_CMD_QUERY_RESOURCES_PER_QUERY; i++) {
3037 id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i);
3038 data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i);
3039
3040 if (id == MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID)
3041 return 0;
3042
3043 mlxsw_res_parse(res, id, data);
3044 }
3045 }
3046
3047 /* If after MLXSW_RESOURCES_QUERY_MAX_QUERIES we still didn't get
3048 * MLXSW_RESOURCES_TABLE_END_ID, something went bad in the FW.
3049 */
3050 return -EIO;
3051 }
3052 EXPORT_SYMBOL(mlxsw_core_resources_query);
3053
3054 u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core)
3055 {
3056 return mlxsw_core->bus->read_frc_h(mlxsw_core->bus_priv);
3057 }
3058 EXPORT_SYMBOL(mlxsw_core_read_frc_h);
3059
3060 u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core)
3061 {
3062 return mlxsw_core->bus->read_frc_l(mlxsw_core->bus_priv);
3063 }
3064 EXPORT_SYMBOL(mlxsw_core_read_frc_l);
3065
3066 void mlxsw_core_emad_string_tlv_enable(struct mlxsw_core *mlxsw_core)
3067 {
3068 mlxsw_core->emad.enable_string_tlv = true;
3069 }
3070 EXPORT_SYMBOL(mlxsw_core_emad_string_tlv_enable);
3071
3072 static int __init mlxsw_core_module_init(void)
3073 {
3074 int err;
3075
3076 mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, 0, 0);
3077 if (!mlxsw_wq)
3078 return -ENOMEM;
3079 mlxsw_owq = alloc_ordered_workqueue("%s_ordered", 0,
3080 mlxsw_core_driver_name);
3081 if (!mlxsw_owq) {
3082 err = -ENOMEM;
3083 goto err_alloc_ordered_workqueue;
3084 }
3085 return 0;
3086
3087 err_alloc_ordered_workqueue:
3088 destroy_workqueue(mlxsw_wq);
3089 return err;
3090 }
3091
3092 static void __exit mlxsw_core_module_exit(void)
3093 {
3094 destroy_workqueue(mlxsw_owq);
3095 destroy_workqueue(mlxsw_wq);
3096 }
3097
3098 module_init(mlxsw_core_module_init);
3099 module_exit(mlxsw_core_module_exit);
3100
3101 MODULE_LICENSE("Dual BSD/GPL");
3102 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
3103 MODULE_DESCRIPTION("Mellanox switch device core driver");
Linux with added FPC-III support