1 // SPDX-License-Identifier: GPL-2.0-only
2 /* drivers/net/ethernet/micrel/ks8851.c
4 * Copyright 2009 Simtec Electronics
5 * http://www.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/interrupt.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
18 #include <linux/ethtool.h>
19 #include <linux/iopoll.h>
20 #include <linux/mii.h>
22 #include <linux/platform_device.h>
23 #include <linux/of_net.h>
27 static int msg_enable
;
29 #define BE3 0x8000 /* Byte Enable 3 */
30 #define BE2 0x4000 /* Byte Enable 2 */
31 #define BE1 0x2000 /* Byte Enable 1 */
32 #define BE0 0x1000 /* Byte Enable 0 */
35 * struct ks8851_net_par - KS8851 Parallel driver private data
36 * @ks8851: KS8851 driver common private data
37 * @lock: Lock to ensure that the device is not accessed when busy.
38 * @hw_addr : start address of data register.
39 * @hw_addr_cmd : start address of command register.
40 * @cmd_reg_cache : command register cached.
42 * The @lock ensures that the chip is protected when certain operations are
43 * in progress. When the read or write packet transfer is in progress, most
44 * of the chip registers are not accessible until the transfer is finished
45 * and the DMA has been de-asserted.
47 struct ks8851_net_par
{
48 struct ks8851_net ks8851
;
50 void __iomem
*hw_addr
;
51 void __iomem
*hw_addr_cmd
;
55 #define to_ks8851_par(ks) container_of((ks), struct ks8851_net_par, ks8851)
58 * ks8851_lock_par - register access lock
60 * @flags: Spinlock flags
62 * Claim chip register access lock
64 static void ks8851_lock_par(struct ks8851_net
*ks
, unsigned long *flags
)
66 struct ks8851_net_par
*ksp
= to_ks8851_par(ks
);
68 spin_lock_irqsave(&ksp
->lock
, *flags
);
72 * ks8851_unlock_par - register access unlock
74 * @flags: Spinlock flags
76 * Release chip register access lock
78 static void ks8851_unlock_par(struct ks8851_net
*ks
, unsigned long *flags
)
80 struct ks8851_net_par
*ksp
= to_ks8851_par(ks
);
82 spin_unlock_irqrestore(&ksp
->lock
, *flags
);
86 * ks_check_endian - Check whether endianness of the bus is correct
87 * @ks : The chip information
89 * The KS8851-16MLL EESK pin allows selecting the endianness of the 16bit
90 * bus. To maintain optimum performance, the bus endianness should be set
91 * such that it matches the endianness of the CPU.
93 static int ks_check_endian(struct ks8851_net
*ks
)
95 struct ks8851_net_par
*ksp
= to_ks8851_par(ks
);
99 * Read CIDER register first, however read it the "wrong" way around.
100 * If the endian strap on the KS8851-16MLL in incorrect and the chip
101 * is operating in different endianness than the CPU, then the meaning
102 * of BE[3:0] byte-enable bits is also swapped such that:
103 * BE[3,2,1,0] becomes BE[1,0,3,2]
105 * Luckily for us, the byte-enable bits are the top four MSbits of
106 * the address register and the CIDER register is at offset 0xc0.
107 * Hence, by reading address 0xc0c0, which is not impacted by endian
108 * swapping, we assert either BE[3:2] or BE[1:0] while reading the
111 * If the bus configuration is correct, reading 0xc0c0 asserts
112 * BE[3:2] and this read returns 0x0000, because to read register
113 * with bottom two LSbits of address set to 0, BE[1:0] must be
116 * If the bus configuration is NOT correct, reading 0xc0c0 asserts
117 * BE[1:0] and this read returns non-zero 0x8872 value.
119 iowrite16(BE3
| BE2
| KS_CIDER
, ksp
->hw_addr_cmd
);
120 cider
= ioread16(ksp
->hw_addr
);
124 netdev_err(ks
->netdev
, "incorrect EESK endian strap setting\n");
130 * ks8851_wrreg16_par - write 16bit register value to chip
131 * @ks: The chip state
132 * @reg: The register address
133 * @val: The value to write
135 * Issue a write to put the value @val into the register specified in @reg.
137 static void ks8851_wrreg16_par(struct ks8851_net
*ks
, unsigned int reg
,
140 struct ks8851_net_par
*ksp
= to_ks8851_par(ks
);
142 ksp
->cmd_reg_cache
= (u16
)reg
| ((BE1
| BE0
) << (reg
& 0x02));
143 iowrite16(ksp
->cmd_reg_cache
, ksp
->hw_addr_cmd
);
144 iowrite16(val
, ksp
->hw_addr
);
148 * ks8851_rdreg16_par - read 16 bit register from chip
149 * @ks: The chip information
150 * @reg: The register address
152 * Read a 16bit register from the chip, returning the result
154 static unsigned int ks8851_rdreg16_par(struct ks8851_net
*ks
, unsigned int reg
)
156 struct ks8851_net_par
*ksp
= to_ks8851_par(ks
);
158 ksp
->cmd_reg_cache
= (u16
)reg
| ((BE1
| BE0
) << (reg
& 0x02));
159 iowrite16(ksp
->cmd_reg_cache
, ksp
->hw_addr_cmd
);
160 return ioread16(ksp
->hw_addr
);
164 * ks8851_rdfifo_par - read data from the receive fifo
165 * @ks: The device state.
166 * @buff: The buffer address
167 * @len: The length of the data to read
169 * Issue an RXQ FIFO read command and read the @len amount of data from
170 * the FIFO into the buffer specified by @buff.
172 static void ks8851_rdfifo_par(struct ks8851_net
*ks
, u8
*buff
, unsigned int len
)
174 struct ks8851_net_par
*ksp
= to_ks8851_par(ks
);
176 netif_dbg(ks
, rx_status
, ks
->netdev
,
177 "%s: %d@%p\n", __func__
, len
, buff
);
179 ioread16_rep(ksp
->hw_addr
, (u16
*)buff
+ 1, len
/ 2);
183 * ks8851_wrfifo_par - write packet to TX FIFO
184 * @ks: The device state.
185 * @txp: The sk_buff to transmit.
186 * @irq: IRQ on completion of the packet.
188 * Send the @txp to the chip. This means creating the relevant packet header
189 * specifying the length of the packet and the other information the chip
190 * needs, such as IRQ on completion. Send the header and the packet data to
193 static void ks8851_wrfifo_par(struct ks8851_net
*ks
, struct sk_buff
*txp
,
196 struct ks8851_net_par
*ksp
= to_ks8851_par(ks
);
197 unsigned int len
= ALIGN(txp
->len
, 4);
198 unsigned int fid
= 0;
200 netif_dbg(ks
, tx_queued
, ks
->netdev
, "%s: skb %p, %d@%p, irq %d\n",
201 __func__
, txp
, txp
->len
, txp
->data
, irq
);
204 fid
&= TXFR_TXFID_MASK
;
207 fid
|= TXFR_TXIC
; /* irq on completion */
209 iowrite16(fid
, ksp
->hw_addr
);
210 iowrite16(txp
->len
, ksp
->hw_addr
);
212 iowrite16_rep(ksp
->hw_addr
, txp
->data
, len
/ 2);
216 * ks8851_rx_skb_par - receive skbuff
217 * @ks: The device state.
220 static void ks8851_rx_skb_par(struct ks8851_net
*ks
, struct sk_buff
*skb
)
225 static unsigned int ks8851_rdreg16_par_txqcr(struct ks8851_net
*ks
)
227 return ks8851_rdreg16_par(ks
, KS_TXQCR
);
231 * ks8851_start_xmit_par - transmit packet
232 * @skb: The buffer to transmit
233 * @dev: The device used to transmit the packet.
235 * Called by the network layer to transmit the @skb. Queue the packet for
236 * the device and schedule the necessary work to transmit the packet when
239 * We do this to firstly avoid sleeping with the network device locked,
240 * and secondly so we can round up more than one packet to transmit which
241 * means we can try and avoid generating too many transmit done interrupts.
243 static netdev_tx_t
ks8851_start_xmit_par(struct sk_buff
*skb
,
244 struct net_device
*dev
)
246 struct ks8851_net
*ks
= netdev_priv(dev
);
247 netdev_tx_t ret
= NETDEV_TX_OK
;
253 netif_dbg(ks
, tx_queued
, ks
->netdev
,
254 "%s: skb %p, %d@%p\n", __func__
, skb
, skb
->len
, skb
->data
);
256 ks8851_lock_par(ks
, &flags
);
258 txmir
= ks8851_rdreg16_par(ks
, KS_TXMIR
) & 0x1fff;
260 if (likely(txmir
>= skb
->len
+ 12)) {
261 ks8851_wrreg16_par(ks
, KS_RXQCR
, ks
->rc_rxqcr
| RXQCR_SDA
);
262 ks8851_wrfifo_par(ks
, skb
, false);
263 ks8851_wrreg16_par(ks
, KS_RXQCR
, ks
->rc_rxqcr
);
264 ks8851_wrreg16_par(ks
, KS_TXQCR
, TXQCR_METFE
);
266 err
= readx_poll_timeout_atomic(ks8851_rdreg16_par_txqcr
, ks
,
267 txqcr
, !(txqcr
& TXQCR_METFE
),
270 ret
= NETDEV_TX_BUSY
;
272 ks8851_done_tx(ks
, skb
);
274 ret
= NETDEV_TX_BUSY
;
277 ks8851_unlock_par(ks
, &flags
);
282 static int ks8851_probe_par(struct platform_device
*pdev
)
284 struct device
*dev
= &pdev
->dev
;
285 struct ks8851_net_par
*ksp
;
286 struct net_device
*netdev
;
287 struct ks8851_net
*ks
;
290 netdev
= devm_alloc_etherdev(dev
, sizeof(struct ks8851_net_par
));
294 ks
= netdev_priv(netdev
);
296 ks
->lock
= ks8851_lock_par
;
297 ks
->unlock
= ks8851_unlock_par
;
298 ks
->rdreg16
= ks8851_rdreg16_par
;
299 ks
->wrreg16
= ks8851_wrreg16_par
;
300 ks
->rdfifo
= ks8851_rdfifo_par
;
301 ks
->wrfifo
= ks8851_wrfifo_par
;
302 ks
->start_xmit
= ks8851_start_xmit_par
;
303 ks
->rx_skb
= ks8851_rx_skb_par
;
305 #define STD_IRQ (IRQ_LCI | /* Link Change */ \
306 IRQ_RXI | /* RX done */ \
307 IRQ_RXPSI) /* RX process stop */
308 ks
->rc_ier
= STD_IRQ
;
310 ksp
= to_ks8851_par(ks
);
311 spin_lock_init(&ksp
->lock
);
313 ksp
->hw_addr
= devm_platform_ioremap_resource(pdev
, 0);
314 if (IS_ERR(ksp
->hw_addr
))
315 return PTR_ERR(ksp
->hw_addr
);
317 ksp
->hw_addr_cmd
= devm_platform_ioremap_resource(pdev
, 1);
318 if (IS_ERR(ksp
->hw_addr_cmd
))
319 return PTR_ERR(ksp
->hw_addr_cmd
);
321 ret
= ks_check_endian(ks
);
325 netdev
->irq
= platform_get_irq(pdev
, 0);
327 return ks8851_probe_common(netdev
, dev
, msg_enable
);
330 static int ks8851_remove_par(struct platform_device
*pdev
)
332 return ks8851_remove_common(&pdev
->dev
);
335 static const struct of_device_id ks8851_match_table
[] = {
336 { .compatible
= "micrel,ks8851-mll" },
339 MODULE_DEVICE_TABLE(of
, ks8851_match_table
);
341 static struct platform_driver ks8851_driver
= {
344 .of_match_table
= ks8851_match_table
,
345 .pm
= &ks8851_pm_ops
,
347 .probe
= ks8851_probe_par
,
348 .remove
= ks8851_remove_par
,
350 module_platform_driver(ks8851_driver
);
352 MODULE_DESCRIPTION("KS8851 Network driver");
353 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
354 MODULE_LICENSE("GPL");
356 module_param_named(message
, msg_enable
, int, 0);
357 MODULE_PARM_DESC(message
, "Message verbosity level (0=none, 31=all)");