WIP FPC-III support
[linux/fpc-iii.git] / drivers / net / ethernet / mscc / ocelot_io.c
blob0acb459484185a1b238e4f5f6332b118c9c2419c
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Microsemi Ocelot Switch driver
5 * Copyright (c) 2017 Microsemi Corporation
6 */
7 #include <linux/io.h>
8 #include <linux/kernel.h>
9 #include <linux/platform_device.h>
11 #include "ocelot.h"
13 u32 __ocelot_read_ix(struct ocelot *ocelot, u32 reg, u32 offset)
15 u16 target = reg >> TARGET_OFFSET;
16 u32 val;
18 WARN_ON(!target);
20 regmap_read(ocelot->targets[target],
21 ocelot->map[target][reg & REG_MASK] + offset, &val);
22 return val;
24 EXPORT_SYMBOL(__ocelot_read_ix);
26 void __ocelot_write_ix(struct ocelot *ocelot, u32 val, u32 reg, u32 offset)
28 u16 target = reg >> TARGET_OFFSET;
30 WARN_ON(!target);
32 regmap_write(ocelot->targets[target],
33 ocelot->map[target][reg & REG_MASK] + offset, val);
35 EXPORT_SYMBOL(__ocelot_write_ix);
37 void __ocelot_rmw_ix(struct ocelot *ocelot, u32 val, u32 mask, u32 reg,
38 u32 offset)
40 u16 target = reg >> TARGET_OFFSET;
42 WARN_ON(!target);
44 regmap_update_bits(ocelot->targets[target],
45 ocelot->map[target][reg & REG_MASK] + offset,
46 mask, val);
48 EXPORT_SYMBOL(__ocelot_rmw_ix);
50 u32 ocelot_port_readl(struct ocelot_port *port, u32 reg)
52 struct ocelot *ocelot = port->ocelot;
53 u16 target = reg >> TARGET_OFFSET;
54 u32 val;
56 WARN_ON(!target);
58 regmap_read(port->target, ocelot->map[target][reg & REG_MASK], &val);
59 return val;
61 EXPORT_SYMBOL(ocelot_port_readl);
63 void ocelot_port_writel(struct ocelot_port *port, u32 val, u32 reg)
65 struct ocelot *ocelot = port->ocelot;
66 u16 target = reg >> TARGET_OFFSET;
68 WARN_ON(!target);
70 regmap_write(port->target, ocelot->map[target][reg & REG_MASK], val);
72 EXPORT_SYMBOL(ocelot_port_writel);
74 u32 __ocelot_target_read_ix(struct ocelot *ocelot, enum ocelot_target target,
75 u32 reg, u32 offset)
77 u32 val;
79 regmap_read(ocelot->targets[target],
80 ocelot->map[target][reg] + offset, &val);
81 return val;
84 void __ocelot_target_write_ix(struct ocelot *ocelot, enum ocelot_target target,
85 u32 val, u32 reg, u32 offset)
87 regmap_write(ocelot->targets[target],
88 ocelot->map[target][reg] + offset, val);
91 int ocelot_regfields_init(struct ocelot *ocelot,
92 const struct reg_field *const regfields)
94 unsigned int i;
95 u16 target;
97 for (i = 0; i < REGFIELD_MAX; i++) {
98 struct reg_field regfield = {};
99 u32 reg = regfields[i].reg;
101 if (!reg)
102 continue;
104 target = regfields[i].reg >> TARGET_OFFSET;
106 regfield.reg = ocelot->map[target][reg & REG_MASK];
107 regfield.lsb = regfields[i].lsb;
108 regfield.msb = regfields[i].msb;
109 regfield.id_size = regfields[i].id_size;
110 regfield.id_offset = regfields[i].id_offset;
112 ocelot->regfields[i] =
113 devm_regmap_field_alloc(ocelot->dev,
114 ocelot->targets[target],
115 regfield);
117 if (IS_ERR(ocelot->regfields[i]))
118 return PTR_ERR(ocelot->regfields[i]);
121 return 0;
123 EXPORT_SYMBOL(ocelot_regfields_init);
125 static struct regmap_config ocelot_regmap_config = {
126 .reg_bits = 32,
127 .val_bits = 32,
128 .reg_stride = 4,
131 struct regmap *ocelot_regmap_init(struct ocelot *ocelot, struct resource *res)
133 void __iomem *regs;
135 regs = devm_ioremap_resource(ocelot->dev, res);
136 if (IS_ERR(regs))
137 return ERR_CAST(regs);
139 ocelot_regmap_config.name = res->name;
141 return devm_regmap_init_mmio(ocelot->dev, regs, &ocelot_regmap_config);
143 EXPORT_SYMBOL(ocelot_regmap_init);