3 * Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc.
4 * Copyright (c) 2014, I2SE GmbH
6 * Permission to use, copy, modify, and/or distribute this software
7 * for any purpose with or without fee is hereby granted, provided
8 * that the above copyright notice and this permission notice appear
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
12 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
13 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL
14 * THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
15 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
16 * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
17 * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
18 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22 /* This module implements the Qualcomm Atheros SPI protocol for
23 * kernel-based SPI device.
26 #include <linux/kernel.h>
27 #include <linux/netdevice.h>
28 #include <linux/spi/spi.h>
33 qcaspi_spi_error(struct qcaspi
*qca
)
35 if (qca
->sync
!= QCASPI_SYNC_READY
)
38 netdev_err(qca
->net_dev
, "spi error\n");
39 qca
->sync
= QCASPI_SYNC_UNKNOWN
;
44 qcaspi_read_register(struct qcaspi
*qca
, u16 reg
, u16
*result
)
48 struct spi_transfer transfer
[2];
49 struct spi_message msg
;
52 memset(transfer
, 0, sizeof(transfer
));
54 spi_message_init(&msg
);
56 tx_data
= cpu_to_be16(QCA7K_SPI_READ
| QCA7K_SPI_INTERNAL
| reg
);
59 transfer
[0].tx_buf
= &tx_data
;
60 transfer
[0].len
= QCASPI_CMD_LEN
;
61 transfer
[1].rx_buf
= &rx_data
;
62 transfer
[1].len
= QCASPI_CMD_LEN
;
64 spi_message_add_tail(&transfer
[0], &msg
);
66 if (qca
->legacy_mode
) {
67 spi_sync(qca
->spi_dev
, &msg
);
68 spi_message_init(&msg
);
70 spi_message_add_tail(&transfer
[1], &msg
);
71 ret
= spi_sync(qca
->spi_dev
, &msg
);
77 qcaspi_spi_error(qca
);
79 *result
= be16_to_cpu(rx_data
);
85 __qcaspi_write_register(struct qcaspi
*qca
, u16 reg
, u16 value
)
88 struct spi_transfer transfer
[2];
89 struct spi_message msg
;
92 memset(&transfer
, 0, sizeof(transfer
));
94 spi_message_init(&msg
);
96 tx_data
[0] = cpu_to_be16(QCA7K_SPI_WRITE
| QCA7K_SPI_INTERNAL
| reg
);
97 tx_data
[1] = cpu_to_be16(value
);
99 transfer
[0].tx_buf
= &tx_data
[0];
100 transfer
[0].len
= QCASPI_CMD_LEN
;
101 transfer
[1].tx_buf
= &tx_data
[1];
102 transfer
[1].len
= QCASPI_CMD_LEN
;
104 spi_message_add_tail(&transfer
[0], &msg
);
105 if (qca
->legacy_mode
) {
106 spi_sync(qca
->spi_dev
, &msg
);
107 spi_message_init(&msg
);
109 spi_message_add_tail(&transfer
[1], &msg
);
110 ret
= spi_sync(qca
->spi_dev
, &msg
);
116 qcaspi_spi_error(qca
);
122 qcaspi_write_register(struct qcaspi
*qca
, u16 reg
, u16 value
, int retry
)
128 ret
= __qcaspi_write_register(qca
, reg
, value
);
135 ret
= qcaspi_read_register(qca
, reg
, &confirmed
);
139 ret
= confirmed
!= value
;
144 qca
->stats
.write_verify_failed
++;
146 } while (i
<= retry
);