drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /* 10G controller driver for Samsung SoCs
   3  *
   4  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * Author: Siva Reddy Kallam <siva.kallam@samsung.com>
   8  */
   9 #ifndef __SXGBE_DMA_H__
  10 #define __SXGBE_DMA_H__
  11
  12 /* forward declaration */
  13 struct sxgbe_extra_stats;
  14
  15 #define SXGBE_DMA_BLENMAP_LSHIFT        1
  16 #define SXGBE_DMA_TXPBL_LSHIFT          16
  17 #define SXGBE_DMA_RXPBL_LSHIFT          16
  18 #define DEFAULT_DMA_PBL                 8
  19
  20 struct sxgbe_dma_ops {
  21         /* DMA core initialization */
  22         int (*init)(void __iomem *ioaddr, int fix_burst, int burst_map);
  23         void (*cha_init)(void __iomem *ioaddr, int cha_num, int fix_burst,
  24                          int pbl, dma_addr_t dma_tx, dma_addr_t dma_rx,
  25                          int t_rzie, int r_rsize);
  26         void (*enable_dma_transmission)(void __iomem *ioaddr, int dma_cnum);
  27         void (*enable_dma_irq)(void __iomem *ioaddr, int dma_cnum);
  28         void (*disable_dma_irq)(void __iomem *ioaddr, int dma_cnum);
  29         void (*start_tx)(void __iomem *ioaddr, int tchannels);
  30         void (*start_tx_queue)(void __iomem *ioaddr, int dma_cnum);
  31         void (*stop_tx)(void __iomem *ioaddr, int tchannels);
  32         void (*stop_tx_queue)(void __iomem *ioaddr, int dma_cnum);
  33         void (*start_rx)(void __iomem *ioaddr, int rchannels);
  34         void (*stop_rx)(void __iomem *ioaddr, int rchannels);
  35         int (*tx_dma_int_status)(void __iomem *ioaddr, int channel_no,
  36                                  struct sxgbe_extra_stats *x);
  37         int (*rx_dma_int_status)(void __iomem *ioaddr, int channel_no,
  38                                  struct sxgbe_extra_stats *x);
  39         /* Program the HW RX Watchdog */
  40         void (*rx_watchdog)(void __iomem *ioaddr, u32 riwt);
  41         /* Enable TSO for each DMA channel */
  42         void (*enable_tso)(void __iomem *ioaddr, u8 chan_num);
  43 };
  44
  45 const struct sxgbe_dma_ops *sxgbe_get_dma_ops(void);
  46
  47 #endif /* __SXGBE_CORE_H__ */