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WIP FPC-III support
[linux/fpc-iii.git] / drivers / net / ethernet / stmicro / stmmac / stmmac_ethtool.c
blob9e54f953634b7d7656b46cfece6e357e4c5b6cf9
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*******************************************************************************
3 STMMAC Ethtool support
4
5 Copyright (C) 2007-2009 STMicroelectronics Ltd
6
7
8 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
9 *******************************************************************************/
10
11 #include <linux/etherdevice.h>
12 #include <linux/ethtool.h>
13 #include <linux/interrupt.h>
14 #include <linux/mii.h>
15 #include <linux/phylink.h>
16 #include <linux/net_tstamp.h>
17 #include <asm/io.h>
18
19 #include "stmmac.h"
20 #include "dwmac_dma.h"
21 #include "dwxgmac2.h"
22
23 #define REG_SPACE_SIZE 0x1060
24 #define MAC100_ETHTOOL_NAME "st_mac100"
25 #define GMAC_ETHTOOL_NAME "st_gmac"
26 #define XGMAC_ETHTOOL_NAME "st_xgmac"
27
28 #define ETHTOOL_DMA_OFFSET 55
29
30 struct stmmac_stats {
31 char stat_string[ETH_GSTRING_LEN];
32 int sizeof_stat;
33 int stat_offset;
34 };
35
36 #define STMMAC_STAT(m) \
37 { #m, sizeof_field(struct stmmac_extra_stats, m), \
38 offsetof(struct stmmac_priv, xstats.m)}
39
40 static const struct stmmac_stats stmmac_gstrings_stats[] = {
41 /* Transmit errors */
42 STMMAC_STAT(tx_underflow),
43 STMMAC_STAT(tx_carrier),
44 STMMAC_STAT(tx_losscarrier),
45 STMMAC_STAT(vlan_tag),
46 STMMAC_STAT(tx_deferred),
47 STMMAC_STAT(tx_vlan),
48 STMMAC_STAT(tx_jabber),
49 STMMAC_STAT(tx_frame_flushed),
50 STMMAC_STAT(tx_payload_error),
51 STMMAC_STAT(tx_ip_header_error),
52 /* Receive errors */
53 STMMAC_STAT(rx_desc),
54 STMMAC_STAT(sa_filter_fail),
55 STMMAC_STAT(overflow_error),
56 STMMAC_STAT(ipc_csum_error),
57 STMMAC_STAT(rx_collision),
58 STMMAC_STAT(rx_crc_errors),
59 STMMAC_STAT(dribbling_bit),
60 STMMAC_STAT(rx_length),
61 STMMAC_STAT(rx_mii),
62 STMMAC_STAT(rx_multicast),
63 STMMAC_STAT(rx_gmac_overflow),
64 STMMAC_STAT(rx_watchdog),
65 STMMAC_STAT(da_rx_filter_fail),
66 STMMAC_STAT(sa_rx_filter_fail),
67 STMMAC_STAT(rx_missed_cntr),
68 STMMAC_STAT(rx_overflow_cntr),
69 STMMAC_STAT(rx_vlan),
70 STMMAC_STAT(rx_split_hdr_pkt_n),
71 /* Tx/Rx IRQ error info */
72 STMMAC_STAT(tx_undeflow_irq),
73 STMMAC_STAT(tx_process_stopped_irq),
74 STMMAC_STAT(tx_jabber_irq),
75 STMMAC_STAT(rx_overflow_irq),
76 STMMAC_STAT(rx_buf_unav_irq),
77 STMMAC_STAT(rx_process_stopped_irq),
78 STMMAC_STAT(rx_watchdog_irq),
79 STMMAC_STAT(tx_early_irq),
80 STMMAC_STAT(fatal_bus_error_irq),
81 /* Tx/Rx IRQ Events */
82 STMMAC_STAT(rx_early_irq),
83 STMMAC_STAT(threshold),
84 STMMAC_STAT(tx_pkt_n),
85 STMMAC_STAT(rx_pkt_n),
86 STMMAC_STAT(normal_irq_n),
87 STMMAC_STAT(rx_normal_irq_n),
88 STMMAC_STAT(napi_poll),
89 STMMAC_STAT(tx_normal_irq_n),
90 STMMAC_STAT(tx_clean),
91 STMMAC_STAT(tx_set_ic_bit),
92 STMMAC_STAT(irq_receive_pmt_irq_n),
93 /* MMC info */
94 STMMAC_STAT(mmc_tx_irq_n),
95 STMMAC_STAT(mmc_rx_irq_n),
96 STMMAC_STAT(mmc_rx_csum_offload_irq_n),
97 /* EEE */
98 STMMAC_STAT(irq_tx_path_in_lpi_mode_n),
99 STMMAC_STAT(irq_tx_path_exit_lpi_mode_n),
100 STMMAC_STAT(irq_rx_path_in_lpi_mode_n),
101 STMMAC_STAT(irq_rx_path_exit_lpi_mode_n),
102 STMMAC_STAT(phy_eee_wakeup_error_n),
103 /* Extended RDES status */
104 STMMAC_STAT(ip_hdr_err),
105 STMMAC_STAT(ip_payload_err),
106 STMMAC_STAT(ip_csum_bypassed),
107 STMMAC_STAT(ipv4_pkt_rcvd),
108 STMMAC_STAT(ipv6_pkt_rcvd),
109 STMMAC_STAT(no_ptp_rx_msg_type_ext),
110 STMMAC_STAT(ptp_rx_msg_type_sync),
111 STMMAC_STAT(ptp_rx_msg_type_follow_up),
112 STMMAC_STAT(ptp_rx_msg_type_delay_req),
113 STMMAC_STAT(ptp_rx_msg_type_delay_resp),
114 STMMAC_STAT(ptp_rx_msg_type_pdelay_req),
115 STMMAC_STAT(ptp_rx_msg_type_pdelay_resp),
116 STMMAC_STAT(ptp_rx_msg_type_pdelay_follow_up),
117 STMMAC_STAT(ptp_rx_msg_type_announce),
118 STMMAC_STAT(ptp_rx_msg_type_management),
119 STMMAC_STAT(ptp_rx_msg_pkt_reserved_type),
120 STMMAC_STAT(ptp_frame_type),
121 STMMAC_STAT(ptp_ver),
122 STMMAC_STAT(timestamp_dropped),
123 STMMAC_STAT(av_pkt_rcvd),
124 STMMAC_STAT(av_tagged_pkt_rcvd),
125 STMMAC_STAT(vlan_tag_priority_val),
126 STMMAC_STAT(l3_filter_match),
127 STMMAC_STAT(l4_filter_match),
128 STMMAC_STAT(l3_l4_filter_no_match),
129 /* PCS */
130 STMMAC_STAT(irq_pcs_ane_n),
131 STMMAC_STAT(irq_pcs_link_n),
132 STMMAC_STAT(irq_rgmii_n),
133 /* DEBUG */
134 STMMAC_STAT(mtl_tx_status_fifo_full),
135 STMMAC_STAT(mtl_tx_fifo_not_empty),
136 STMMAC_STAT(mmtl_fifo_ctrl),
137 STMMAC_STAT(mtl_tx_fifo_read_ctrl_write),
138 STMMAC_STAT(mtl_tx_fifo_read_ctrl_wait),
139 STMMAC_STAT(mtl_tx_fifo_read_ctrl_read),
140 STMMAC_STAT(mtl_tx_fifo_read_ctrl_idle),
141 STMMAC_STAT(mac_tx_in_pause),
142 STMMAC_STAT(mac_tx_frame_ctrl_xfer),
143 STMMAC_STAT(mac_tx_frame_ctrl_idle),
144 STMMAC_STAT(mac_tx_frame_ctrl_wait),
145 STMMAC_STAT(mac_tx_frame_ctrl_pause),
146 STMMAC_STAT(mac_gmii_tx_proto_engine),
147 STMMAC_STAT(mtl_rx_fifo_fill_level_full),
148 STMMAC_STAT(mtl_rx_fifo_fill_above_thresh),
149 STMMAC_STAT(mtl_rx_fifo_fill_below_thresh),
150 STMMAC_STAT(mtl_rx_fifo_fill_level_empty),
151 STMMAC_STAT(mtl_rx_fifo_read_ctrl_flush),
152 STMMAC_STAT(mtl_rx_fifo_read_ctrl_read_data),
153 STMMAC_STAT(mtl_rx_fifo_read_ctrl_status),
154 STMMAC_STAT(mtl_rx_fifo_read_ctrl_idle),
155 STMMAC_STAT(mtl_rx_fifo_ctrl_active),
156 STMMAC_STAT(mac_rx_frame_ctrl_fifo),
157 STMMAC_STAT(mac_gmii_rx_proto_engine),
158 /* TSO */
159 STMMAC_STAT(tx_tso_frames),
160 STMMAC_STAT(tx_tso_nfrags),
161 };
162 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
163
164 /* HW MAC Management counters (if supported) */
165 #define STMMAC_MMC_STAT(m) \
166 { #m, sizeof_field(struct stmmac_counters, m), \
167 offsetof(struct stmmac_priv, mmc.m)}
168
169 static const struct stmmac_stats stmmac_mmc[] = {
170 STMMAC_MMC_STAT(mmc_tx_octetcount_gb),
171 STMMAC_MMC_STAT(mmc_tx_framecount_gb),
172 STMMAC_MMC_STAT(mmc_tx_broadcastframe_g),
173 STMMAC_MMC_STAT(mmc_tx_multicastframe_g),
174 STMMAC_MMC_STAT(mmc_tx_64_octets_gb),
175 STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb),
176 STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb),
177 STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb),
178 STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb),
179 STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb),
180 STMMAC_MMC_STAT(mmc_tx_unicast_gb),
181 STMMAC_MMC_STAT(mmc_tx_multicast_gb),
182 STMMAC_MMC_STAT(mmc_tx_broadcast_gb),
183 STMMAC_MMC_STAT(mmc_tx_underflow_error),
184 STMMAC_MMC_STAT(mmc_tx_singlecol_g),
185 STMMAC_MMC_STAT(mmc_tx_multicol_g),
186 STMMAC_MMC_STAT(mmc_tx_deferred),
187 STMMAC_MMC_STAT(mmc_tx_latecol),
188 STMMAC_MMC_STAT(mmc_tx_exesscol),
189 STMMAC_MMC_STAT(mmc_tx_carrier_error),
190 STMMAC_MMC_STAT(mmc_tx_octetcount_g),
191 STMMAC_MMC_STAT(mmc_tx_framecount_g),
192 STMMAC_MMC_STAT(mmc_tx_excessdef),
193 STMMAC_MMC_STAT(mmc_tx_pause_frame),
194 STMMAC_MMC_STAT(mmc_tx_vlan_frame_g),
195 STMMAC_MMC_STAT(mmc_rx_framecount_gb),
196 STMMAC_MMC_STAT(mmc_rx_octetcount_gb),
197 STMMAC_MMC_STAT(mmc_rx_octetcount_g),
198 STMMAC_MMC_STAT(mmc_rx_broadcastframe_g),
199 STMMAC_MMC_STAT(mmc_rx_multicastframe_g),
200 STMMAC_MMC_STAT(mmc_rx_crc_error),
201 STMMAC_MMC_STAT(mmc_rx_align_error),
202 STMMAC_MMC_STAT(mmc_rx_run_error),
203 STMMAC_MMC_STAT(mmc_rx_jabber_error),
204 STMMAC_MMC_STAT(mmc_rx_undersize_g),
205 STMMAC_MMC_STAT(mmc_rx_oversize_g),
206 STMMAC_MMC_STAT(mmc_rx_64_octets_gb),
207 STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb),
208 STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb),
209 STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb),
210 STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb),
211 STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb),
212 STMMAC_MMC_STAT(mmc_rx_unicast_g),
213 STMMAC_MMC_STAT(mmc_rx_length_error),
214 STMMAC_MMC_STAT(mmc_rx_autofrangetype),
215 STMMAC_MMC_STAT(mmc_rx_pause_frames),
216 STMMAC_MMC_STAT(mmc_rx_fifo_overflow),
217 STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb),
218 STMMAC_MMC_STAT(mmc_rx_watchdog_error),
219 STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask),
220 STMMAC_MMC_STAT(mmc_rx_ipc_intr),
221 STMMAC_MMC_STAT(mmc_rx_ipv4_gd),
222 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr),
223 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay),
224 STMMAC_MMC_STAT(mmc_rx_ipv4_frag),
225 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl),
226 STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets),
227 STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets),
228 STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets),
229 STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets),
230 STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets),
231 STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets),
232 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets),
233 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets),
234 STMMAC_MMC_STAT(mmc_rx_ipv6_gd),
235 STMMAC_MMC_STAT(mmc_rx_ipv6_hderr),
236 STMMAC_MMC_STAT(mmc_rx_ipv6_nopay),
237 STMMAC_MMC_STAT(mmc_rx_udp_gd),
238 STMMAC_MMC_STAT(mmc_rx_udp_err),
239 STMMAC_MMC_STAT(mmc_rx_tcp_gd),
240 STMMAC_MMC_STAT(mmc_rx_tcp_err),
241 STMMAC_MMC_STAT(mmc_rx_icmp_gd),
242 STMMAC_MMC_STAT(mmc_rx_icmp_err),
243 STMMAC_MMC_STAT(mmc_rx_udp_gd_octets),
244 STMMAC_MMC_STAT(mmc_rx_udp_err_octets),
245 STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets),
246 STMMAC_MMC_STAT(mmc_rx_tcp_err_octets),
247 STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets),
248 STMMAC_MMC_STAT(mmc_rx_icmp_err_octets),
249 STMMAC_MMC_STAT(mmc_tx_fpe_fragment_cntr),
250 STMMAC_MMC_STAT(mmc_tx_hold_req_cntr),
251 STMMAC_MMC_STAT(mmc_rx_packet_assembly_err_cntr),
252 STMMAC_MMC_STAT(mmc_rx_packet_smd_err_cntr),
253 STMMAC_MMC_STAT(mmc_rx_packet_assembly_ok_cntr),
254 STMMAC_MMC_STAT(mmc_rx_fpe_fragment_cntr),
255 };
256 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc)
257
258 static void stmmac_ethtool_getdrvinfo(struct net_device *dev,
259 struct ethtool_drvinfo *info)
260 {
261 struct stmmac_priv *priv = netdev_priv(dev);
262
263 if (priv->plat->has_gmac || priv->plat->has_gmac4)
264 strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver));
265 else if (priv->plat->has_xgmac)
266 strlcpy(info->driver, XGMAC_ETHTOOL_NAME, sizeof(info->driver));
267 else
268 strlcpy(info->driver, MAC100_ETHTOOL_NAME,
269 sizeof(info->driver));
270
271 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
272 }
273
274 static int stmmac_ethtool_get_link_ksettings(struct net_device *dev,
275 struct ethtool_link_ksettings *cmd)
276 {
277 struct stmmac_priv *priv = netdev_priv(dev);
278
279 if (priv->hw->pcs & STMMAC_PCS_RGMII ||
280 priv->hw->pcs & STMMAC_PCS_SGMII) {
281 struct rgmii_adv adv;
282 u32 supported, advertising, lp_advertising;
283
284 if (!priv->xstats.pcs_link) {
285 cmd->base.speed = SPEED_UNKNOWN;
286 cmd->base.duplex = DUPLEX_UNKNOWN;
287 return 0;
288 }
289 cmd->base.duplex = priv->xstats.pcs_duplex;
290
291 cmd->base.speed = priv->xstats.pcs_speed;
292
293 /* Get and convert ADV/LP_ADV from the HW AN registers */
294 if (stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv))
295 return -EOPNOTSUPP; /* should never happen indeed */
296
297 /* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */
298
299 ethtool_convert_link_mode_to_legacy_u32(
300 &supported, cmd->link_modes.supported);
301 ethtool_convert_link_mode_to_legacy_u32(
302 &advertising, cmd->link_modes.advertising);
303 ethtool_convert_link_mode_to_legacy_u32(
304 &lp_advertising, cmd->link_modes.lp_advertising);
305
306 if (adv.pause & STMMAC_PCS_PAUSE)
307 advertising |= ADVERTISED_Pause;
308 if (adv.pause & STMMAC_PCS_ASYM_PAUSE)
309 advertising |= ADVERTISED_Asym_Pause;
310 if (adv.lp_pause & STMMAC_PCS_PAUSE)
311 lp_advertising |= ADVERTISED_Pause;
312 if (adv.lp_pause & STMMAC_PCS_ASYM_PAUSE)
313 lp_advertising |= ADVERTISED_Asym_Pause;
314
315 /* Reg49[3] always set because ANE is always supported */
316 cmd->base.autoneg = ADVERTISED_Autoneg;
317 supported |= SUPPORTED_Autoneg;
318 advertising |= ADVERTISED_Autoneg;
319 lp_advertising |= ADVERTISED_Autoneg;
320
321 if (adv.duplex) {
322 supported |= (SUPPORTED_1000baseT_Full |
323 SUPPORTED_100baseT_Full |
324 SUPPORTED_10baseT_Full);
325 advertising |= (ADVERTISED_1000baseT_Full |
326 ADVERTISED_100baseT_Full |
327 ADVERTISED_10baseT_Full);
328 } else {
329 supported |= (SUPPORTED_1000baseT_Half |
330 SUPPORTED_100baseT_Half |
331 SUPPORTED_10baseT_Half);
332 advertising |= (ADVERTISED_1000baseT_Half |
333 ADVERTISED_100baseT_Half |
334 ADVERTISED_10baseT_Half);
335 }
336 if (adv.lp_duplex)
337 lp_advertising |= (ADVERTISED_1000baseT_Full |
338 ADVERTISED_100baseT_Full |
339 ADVERTISED_10baseT_Full);
340 else
341 lp_advertising |= (ADVERTISED_1000baseT_Half |
342 ADVERTISED_100baseT_Half |
343 ADVERTISED_10baseT_Half);
344 cmd->base.port = PORT_OTHER;
345
346 ethtool_convert_legacy_u32_to_link_mode(
347 cmd->link_modes.supported, supported);
348 ethtool_convert_legacy_u32_to_link_mode(
349 cmd->link_modes.advertising, advertising);
350 ethtool_convert_legacy_u32_to_link_mode(
351 cmd->link_modes.lp_advertising, lp_advertising);
352
353 return 0;
354 }
355
356 return phylink_ethtool_ksettings_get(priv->phylink, cmd);
357 }
358
359 static int
360 stmmac_ethtool_set_link_ksettings(struct net_device *dev,
361 const struct ethtool_link_ksettings *cmd)
362 {
363 struct stmmac_priv *priv = netdev_priv(dev);
364
365 if (priv->hw->pcs & STMMAC_PCS_RGMII ||
366 priv->hw->pcs & STMMAC_PCS_SGMII) {
367 u32 mask = ADVERTISED_Autoneg | ADVERTISED_Pause;
368
369 /* Only support ANE */
370 if (cmd->base.autoneg != AUTONEG_ENABLE)
371 return -EINVAL;
372
373 mask &= (ADVERTISED_1000baseT_Half |
374 ADVERTISED_1000baseT_Full |
375 ADVERTISED_100baseT_Half |
376 ADVERTISED_100baseT_Full |
377 ADVERTISED_10baseT_Half |
378 ADVERTISED_10baseT_Full);
379
380 mutex_lock(&priv->lock);
381 stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, priv->hw->ps, 0);
382 mutex_unlock(&priv->lock);
383
384 return 0;
385 }
386
387 return phylink_ethtool_ksettings_set(priv->phylink, cmd);
388 }
389
390 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev)
391 {
392 struct stmmac_priv *priv = netdev_priv(dev);
393 return priv->msg_enable;
394 }
395
396 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level)
397 {
398 struct stmmac_priv *priv = netdev_priv(dev);
399 priv->msg_enable = level;
400
401 }
402
403 static int stmmac_check_if_running(struct net_device *dev)
404 {
405 if (!netif_running(dev))
406 return -EBUSY;
407 return 0;
408 }
409
410 static int stmmac_ethtool_get_regs_len(struct net_device *dev)
411 {
412 struct stmmac_priv *priv = netdev_priv(dev);
413
414 if (priv->plat->has_xgmac)
415 return XGMAC_REGSIZE * 4;
416 return REG_SPACE_SIZE;
417 }
418
419 static void stmmac_ethtool_gregs(struct net_device *dev,
420 struct ethtool_regs *regs, void *space)
421 {
422 struct stmmac_priv *priv = netdev_priv(dev);
423 u32 *reg_space = (u32 *) space;
424
425 stmmac_dump_mac_regs(priv, priv->hw, reg_space);
426 stmmac_dump_dma_regs(priv, priv->ioaddr, reg_space);
427
428 if (!priv->plat->has_xgmac) {
429 /* Copy DMA registers to where ethtool expects them */
430 memcpy(&reg_space[ETHTOOL_DMA_OFFSET],
431 &reg_space[DMA_BUS_MODE / 4],
432 NUM_DWMAC1000_DMA_REGS * 4);
433 }
434 }
435
436 static int stmmac_nway_reset(struct net_device *dev)
437 {
438 struct stmmac_priv *priv = netdev_priv(dev);
439
440 return phylink_ethtool_nway_reset(priv->phylink);
441 }
442
443 static void stmmac_get_ringparam(struct net_device *netdev,
444 struct ethtool_ringparam *ring)
445 {
446 struct stmmac_priv *priv = netdev_priv(netdev);
447
448 ring->rx_max_pending = DMA_MAX_RX_SIZE;
449 ring->tx_max_pending = DMA_MAX_TX_SIZE;
450 ring->rx_pending = priv->dma_rx_size;
451 ring->tx_pending = priv->dma_tx_size;
452 }
453
454 static int stmmac_set_ringparam(struct net_device *netdev,
455 struct ethtool_ringparam *ring)
456 {
457 if (ring->rx_mini_pending || ring->rx_jumbo_pending ||
458 ring->rx_pending < DMA_MIN_RX_SIZE ||
459 ring->rx_pending > DMA_MAX_RX_SIZE ||
460 !is_power_of_2(ring->rx_pending) ||
461 ring->tx_pending < DMA_MIN_TX_SIZE ||
462 ring->tx_pending > DMA_MAX_TX_SIZE ||
463 !is_power_of_2(ring->tx_pending))
464 return -EINVAL;
465
466 return stmmac_reinit_ringparam(netdev, ring->rx_pending,
467 ring->tx_pending);
468 }
469
470 static void
471 stmmac_get_pauseparam(struct net_device *netdev,
472 struct ethtool_pauseparam *pause)
473 {
474 struct stmmac_priv *priv = netdev_priv(netdev);
475 struct rgmii_adv adv_lp;
476
477 if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) {
478 pause->autoneg = 1;
479 if (!adv_lp.pause)
480 return;
481 } else {
482 phylink_ethtool_get_pauseparam(priv->phylink, pause);
483 }
484 }
485
486 static int
487 stmmac_set_pauseparam(struct net_device *netdev,
488 struct ethtool_pauseparam *pause)
489 {
490 struct stmmac_priv *priv = netdev_priv(netdev);
491 struct rgmii_adv adv_lp;
492
493 if (priv->hw->pcs && !stmmac_pcs_get_adv_lp(priv, priv->ioaddr, &adv_lp)) {
494 pause->autoneg = 1;
495 if (!adv_lp.pause)
496 return -EOPNOTSUPP;
497 return 0;
498 } else {
499 return phylink_ethtool_set_pauseparam(priv->phylink, pause);
500 }
501 }
502
503 static void stmmac_get_ethtool_stats(struct net_device *dev,
504 struct ethtool_stats *dummy, u64 *data)
505 {
506 struct stmmac_priv *priv = netdev_priv(dev);
507 u32 rx_queues_count = priv->plat->rx_queues_to_use;
508 u32 tx_queues_count = priv->plat->tx_queues_to_use;
509 unsigned long count;
510 int i, j = 0, ret;
511
512 if (priv->dma_cap.asp) {
513 for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
514 if (!stmmac_safety_feat_dump(priv, &priv->sstats, i,
515 &count, NULL))
516 data[j++] = count;
517 }
518 }
519
520 /* Update the DMA HW counters for dwmac10/100 */
521 ret = stmmac_dma_diagnostic_fr(priv, &dev->stats, (void *) &priv->xstats,
522 priv->ioaddr);
523 if (ret) {
524 /* If supported, for new GMAC chips expose the MMC counters */
525 if (priv->dma_cap.rmon) {
526 stmmac_mmc_read(priv, priv->mmcaddr, &priv->mmc);
527
528 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
529 char *p;
530 p = (char *)priv + stmmac_mmc[i].stat_offset;
531
532 data[j++] = (stmmac_mmc[i].sizeof_stat ==
533 sizeof(u64)) ? (*(u64 *)p) :
534 (*(u32 *)p);
535 }
536 }
537 if (priv->eee_enabled) {
538 int val = phylink_get_eee_err(priv->phylink);
539 if (val)
540 priv->xstats.phy_eee_wakeup_error_n = val;
541 }
542
543 if (priv->synopsys_id >= DWMAC_CORE_3_50)
544 stmmac_mac_debug(priv, priv->ioaddr,
545 (void *)&priv->xstats,
546 rx_queues_count, tx_queues_count);
547 }
548 for (i = 0; i < STMMAC_STATS_LEN; i++) {
549 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;
550 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat ==
551 sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p);
552 }
553 }
554
555 static int stmmac_get_sset_count(struct net_device *netdev, int sset)
556 {
557 struct stmmac_priv *priv = netdev_priv(netdev);
558 int i, len, safety_len = 0;
559
560 switch (sset) {
561 case ETH_SS_STATS:
562 len = STMMAC_STATS_LEN;
563
564 if (priv->dma_cap.rmon)
565 len += STMMAC_MMC_STATS_LEN;
566 if (priv->dma_cap.asp) {
567 for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
568 if (!stmmac_safety_feat_dump(priv,
569 &priv->sstats, i,
570 NULL, NULL))
571 safety_len++;
572 }
573
574 len += safety_len;
575 }
576
577 return len;
578 case ETH_SS_TEST:
579 return stmmac_selftest_get_count(priv);
580 default:
581 return -EOPNOTSUPP;
582 }
583 }
584
585 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data)
586 {
587 int i;
588 u8 *p = data;
589 struct stmmac_priv *priv = netdev_priv(dev);
590
591 switch (stringset) {
592 case ETH_SS_STATS:
593 if (priv->dma_cap.asp) {
594 for (i = 0; i < STMMAC_SAFETY_FEAT_SIZE; i++) {
595 const char *desc;
596 if (!stmmac_safety_feat_dump(priv,
597 &priv->sstats, i,
598 NULL, &desc)) {
599 memcpy(p, desc, ETH_GSTRING_LEN);
600 p += ETH_GSTRING_LEN;
601 }
602 }
603 }
604 if (priv->dma_cap.rmon)
605 for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
606 memcpy(p, stmmac_mmc[i].stat_string,
607 ETH_GSTRING_LEN);
608 p += ETH_GSTRING_LEN;
609 }
610 for (i = 0; i < STMMAC_STATS_LEN; i++) {
611 memcpy(p, stmmac_gstrings_stats[i].stat_string,
612 ETH_GSTRING_LEN);
613 p += ETH_GSTRING_LEN;
614 }
615 break;
616 case ETH_SS_TEST:
617 stmmac_selftest_get_strings(priv, p);
618 break;
619 default:
620 WARN_ON(1);
621 break;
622 }
623 }
624
625 /* Currently only support WOL through Magic packet. */
626 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
627 {
628 struct stmmac_priv *priv = netdev_priv(dev);
629
630 if (!priv->plat->pmt)
631 return phylink_ethtool_get_wol(priv->phylink, wol);
632
633 mutex_lock(&priv->lock);
634 if (device_can_wakeup(priv->device)) {
635 wol->supported = WAKE_MAGIC | WAKE_UCAST;
636 if (priv->hw_cap_support && !priv->dma_cap.pmt_magic_frame)
637 wol->supported &= ~WAKE_MAGIC;
638 wol->wolopts = priv->wolopts;
639 }
640 mutex_unlock(&priv->lock);
641 }
642
643 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
644 {
645 struct stmmac_priv *priv = netdev_priv(dev);
646 u32 support = WAKE_MAGIC | WAKE_UCAST;
647
648 if (!device_can_wakeup(priv->device))
649 return -EOPNOTSUPP;
650
651 if (!priv->plat->pmt) {
652 int ret = phylink_ethtool_set_wol(priv->phylink, wol);
653
654 if (!ret)
655 device_set_wakeup_enable(priv->device, !!wol->wolopts);
656 return ret;
657 }
658
659 /* By default almost all GMAC devices support the WoL via
660 * magic frame but we can disable it if the HW capability
661 * register shows no support for pmt_magic_frame. */
662 if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame))
663 wol->wolopts &= ~WAKE_MAGIC;
664
665 if (wol->wolopts & ~support)
666 return -EINVAL;
667
668 if (wol->wolopts) {
669 pr_info("stmmac: wakeup enable\n");
670 device_set_wakeup_enable(priv->device, 1);
671 enable_irq_wake(priv->wol_irq);
672 } else {
673 device_set_wakeup_enable(priv->device, 0);
674 disable_irq_wake(priv->wol_irq);
675 }
676
677 mutex_lock(&priv->lock);
678 priv->wolopts = wol->wolopts;
679 mutex_unlock(&priv->lock);
680
681 return 0;
682 }
683
684 static int stmmac_ethtool_op_get_eee(struct net_device *dev,
685 struct ethtool_eee *edata)
686 {
687 struct stmmac_priv *priv = netdev_priv(dev);
688
689 if (!priv->dma_cap.eee)
690 return -EOPNOTSUPP;
691
692 edata->eee_enabled = priv->eee_enabled;
693 edata->eee_active = priv->eee_active;
694 edata->tx_lpi_timer = priv->tx_lpi_timer;
695 edata->tx_lpi_enabled = priv->tx_lpi_enabled;
696
697 return phylink_ethtool_get_eee(priv->phylink, edata);
698 }
699
700 static int stmmac_ethtool_op_set_eee(struct net_device *dev,
701 struct ethtool_eee *edata)
702 {
703 struct stmmac_priv *priv = netdev_priv(dev);
704 int ret;
705
706 if (!priv->dma_cap.eee)
707 return -EOPNOTSUPP;
708
709 if (priv->tx_lpi_enabled != edata->tx_lpi_enabled)
710 netdev_warn(priv->dev,
711 "Setting EEE tx-lpi is not supported\n");
712
713 if (!edata->eee_enabled)
714 stmmac_disable_eee_mode(priv);
715
716 ret = phylink_ethtool_set_eee(priv->phylink, edata);
717 if (ret)
718 return ret;
719
720 if (edata->eee_enabled &&
721 priv->tx_lpi_timer != edata->tx_lpi_timer) {
722 priv->tx_lpi_timer = edata->tx_lpi_timer;
723 stmmac_eee_init(priv);
724 }
725
726 return 0;
727 }
728
729 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
730 {
731 unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
732
733 if (!clk) {
734 clk = priv->plat->clk_ref_rate;
735 if (!clk)
736 return 0;
737 }
738
739 return (usec * (clk / 1000000)) / 256;
740 }
741
742 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv)
743 {
744 unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
745
746 if (!clk) {
747 clk = priv->plat->clk_ref_rate;
748 if (!clk)
749 return 0;
750 }
751
752 return (riwt * 256) / (clk / 1000000);
753 }
754
755 static int stmmac_get_coalesce(struct net_device *dev,
756 struct ethtool_coalesce *ec)
757 {
758 struct stmmac_priv *priv = netdev_priv(dev);
759
760 ec->tx_coalesce_usecs = priv->tx_coal_timer;
761 ec->tx_max_coalesced_frames = priv->tx_coal_frames;
762
763 if (priv->use_riwt) {
764 ec->rx_max_coalesced_frames = priv->rx_coal_frames;
765 ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt, priv);
766 }
767
768 return 0;
769 }
770
771 static int stmmac_set_coalesce(struct net_device *dev,
772 struct ethtool_coalesce *ec)
773 {
774 struct stmmac_priv *priv = netdev_priv(dev);
775 u32 rx_cnt = priv->plat->rx_queues_to_use;
776 unsigned int rx_riwt;
777
778 if (priv->use_riwt && (ec->rx_coalesce_usecs > 0)) {
779 rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv);
780
781 if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT))
782 return -EINVAL;
783
784 priv->rx_riwt = rx_riwt;
785 stmmac_rx_watchdog(priv, priv->ioaddr, priv->rx_riwt, rx_cnt);
786 }
787
788 if ((ec->tx_coalesce_usecs == 0) &&
789 (ec->tx_max_coalesced_frames == 0))
790 return -EINVAL;
791
792 if ((ec->tx_coalesce_usecs > STMMAC_MAX_COAL_TX_TICK) ||
793 (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES))
794 return -EINVAL;
795
796 /* Only copy relevant parameters, ignore all others. */
797 priv->tx_coal_frames = ec->tx_max_coalesced_frames;
798 priv->tx_coal_timer = ec->tx_coalesce_usecs;
799 priv->rx_coal_frames = ec->rx_max_coalesced_frames;
800 return 0;
801 }
802
803 static int stmmac_get_rxnfc(struct net_device *dev,
804 struct ethtool_rxnfc *rxnfc, u32 *rule_locs)
805 {
806 struct stmmac_priv *priv = netdev_priv(dev);
807
808 switch (rxnfc->cmd) {
809 case ETHTOOL_GRXRINGS:
810 rxnfc->data = priv->plat->rx_queues_to_use;
811 break;
812 default:
813 return -EOPNOTSUPP;
814 }
815
816 return 0;
817 }
818
819 static u32 stmmac_get_rxfh_key_size(struct net_device *dev)
820 {
821 struct stmmac_priv *priv = netdev_priv(dev);
822
823 return sizeof(priv->rss.key);
824 }
825
826 static u32 stmmac_get_rxfh_indir_size(struct net_device *dev)
827 {
828 struct stmmac_priv *priv = netdev_priv(dev);
829
830 return ARRAY_SIZE(priv->rss.table);
831 }
832
833 static int stmmac_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
834 u8 *hfunc)
835 {
836 struct stmmac_priv *priv = netdev_priv(dev);
837 int i;
838
839 if (indir) {
840 for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
841 indir[i] = priv->rss.table[i];
842 }
843
844 if (key)
845 memcpy(key, priv->rss.key, sizeof(priv->rss.key));
846 if (hfunc)
847 *hfunc = ETH_RSS_HASH_TOP;
848
849 return 0;
850 }
851
852 static int stmmac_set_rxfh(struct net_device *dev, const u32 *indir,
853 const u8 *key, const u8 hfunc)
854 {
855 struct stmmac_priv *priv = netdev_priv(dev);
856 int i;
857
858 if ((hfunc != ETH_RSS_HASH_NO_CHANGE) && (hfunc != ETH_RSS_HASH_TOP))
859 return -EOPNOTSUPP;
860
861 if (indir) {
862 for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
863 priv->rss.table[i] = indir[i];
864 }
865
866 if (key)
867 memcpy(priv->rss.key, key, sizeof(priv->rss.key));
868
869 return stmmac_rss_configure(priv, priv->hw, &priv->rss,
870 priv->plat->rx_queues_to_use);
871 }
872
873 static void stmmac_get_channels(struct net_device *dev,
874 struct ethtool_channels *chan)
875 {
876 struct stmmac_priv *priv = netdev_priv(dev);
877
878 chan->rx_count = priv->plat->rx_queues_to_use;
879 chan->tx_count = priv->plat->tx_queues_to_use;
880 chan->max_rx = priv->dma_cap.number_rx_queues;
881 chan->max_tx = priv->dma_cap.number_tx_queues;
882 }
883
884 static int stmmac_set_channels(struct net_device *dev,
885 struct ethtool_channels *chan)
886 {
887 struct stmmac_priv *priv = netdev_priv(dev);
888
889 if (chan->rx_count > priv->dma_cap.number_rx_queues ||
890 chan->tx_count > priv->dma_cap.number_tx_queues ||
891 !chan->rx_count || !chan->tx_count)
892 return -EINVAL;
893
894 return stmmac_reinit_queues(dev, chan->rx_count, chan->tx_count);
895 }
896
897 static int stmmac_get_ts_info(struct net_device *dev,
898 struct ethtool_ts_info *info)
899 {
900 struct stmmac_priv *priv = netdev_priv(dev);
901
902 if ((priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) {
903
904 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
905 SOF_TIMESTAMPING_TX_HARDWARE |
906 SOF_TIMESTAMPING_RX_SOFTWARE |
907 SOF_TIMESTAMPING_RX_HARDWARE |
908 SOF_TIMESTAMPING_SOFTWARE |
909 SOF_TIMESTAMPING_RAW_HARDWARE;
910
911 if (priv->ptp_clock)
912 info->phc_index = ptp_clock_index(priv->ptp_clock);
913
914 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
915
916 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
917 (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
918 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
919 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
920 (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
921 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
922 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
923 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
924 (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
925 (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
926 (1 << HWTSTAMP_FILTER_ALL));
927 return 0;
928 } else
929 return ethtool_op_get_ts_info(dev, info);
930 }
931
932 static int stmmac_get_tunable(struct net_device *dev,
933 const struct ethtool_tunable *tuna, void *data)
934 {
935 struct stmmac_priv *priv = netdev_priv(dev);
936 int ret = 0;
937
938 switch (tuna->id) {
939 case ETHTOOL_RX_COPYBREAK:
940 *(u32 *)data = priv->rx_copybreak;
941 break;
942 default:
943 ret = -EINVAL;
944 break;
945 }
946
947 return ret;
948 }
949
950 static int stmmac_set_tunable(struct net_device *dev,
951 const struct ethtool_tunable *tuna,
952 const void *data)
953 {
954 struct stmmac_priv *priv = netdev_priv(dev);
955 int ret = 0;
956
957 switch (tuna->id) {
958 case ETHTOOL_RX_COPYBREAK:
959 priv->rx_copybreak = *(u32 *)data;
960 break;
961 default:
962 ret = -EINVAL;
963 break;
964 }
965
966 return ret;
967 }
968
969 static const struct ethtool_ops stmmac_ethtool_ops = {
970 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
971 ETHTOOL_COALESCE_MAX_FRAMES,
972 .begin = stmmac_check_if_running,
973 .get_drvinfo = stmmac_ethtool_getdrvinfo,
974 .get_msglevel = stmmac_ethtool_getmsglevel,
975 .set_msglevel = stmmac_ethtool_setmsglevel,
976 .get_regs = stmmac_ethtool_gregs,
977 .get_regs_len = stmmac_ethtool_get_regs_len,
978 .get_link = ethtool_op_get_link,
979 .nway_reset = stmmac_nway_reset,
980 .get_ringparam = stmmac_get_ringparam,
981 .set_ringparam = stmmac_set_ringparam,
982 .get_pauseparam = stmmac_get_pauseparam,
983 .set_pauseparam = stmmac_set_pauseparam,
984 .self_test = stmmac_selftest_run,
985 .get_ethtool_stats = stmmac_get_ethtool_stats,
986 .get_strings = stmmac_get_strings,
987 .get_wol = stmmac_get_wol,
988 .set_wol = stmmac_set_wol,
989 .get_eee = stmmac_ethtool_op_get_eee,
990 .set_eee = stmmac_ethtool_op_set_eee,
991 .get_sset_count = stmmac_get_sset_count,
992 .get_rxnfc = stmmac_get_rxnfc,
993 .get_rxfh_key_size = stmmac_get_rxfh_key_size,
994 .get_rxfh_indir_size = stmmac_get_rxfh_indir_size,
995 .get_rxfh = stmmac_get_rxfh,
996 .set_rxfh = stmmac_set_rxfh,
997 .get_ts_info = stmmac_get_ts_info,
998 .get_coalesce = stmmac_get_coalesce,
999 .set_coalesce = stmmac_set_coalesce,
1000 .get_channels = stmmac_get_channels,
1001 .set_channels = stmmac_set_channels,
1002 .get_tunable = stmmac_get_tunable,
1003 .set_tunable = stmmac_set_tunable,
1004 .get_link_ksettings = stmmac_ethtool_get_link_ksettings,
1005 .set_link_ksettings = stmmac_ethtool_set_link_ksettings,
1006 };
1007
1008 void stmmac_set_ethtool_ops(struct net_device *netdev)
1009 {
1010 netdev->ethtool_ops = &stmmac_ethtool_ops;
1011 }
Linux with added FPC-III support