1 // SPDX-License-Identifier: GPL-2.0-only
2 /*******************************************************************************
3 This contains the functions to handle the platform driver.
5 Copyright (C) 2007-2011 STMicroelectronics Ltd
8 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
9 *******************************************************************************/
11 #include <linux/platform_device.h>
12 #include <linux/module.h>
15 #include <linux/of_net.h>
16 #include <linux/of_device.h>
17 #include <linux/of_mdio.h>
20 #include "stmmac_platform.h"
25 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
26 * @dev: struct device of the platform device
27 * @mcast_bins: Multicast filtering bins
29 * this function validates the number of Multicast filtering bins specified
30 * by the configuration through the device tree. The Synopsys GMAC supports
31 * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
32 * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
33 * to 7 bits, and 256 refers to 8 bits of the CRC. Any other setting is
34 * invalid and will cause the filtering algorithm to use Multicast
37 static int dwmac1000_validate_mcast_bins(struct device
*dev
, int mcast_bins
)
48 dev_info(dev
, "Hash table entries set to unexpected value %d\n",
56 * dwmac1000_validate_ucast_entries - validate the Unicast address entries
57 * @dev: struct device of the platform device
58 * @ucast_entries: number of Unicast address entries
60 * This function validates the number of Unicast address entries supported
61 * by a particular Synopsys 10/100/1000 controller. The Synopsys controller
62 * supports 1..32, 64, or 128 Unicast filter entries for it's Unicast filter
63 * logic. This function validates a valid, supported configuration is
64 * selected, and defaults to 1 Unicast address if an unsupported
65 * configuration is selected.
67 static int dwmac1000_validate_ucast_entries(struct device
*dev
,
70 int x
= ucast_entries
;
79 dev_info(dev
, "Unicast table entries set to unexpected value %d\n",
87 * stmmac_axi_setup - parse DT parameters for programming the AXI register
88 * @pdev: platform device
90 * if required, from device-tree the AXI internal register can be tuned
91 * by using platform parameters.
93 static struct stmmac_axi
*stmmac_axi_setup(struct platform_device
*pdev
)
95 struct device_node
*np
;
96 struct stmmac_axi
*axi
;
98 np
= of_parse_phandle(pdev
->dev
.of_node
, "snps,axi-config", 0);
102 axi
= devm_kzalloc(&pdev
->dev
, sizeof(*axi
), GFP_KERNEL
);
105 return ERR_PTR(-ENOMEM
);
108 axi
->axi_lpi_en
= of_property_read_bool(np
, "snps,lpi_en");
109 axi
->axi_xit_frm
= of_property_read_bool(np
, "snps,xit_frm");
110 axi
->axi_kbbe
= of_property_read_bool(np
, "snps,axi_kbbe");
111 axi
->axi_fb
= of_property_read_bool(np
, "snps,axi_fb");
112 axi
->axi_mb
= of_property_read_bool(np
, "snps,axi_mb");
113 axi
->axi_rb
= of_property_read_bool(np
, "snps,axi_rb");
115 if (of_property_read_u32(np
, "snps,wr_osr_lmt", &axi
->axi_wr_osr_lmt
))
116 axi
->axi_wr_osr_lmt
= 1;
117 if (of_property_read_u32(np
, "snps,rd_osr_lmt", &axi
->axi_rd_osr_lmt
))
118 axi
->axi_rd_osr_lmt
= 1;
119 of_property_read_u32_array(np
, "snps,blen", axi
->axi_blen
, AXI_BLEN
);
126 * stmmac_mtl_setup - parse DT parameters for multiple queues configuration
127 * @pdev: platform device
130 static int stmmac_mtl_setup(struct platform_device
*pdev
,
131 struct plat_stmmacenet_data
*plat
)
133 struct device_node
*q_node
;
134 struct device_node
*rx_node
;
135 struct device_node
*tx_node
;
139 /* For backwards-compatibility with device trees that don't have any
140 * snps,mtl-rx-config or snps,mtl-tx-config properties, we fall back
141 * to one RX and TX queues each.
143 plat
->rx_queues_to_use
= 1;
144 plat
->tx_queues_to_use
= 1;
146 /* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = 1 we need
147 * to always set this, otherwise Queue will be classified as AVB
148 * (because MTL_QUEUE_AVB = 0).
150 plat
->rx_queues_cfg
[0].mode_to_use
= MTL_QUEUE_DCB
;
151 plat
->tx_queues_cfg
[0].mode_to_use
= MTL_QUEUE_DCB
;
153 rx_node
= of_parse_phandle(pdev
->dev
.of_node
, "snps,mtl-rx-config", 0);
157 tx_node
= of_parse_phandle(pdev
->dev
.of_node
, "snps,mtl-tx-config", 0);
159 of_node_put(rx_node
);
163 /* Processing RX queues common config */
164 if (of_property_read_u32(rx_node
, "snps,rx-queues-to-use",
165 &plat
->rx_queues_to_use
))
166 plat
->rx_queues_to_use
= 1;
168 if (of_property_read_bool(rx_node
, "snps,rx-sched-sp"))
169 plat
->rx_sched_algorithm
= MTL_RX_ALGORITHM_SP
;
170 else if (of_property_read_bool(rx_node
, "snps,rx-sched-wsp"))
171 plat
->rx_sched_algorithm
= MTL_RX_ALGORITHM_WSP
;
173 plat
->rx_sched_algorithm
= MTL_RX_ALGORITHM_SP
;
175 /* Processing individual RX queue config */
176 for_each_child_of_node(rx_node
, q_node
) {
177 if (queue
>= plat
->rx_queues_to_use
)
180 if (of_property_read_bool(q_node
, "snps,dcb-algorithm"))
181 plat
->rx_queues_cfg
[queue
].mode_to_use
= MTL_QUEUE_DCB
;
182 else if (of_property_read_bool(q_node
, "snps,avb-algorithm"))
183 plat
->rx_queues_cfg
[queue
].mode_to_use
= MTL_QUEUE_AVB
;
185 plat
->rx_queues_cfg
[queue
].mode_to_use
= MTL_QUEUE_DCB
;
187 if (of_property_read_u32(q_node
, "snps,map-to-dma-channel",
188 &plat
->rx_queues_cfg
[queue
].chan
))
189 plat
->rx_queues_cfg
[queue
].chan
= queue
;
190 /* TODO: Dynamic mapping to be included in the future */
192 if (of_property_read_u32(q_node
, "snps,priority",
193 &plat
->rx_queues_cfg
[queue
].prio
)) {
194 plat
->rx_queues_cfg
[queue
].prio
= 0;
195 plat
->rx_queues_cfg
[queue
].use_prio
= false;
197 plat
->rx_queues_cfg
[queue
].use_prio
= true;
200 /* RX queue specific packet type routing */
201 if (of_property_read_bool(q_node
, "snps,route-avcp"))
202 plat
->rx_queues_cfg
[queue
].pkt_route
= PACKET_AVCPQ
;
203 else if (of_property_read_bool(q_node
, "snps,route-ptp"))
204 plat
->rx_queues_cfg
[queue
].pkt_route
= PACKET_PTPQ
;
205 else if (of_property_read_bool(q_node
, "snps,route-dcbcp"))
206 plat
->rx_queues_cfg
[queue
].pkt_route
= PACKET_DCBCPQ
;
207 else if (of_property_read_bool(q_node
, "snps,route-up"))
208 plat
->rx_queues_cfg
[queue
].pkt_route
= PACKET_UPQ
;
209 else if (of_property_read_bool(q_node
, "snps,route-multi-broad"))
210 plat
->rx_queues_cfg
[queue
].pkt_route
= PACKET_MCBCQ
;
212 plat
->rx_queues_cfg
[queue
].pkt_route
= 0x0;
216 if (queue
!= plat
->rx_queues_to_use
) {
218 dev_err(&pdev
->dev
, "Not all RX queues were configured\n");
222 /* Processing TX queues common config */
223 if (of_property_read_u32(tx_node
, "snps,tx-queues-to-use",
224 &plat
->tx_queues_to_use
))
225 plat
->tx_queues_to_use
= 1;
227 if (of_property_read_bool(tx_node
, "snps,tx-sched-wrr"))
228 plat
->tx_sched_algorithm
= MTL_TX_ALGORITHM_WRR
;
229 else if (of_property_read_bool(tx_node
, "snps,tx-sched-wfq"))
230 plat
->tx_sched_algorithm
= MTL_TX_ALGORITHM_WFQ
;
231 else if (of_property_read_bool(tx_node
, "snps,tx-sched-dwrr"))
232 plat
->tx_sched_algorithm
= MTL_TX_ALGORITHM_DWRR
;
233 else if (of_property_read_bool(tx_node
, "snps,tx-sched-sp"))
234 plat
->tx_sched_algorithm
= MTL_TX_ALGORITHM_SP
;
236 plat
->tx_sched_algorithm
= MTL_TX_ALGORITHM_SP
;
240 /* Processing individual TX queue config */
241 for_each_child_of_node(tx_node
, q_node
) {
242 if (queue
>= plat
->tx_queues_to_use
)
245 if (of_property_read_u32(q_node
, "snps,weight",
246 &plat
->tx_queues_cfg
[queue
].weight
))
247 plat
->tx_queues_cfg
[queue
].weight
= 0x10 + queue
;
249 if (of_property_read_bool(q_node
, "snps,dcb-algorithm")) {
250 plat
->tx_queues_cfg
[queue
].mode_to_use
= MTL_QUEUE_DCB
;
251 } else if (of_property_read_bool(q_node
,
252 "snps,avb-algorithm")) {
253 plat
->tx_queues_cfg
[queue
].mode_to_use
= MTL_QUEUE_AVB
;
255 /* Credit Base Shaper parameters used by AVB */
256 if (of_property_read_u32(q_node
, "snps,send_slope",
257 &plat
->tx_queues_cfg
[queue
].send_slope
))
258 plat
->tx_queues_cfg
[queue
].send_slope
= 0x0;
259 if (of_property_read_u32(q_node
, "snps,idle_slope",
260 &plat
->tx_queues_cfg
[queue
].idle_slope
))
261 plat
->tx_queues_cfg
[queue
].idle_slope
= 0x0;
262 if (of_property_read_u32(q_node
, "snps,high_credit",
263 &plat
->tx_queues_cfg
[queue
].high_credit
))
264 plat
->tx_queues_cfg
[queue
].high_credit
= 0x0;
265 if (of_property_read_u32(q_node
, "snps,low_credit",
266 &plat
->tx_queues_cfg
[queue
].low_credit
))
267 plat
->tx_queues_cfg
[queue
].low_credit
= 0x0;
269 plat
->tx_queues_cfg
[queue
].mode_to_use
= MTL_QUEUE_DCB
;
272 if (of_property_read_u32(q_node
, "snps,priority",
273 &plat
->tx_queues_cfg
[queue
].prio
)) {
274 plat
->tx_queues_cfg
[queue
].prio
= 0;
275 plat
->tx_queues_cfg
[queue
].use_prio
= false;
277 plat
->tx_queues_cfg
[queue
].use_prio
= true;
282 if (queue
!= plat
->tx_queues_to_use
) {
284 dev_err(&pdev
->dev
, "Not all TX queues were configured\n");
289 of_node_put(rx_node
);
290 of_node_put(tx_node
);
297 * stmmac_dt_phy - parse device-tree driver parameters to allocate PHY resources
298 * @plat: driver data platform structure
299 * @np: device tree node
300 * @dev: device pointer
302 * The mdio bus will be allocated in case of a phy transceiver is on board;
303 * it will be NULL if the fixed-link is configured.
304 * If there is the "snps,dwmac-mdio" sub-node the mdio will be allocated
305 * in any case (for DSA, mdio must be registered even if fixed-link).
306 * The table below sums the supported configurations:
307 * -------------------------------
309 * -------------------------------
311 * -------------------------------
313 * -------------------------------
317 * -------------------------------
319 * It returns 0 in case of success otherwise -ENODEV.
321 static int stmmac_dt_phy(struct plat_stmmacenet_data
*plat
,
322 struct device_node
*np
, struct device
*dev
)
324 bool mdio
= !of_phy_is_fixed_link(np
);
325 static const struct of_device_id need_mdio_ids
[] = {
326 { .compatible
= "snps,dwc-qos-ethernet-4.10" },
330 if (of_match_node(need_mdio_ids
, np
)) {
331 plat
->mdio_node
= of_get_child_by_name(np
, "mdio");
334 * If snps,dwmac-mdio is passed from DT, always register
337 for_each_child_of_node(np
, plat
->mdio_node
) {
338 if (of_device_is_compatible(plat
->mdio_node
,
344 if (plat
->mdio_node
) {
345 dev_dbg(dev
, "Found MDIO subnode\n");
350 plat
->mdio_bus_data
=
351 devm_kzalloc(dev
, sizeof(struct stmmac_mdio_bus_data
),
353 if (!plat
->mdio_bus_data
)
356 plat
->mdio_bus_data
->needs_reset
= true;
363 * stmmac_of_get_mac_mode - retrieves the interface of the MAC
364 * @np: - device-tree node
366 * Similar to `of_get_phy_mode()`, this function will retrieve (from
367 * the device-tree) the interface mode on the MAC side. This assumes
368 * that there is mode converter in-between the MAC & PHY
369 * (e.g. GMII-to-RGMII).
371 static int stmmac_of_get_mac_mode(struct device_node
*np
)
376 err
= of_property_read_string(np
, "mac-mode", &pm
);
380 for (i
= 0; i
< PHY_INTERFACE_MODE_MAX
; i
++) {
381 if (!strcasecmp(pm
, phy_modes(i
)))
389 * stmmac_probe_config_dt - parse device-tree driver parameters
390 * @pdev: platform_device structure
391 * @mac: MAC address to use
393 * this function is to read the driver parameters from device-tree and
394 * set some private fields that will be used by the main at runtime.
396 struct plat_stmmacenet_data
*
397 stmmac_probe_config_dt(struct platform_device
*pdev
, const char **mac
)
399 struct device_node
*np
= pdev
->dev
.of_node
;
400 struct plat_stmmacenet_data
*plat
;
401 struct stmmac_dma_cfg
*dma_cfg
;
405 plat
= devm_kzalloc(&pdev
->dev
, sizeof(*plat
), GFP_KERNEL
);
407 return ERR_PTR(-ENOMEM
);
409 *mac
= of_get_mac_address(np
);
411 if (PTR_ERR(*mac
) == -EPROBE_DEFER
)
412 return ERR_CAST(*mac
);
417 plat
->phy_interface
= device_get_phy_mode(&pdev
->dev
);
418 if (plat
->phy_interface
< 0)
419 return ERR_PTR(plat
->phy_interface
);
421 plat
->interface
= stmmac_of_get_mac_mode(np
);
422 if (plat
->interface
< 0)
423 plat
->interface
= plat
->phy_interface
;
425 /* Some wrapper drivers still rely on phy_node. Let's save it while
426 * they are not converted to phylink. */
427 plat
->phy_node
= of_parse_phandle(np
, "phy-handle", 0);
429 /* PHYLINK automatically parses the phy-handle property */
430 plat
->phylink_node
= np
;
432 /* Get max speed of operation from device tree */
433 if (of_property_read_u32(np
, "max-speed", &plat
->max_speed
))
434 plat
->max_speed
= -1;
436 plat
->bus_id
= of_alias_get_id(np
, "ethernet");
437 if (plat
->bus_id
< 0)
440 /* Default to phy auto-detection */
443 /* Default to get clk_csr from stmmac_clk_crs_set(),
444 * or get clk_csr from device tree.
447 of_property_read_u32(np
, "clk_csr", &plat
->clk_csr
);
449 /* "snps,phy-addr" is not a standard property. Mark it as deprecated
450 * and warn of its use. Remove this when phy node support is added.
452 if (of_property_read_u32(np
, "snps,phy-addr", &plat
->phy_addr
) == 0)
453 dev_warn(&pdev
->dev
, "snps,phy-addr property is deprecated\n");
455 /* To Configure PHY by using all device-tree supported properties */
456 rc
= stmmac_dt_phy(plat
, np
, &pdev
->dev
);
460 of_property_read_u32(np
, "tx-fifo-depth", &plat
->tx_fifo_size
);
462 of_property_read_u32(np
, "rx-fifo-depth", &plat
->rx_fifo_size
);
464 plat
->force_sf_dma_mode
=
465 of_property_read_bool(np
, "snps,force_sf_dma_mode");
467 plat
->en_tx_lpi_clockgating
=
468 of_property_read_bool(np
, "snps,en-tx-lpi-clockgating");
470 /* Set the maxmtu to a default of JUMBO_LEN in case the
471 * parameter is not present in the device tree.
473 plat
->maxmtu
= JUMBO_LEN
;
475 /* Set default value for multicast hash bins */
476 plat
->multicast_filter_bins
= HASH_TABLE_SIZE
;
478 /* Set default value for unicast filter entries */
479 plat
->unicast_filter_entries
= 1;
482 * Currently only the properties needed on SPEAr600
483 * are provided. All other properties should be added
484 * once needed on other platforms.
486 if (of_device_is_compatible(np
, "st,spear600-gmac") ||
487 of_device_is_compatible(np
, "snps,dwmac-3.50a") ||
488 of_device_is_compatible(np
, "snps,dwmac-3.70a") ||
489 of_device_is_compatible(np
, "snps,dwmac")) {
490 /* Note that the max-frame-size parameter as defined in the
491 * ePAPR v1.1 spec is defined as max-frame-size, it's
492 * actually used as the IEEE definition of MAC Client
493 * data, or MTU. The ePAPR specification is confusing as
494 * the definition is max-frame-size, but usage examples
497 of_property_read_u32(np
, "max-frame-size", &plat
->maxmtu
);
498 of_property_read_u32(np
, "snps,multicast-filter-bins",
499 &plat
->multicast_filter_bins
);
500 of_property_read_u32(np
, "snps,perfect-filter-entries",
501 &plat
->unicast_filter_entries
);
502 plat
->unicast_filter_entries
= dwmac1000_validate_ucast_entries(
503 &pdev
->dev
, plat
->unicast_filter_entries
);
504 plat
->multicast_filter_bins
= dwmac1000_validate_mcast_bins(
505 &pdev
->dev
, plat
->multicast_filter_bins
);
510 if (of_device_is_compatible(np
, "snps,dwmac-4.00") ||
511 of_device_is_compatible(np
, "snps,dwmac-4.10a") ||
512 of_device_is_compatible(np
, "snps,dwmac-4.20a") ||
513 of_device_is_compatible(np
, "snps,dwmac-5.10a")) {
517 plat
->tso_en
= of_property_read_bool(np
, "snps,tso");
520 if (of_device_is_compatible(np
, "snps,dwmac-3.610") ||
521 of_device_is_compatible(np
, "snps,dwmac-3.710")) {
523 plat
->bugged_jumbo
= 1;
524 plat
->force_sf_dma_mode
= 1;
527 if (of_device_is_compatible(np
, "snps,dwxgmac")) {
530 plat
->tso_en
= of_property_read_bool(np
, "snps,tso");
533 dma_cfg
= devm_kzalloc(&pdev
->dev
, sizeof(*dma_cfg
),
536 stmmac_remove_config_dt(pdev
, plat
);
537 return ERR_PTR(-ENOMEM
);
539 plat
->dma_cfg
= dma_cfg
;
541 of_property_read_u32(np
, "snps,pbl", &dma_cfg
->pbl
);
543 dma_cfg
->pbl
= DEFAULT_DMA_PBL
;
544 of_property_read_u32(np
, "snps,txpbl", &dma_cfg
->txpbl
);
545 of_property_read_u32(np
, "snps,rxpbl", &dma_cfg
->rxpbl
);
546 dma_cfg
->pblx8
= !of_property_read_bool(np
, "snps,no-pbl-x8");
548 dma_cfg
->aal
= of_property_read_bool(np
, "snps,aal");
549 dma_cfg
->fixed_burst
= of_property_read_bool(np
, "snps,fixed-burst");
550 dma_cfg
->mixed_burst
= of_property_read_bool(np
, "snps,mixed-burst");
552 plat
->force_thresh_dma_mode
= of_property_read_bool(np
, "snps,force_thresh_dma_mode");
553 if (plat
->force_thresh_dma_mode
) {
554 plat
->force_sf_dma_mode
= 0;
556 "force_sf_dma_mode is ignored if force_thresh_dma_mode is set.\n");
559 of_property_read_u32(np
, "snps,ps-speed", &plat
->mac_port_sel_speed
);
561 plat
->axi
= stmmac_axi_setup(pdev
);
563 rc
= stmmac_mtl_setup(pdev
, plat
);
565 stmmac_remove_config_dt(pdev
, plat
);
570 if (!of_device_is_compatible(np
, "snps,dwc-qos-ethernet-4.10")) {
571 plat
->stmmac_clk
= devm_clk_get(&pdev
->dev
,
572 STMMAC_RESOURCE_NAME
);
573 if (IS_ERR(plat
->stmmac_clk
)) {
574 dev_warn(&pdev
->dev
, "Cannot get CSR clock\n");
575 plat
->stmmac_clk
= NULL
;
577 clk_prepare_enable(plat
->stmmac_clk
);
580 plat
->pclk
= devm_clk_get_optional(&pdev
->dev
, "pclk");
581 if (IS_ERR(plat
->pclk
)) {
585 clk_prepare_enable(plat
->pclk
);
587 /* Fall-back to main clock in case of no PTP ref is passed */
588 plat
->clk_ptp_ref
= devm_clk_get(&pdev
->dev
, "ptp_ref");
589 if (IS_ERR(plat
->clk_ptp_ref
)) {
590 plat
->clk_ptp_rate
= clk_get_rate(plat
->stmmac_clk
);
591 plat
->clk_ptp_ref
= NULL
;
592 dev_info(&pdev
->dev
, "PTP uses main clock\n");
594 plat
->clk_ptp_rate
= clk_get_rate(plat
->clk_ptp_ref
);
595 dev_dbg(&pdev
->dev
, "PTP rate %d\n", plat
->clk_ptp_rate
);
598 plat
->stmmac_rst
= devm_reset_control_get_optional(&pdev
->dev
,
599 STMMAC_RESOURCE_NAME
);
600 if (IS_ERR(plat
->stmmac_rst
)) {
601 ret
= plat
->stmmac_rst
;
608 clk_disable_unprepare(plat
->pclk
);
610 clk_disable_unprepare(plat
->stmmac_clk
);
616 * stmmac_remove_config_dt - undo the effects of stmmac_probe_config_dt()
617 * @pdev: platform_device structure
618 * @plat: driver data platform structure
620 * Release resources claimed by stmmac_probe_config_dt().
622 void stmmac_remove_config_dt(struct platform_device
*pdev
,
623 struct plat_stmmacenet_data
*plat
)
625 of_node_put(plat
->phy_node
);
626 of_node_put(plat
->mdio_node
);
629 struct plat_stmmacenet_data
*
630 stmmac_probe_config_dt(struct platform_device
*pdev
, const char **mac
)
632 return ERR_PTR(-EINVAL
);
635 void stmmac_remove_config_dt(struct platform_device
*pdev
,
636 struct plat_stmmacenet_data
*plat
)
639 #endif /* CONFIG_OF */
640 EXPORT_SYMBOL_GPL(stmmac_probe_config_dt
);
641 EXPORT_SYMBOL_GPL(stmmac_remove_config_dt
);
643 int stmmac_get_platform_resources(struct platform_device
*pdev
,
644 struct stmmac_resources
*stmmac_res
)
646 memset(stmmac_res
, 0, sizeof(*stmmac_res
));
648 /* Get IRQ information early to have an ability to ask for deferred
649 * probe if needed before we went too far with resource allocation.
651 stmmac_res
->irq
= platform_get_irq_byname(pdev
, "macirq");
652 if (stmmac_res
->irq
< 0)
653 return stmmac_res
->irq
;
655 /* On some platforms e.g. SPEAr the wake up irq differs from the mac irq
656 * The external wake up irq can be passed through the platform code
657 * named as "eth_wake_irq"
659 * In case the wake up interrupt is not passed from the platform
660 * so the driver will continue to use the mac irq (ndev->irq)
662 stmmac_res
->wol_irq
=
663 platform_get_irq_byname_optional(pdev
, "eth_wake_irq");
664 if (stmmac_res
->wol_irq
< 0) {
665 if (stmmac_res
->wol_irq
== -EPROBE_DEFER
)
666 return -EPROBE_DEFER
;
667 dev_info(&pdev
->dev
, "IRQ eth_wake_irq not found\n");
668 stmmac_res
->wol_irq
= stmmac_res
->irq
;
671 stmmac_res
->lpi_irq
=
672 platform_get_irq_byname_optional(pdev
, "eth_lpi");
673 if (stmmac_res
->lpi_irq
< 0) {
674 if (stmmac_res
->lpi_irq
== -EPROBE_DEFER
)
675 return -EPROBE_DEFER
;
676 dev_info(&pdev
->dev
, "IRQ eth_lpi not found\n");
679 stmmac_res
->addr
= devm_platform_ioremap_resource(pdev
, 0);
681 return PTR_ERR_OR_ZERO(stmmac_res
->addr
);
683 EXPORT_SYMBOL_GPL(stmmac_get_platform_resources
);
686 * stmmac_pltfr_remove
687 * @pdev: platform device pointer
688 * Description: this function calls the main to free the net resources
689 * and calls the platforms hook and release the resources (e.g. mem).
691 int stmmac_pltfr_remove(struct platform_device
*pdev
)
693 struct net_device
*ndev
= platform_get_drvdata(pdev
);
694 struct stmmac_priv
*priv
= netdev_priv(ndev
);
695 struct plat_stmmacenet_data
*plat
= priv
->plat
;
696 int ret
= stmmac_dvr_remove(&pdev
->dev
);
699 plat
->exit(pdev
, plat
->bsp_priv
);
701 stmmac_remove_config_dt(pdev
, plat
);
705 EXPORT_SYMBOL_GPL(stmmac_pltfr_remove
);
707 #ifdef CONFIG_PM_SLEEP
709 * stmmac_pltfr_suspend
710 * @dev: device pointer
711 * Description: this function is invoked when suspend the driver and it direcly
712 * call the main suspend function and then, if required, on some platform, it
713 * can call an exit helper.
715 static int stmmac_pltfr_suspend(struct device
*dev
)
718 struct net_device
*ndev
= dev_get_drvdata(dev
);
719 struct stmmac_priv
*priv
= netdev_priv(ndev
);
720 struct platform_device
*pdev
= to_platform_device(dev
);
722 ret
= stmmac_suspend(dev
);
723 if (priv
->plat
->exit
)
724 priv
->plat
->exit(pdev
, priv
->plat
->bsp_priv
);
730 * stmmac_pltfr_resume
731 * @dev: device pointer
732 * Description: this function is invoked when resume the driver before calling
733 * the main resume function, on some platforms, it can call own init helper
736 static int stmmac_pltfr_resume(struct device
*dev
)
738 struct net_device
*ndev
= dev_get_drvdata(dev
);
739 struct stmmac_priv
*priv
= netdev_priv(ndev
);
740 struct platform_device
*pdev
= to_platform_device(dev
);
742 if (priv
->plat
->init
)
743 priv
->plat
->init(pdev
, priv
->plat
->bsp_priv
);
745 return stmmac_resume(dev
);
747 #endif /* CONFIG_PM_SLEEP */
749 SIMPLE_DEV_PM_OPS(stmmac_pltfr_pm_ops
, stmmac_pltfr_suspend
,
750 stmmac_pltfr_resume
);
751 EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops
);
753 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support");
754 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
755 MODULE_LICENSE("GPL");