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WIP FPC-III support
[linux/fpc-iii.git] / drivers / net / ieee802154 / at86rf230.c
blob7d67f41387f5577959839f902128b1777b4b51ee
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * AT86RF230/RF231 driver
4 *
5 * Copyright (C) 2009-2012 Siemens AG
6 *
7 * Written by:
8 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
9 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
10 * Alexander Aring <aar@pengutronix.de>
11 */
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/hrtimer.h>
15 #include <linux/jiffies.h>
16 #include <linux/interrupt.h>
17 #include <linux/irq.h>
18 #include <linux/gpio.h>
19 #include <linux/delay.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/at86rf230.h>
22 #include <linux/regmap.h>
23 #include <linux/skbuff.h>
24 #include <linux/of_gpio.h>
25 #include <linux/ieee802154.h>
26 #include <linux/debugfs.h>
27
28 #include <net/mac802154.h>
29 #include <net/cfg802154.h>
30
31 #include "at86rf230.h"
32
33 struct at86rf230_local;
34 /* at86rf2xx chip depend data.
35 * All timings are in us.
36 */
37 struct at86rf2xx_chip_data {
38 u16 t_sleep_cycle;
39 u16 t_channel_switch;
40 u16 t_reset_to_off;
41 u16 t_off_to_aack;
42 u16 t_off_to_tx_on;
43 u16 t_off_to_sleep;
44 u16 t_sleep_to_off;
45 u16 t_frame;
46 u16 t_p_ack;
47 int rssi_base_val;
48
49 int (*set_channel)(struct at86rf230_local *, u8, u8);
50 int (*set_txpower)(struct at86rf230_local *, s32);
51 };
52
53 #define AT86RF2XX_MAX_BUF (127 + 3)
54 /* tx retries to access the TX_ON state
55 * if it's above then force change will be started.
56 *
57 * We assume the max_frame_retries (7) value of 802.15.4 here.
58 */
59 #define AT86RF2XX_MAX_TX_RETRIES 7
60 /* We use the recommended 5 minutes timeout to recalibrate */
61 #define AT86RF2XX_CAL_LOOP_TIMEOUT (5 * 60 * HZ)
62
63 struct at86rf230_state_change {
64 struct at86rf230_local *lp;
65 int irq;
66
67 struct hrtimer timer;
68 struct spi_message msg;
69 struct spi_transfer trx;
70 u8 buf[AT86RF2XX_MAX_BUF];
71
72 void (*complete)(void *context);
73 u8 from_state;
74 u8 to_state;
75
76 bool free;
77 };
78
79 struct at86rf230_trac {
80 u64 success;
81 u64 success_data_pending;
82 u64 success_wait_for_ack;
83 u64 channel_access_failure;
84 u64 no_ack;
85 u64 invalid;
86 };
87
88 struct at86rf230_local {
89 struct spi_device *spi;
90
91 struct ieee802154_hw *hw;
92 struct at86rf2xx_chip_data *data;
93 struct regmap *regmap;
94 int slp_tr;
95 bool sleep;
96
97 struct completion state_complete;
98 struct at86rf230_state_change state;
99
100 unsigned long cal_timeout;
101 bool is_tx;
102 bool is_tx_from_off;
103 u8 tx_retry;
104 struct sk_buff *tx_skb;
105 struct at86rf230_state_change tx;
106
107 struct at86rf230_trac trac;
108 };
109
110 #define AT86RF2XX_NUMREGS 0x3F
111
112 static void
113 at86rf230_async_state_change(struct at86rf230_local *lp,
114 struct at86rf230_state_change *ctx,
115 const u8 state, void (*complete)(void *context));
116
117 static inline void
118 at86rf230_sleep(struct at86rf230_local *lp)
119 {
120 if (gpio_is_valid(lp->slp_tr)) {
121 gpio_set_value(lp->slp_tr, 1);
122 usleep_range(lp->data->t_off_to_sleep,
123 lp->data->t_off_to_sleep + 10);
124 lp->sleep = true;
125 }
126 }
127
128 static inline void
129 at86rf230_awake(struct at86rf230_local *lp)
130 {
131 if (gpio_is_valid(lp->slp_tr)) {
132 gpio_set_value(lp->slp_tr, 0);
133 usleep_range(lp->data->t_sleep_to_off,
134 lp->data->t_sleep_to_off + 100);
135 lp->sleep = false;
136 }
137 }
138
139 static inline int
140 __at86rf230_write(struct at86rf230_local *lp,
141 unsigned int addr, unsigned int data)
142 {
143 bool sleep = lp->sleep;
144 int ret;
145
146 /* awake for register setting if sleep */
147 if (sleep)
148 at86rf230_awake(lp);
149
150 ret = regmap_write(lp->regmap, addr, data);
151
152 /* sleep again if was sleeping */
153 if (sleep)
154 at86rf230_sleep(lp);
155
156 return ret;
157 }
158
159 static inline int
160 __at86rf230_read(struct at86rf230_local *lp,
161 unsigned int addr, unsigned int *data)
162 {
163 bool sleep = lp->sleep;
164 int ret;
165
166 /* awake for register setting if sleep */
167 if (sleep)
168 at86rf230_awake(lp);
169
170 ret = regmap_read(lp->regmap, addr, data);
171
172 /* sleep again if was sleeping */
173 if (sleep)
174 at86rf230_sleep(lp);
175
176 return ret;
177 }
178
179 static inline int
180 at86rf230_read_subreg(struct at86rf230_local *lp,
181 unsigned int addr, unsigned int mask,
182 unsigned int shift, unsigned int *data)
183 {
184 int rc;
185
186 rc = __at86rf230_read(lp, addr, data);
187 if (!rc)
188 *data = (*data & mask) >> shift;
189
190 return rc;
191 }
192
193 static inline int
194 at86rf230_write_subreg(struct at86rf230_local *lp,
195 unsigned int addr, unsigned int mask,
196 unsigned int shift, unsigned int data)
197 {
198 bool sleep = lp->sleep;
199 int ret;
200
201 /* awake for register setting if sleep */
202 if (sleep)
203 at86rf230_awake(lp);
204
205 ret = regmap_update_bits(lp->regmap, addr, mask, data << shift);
206
207 /* sleep again if was sleeping */
208 if (sleep)
209 at86rf230_sleep(lp);
210
211 return ret;
212 }
213
214 static inline void
215 at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
216 {
217 gpio_set_value(lp->slp_tr, 1);
218 udelay(1);
219 gpio_set_value(lp->slp_tr, 0);
220 }
221
222 static bool
223 at86rf230_reg_writeable(struct device *dev, unsigned int reg)
224 {
225 switch (reg) {
226 case RG_TRX_STATE:
227 case RG_TRX_CTRL_0:
228 case RG_TRX_CTRL_1:
229 case RG_PHY_TX_PWR:
230 case RG_PHY_ED_LEVEL:
231 case RG_PHY_CC_CCA:
232 case RG_CCA_THRES:
233 case RG_RX_CTRL:
234 case RG_SFD_VALUE:
235 case RG_TRX_CTRL_2:
236 case RG_ANT_DIV:
237 case RG_IRQ_MASK:
238 case RG_VREG_CTRL:
239 case RG_BATMON:
240 case RG_XOSC_CTRL:
241 case RG_RX_SYN:
242 case RG_XAH_CTRL_1:
243 case RG_FTN_CTRL:
244 case RG_PLL_CF:
245 case RG_PLL_DCU:
246 case RG_SHORT_ADDR_0:
247 case RG_SHORT_ADDR_1:
248 case RG_PAN_ID_0:
249 case RG_PAN_ID_1:
250 case RG_IEEE_ADDR_0:
251 case RG_IEEE_ADDR_1:
252 case RG_IEEE_ADDR_2:
253 case RG_IEEE_ADDR_3:
254 case RG_IEEE_ADDR_4:
255 case RG_IEEE_ADDR_5:
256 case RG_IEEE_ADDR_6:
257 case RG_IEEE_ADDR_7:
258 case RG_XAH_CTRL_0:
259 case RG_CSMA_SEED_0:
260 case RG_CSMA_SEED_1:
261 case RG_CSMA_BE:
262 return true;
263 default:
264 return false;
265 }
266 }
267
268 static bool
269 at86rf230_reg_readable(struct device *dev, unsigned int reg)
270 {
271 bool rc;
272
273 /* all writeable are also readable */
274 rc = at86rf230_reg_writeable(dev, reg);
275 if (rc)
276 return rc;
277
278 /* readonly regs */
279 switch (reg) {
280 case RG_TRX_STATUS:
281 case RG_PHY_RSSI:
282 case RG_IRQ_STATUS:
283 case RG_PART_NUM:
284 case RG_VERSION_NUM:
285 case RG_MAN_ID_1:
286 case RG_MAN_ID_0:
287 return true;
288 default:
289 return false;
290 }
291 }
292
293 static bool
294 at86rf230_reg_volatile(struct device *dev, unsigned int reg)
295 {
296 /* can be changed during runtime */
297 switch (reg) {
298 case RG_TRX_STATUS:
299 case RG_TRX_STATE:
300 case RG_PHY_RSSI:
301 case RG_PHY_ED_LEVEL:
302 case RG_IRQ_STATUS:
303 case RG_VREG_CTRL:
304 case RG_PLL_CF:
305 case RG_PLL_DCU:
306 return true;
307 default:
308 return false;
309 }
310 }
311
312 static bool
313 at86rf230_reg_precious(struct device *dev, unsigned int reg)
314 {
315 /* don't clear irq line on read */
316 switch (reg) {
317 case RG_IRQ_STATUS:
318 return true;
319 default:
320 return false;
321 }
322 }
323
324 static const struct regmap_config at86rf230_regmap_spi_config = {
325 .reg_bits = 8,
326 .val_bits = 8,
327 .write_flag_mask = CMD_REG | CMD_WRITE,
328 .read_flag_mask = CMD_REG,
329 .cache_type = REGCACHE_RBTREE,
330 .max_register = AT86RF2XX_NUMREGS,
331 .writeable_reg = at86rf230_reg_writeable,
332 .readable_reg = at86rf230_reg_readable,
333 .volatile_reg = at86rf230_reg_volatile,
334 .precious_reg = at86rf230_reg_precious,
335 };
336
337 static void
338 at86rf230_async_error_recover_complete(void *context)
339 {
340 struct at86rf230_state_change *ctx = context;
341 struct at86rf230_local *lp = ctx->lp;
342
343 if (ctx->free)
344 kfree(ctx);
345
346 ieee802154_wake_queue(lp->hw);
347 }
348
349 static void
350 at86rf230_async_error_recover(void *context)
351 {
352 struct at86rf230_state_change *ctx = context;
353 struct at86rf230_local *lp = ctx->lp;
354
355 lp->is_tx = 0;
356 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
357 at86rf230_async_error_recover_complete);
358 }
359
360 static inline void
361 at86rf230_async_error(struct at86rf230_local *lp,
362 struct at86rf230_state_change *ctx, int rc)
363 {
364 dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
365
366 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
367 at86rf230_async_error_recover);
368 }
369
370 /* Generic function to get some register value in async mode */
371 static void
372 at86rf230_async_read_reg(struct at86rf230_local *lp, u8 reg,
373 struct at86rf230_state_change *ctx,
374 void (*complete)(void *context))
375 {
376 int rc;
377
378 u8 *tx_buf = ctx->buf;
379
380 tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
381 ctx->msg.complete = complete;
382 rc = spi_async(lp->spi, &ctx->msg);
383 if (rc)
384 at86rf230_async_error(lp, ctx, rc);
385 }
386
387 static void
388 at86rf230_async_write_reg(struct at86rf230_local *lp, u8 reg, u8 val,
389 struct at86rf230_state_change *ctx,
390 void (*complete)(void *context))
391 {
392 int rc;
393
394 ctx->buf[0] = (reg & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
395 ctx->buf[1] = val;
396 ctx->msg.complete = complete;
397 rc = spi_async(lp->spi, &ctx->msg);
398 if (rc)
399 at86rf230_async_error(lp, ctx, rc);
400 }
401
402 static void
403 at86rf230_async_state_assert(void *context)
404 {
405 struct at86rf230_state_change *ctx = context;
406 struct at86rf230_local *lp = ctx->lp;
407 const u8 *buf = ctx->buf;
408 const u8 trx_state = buf[1] & TRX_STATE_MASK;
409
410 /* Assert state change */
411 if (trx_state != ctx->to_state) {
412 /* Special handling if transceiver state is in
413 * STATE_BUSY_RX_AACK and a SHR was detected.
414 */
415 if (trx_state == STATE_BUSY_RX_AACK) {
416 /* Undocumented race condition. If we send a state
417 * change to STATE_RX_AACK_ON the transceiver could
418 * change his state automatically to STATE_BUSY_RX_AACK
419 * if a SHR was detected. This is not an error, but we
420 * can't assert this.
421 */
422 if (ctx->to_state == STATE_RX_AACK_ON)
423 goto done;
424
425 /* If we change to STATE_TX_ON without forcing and
426 * transceiver state is STATE_BUSY_RX_AACK, we wait
427 * 'tFrame + tPAck' receiving time. In this time the
428 * PDU should be received. If the transceiver is still
429 * in STATE_BUSY_RX_AACK, we run a force state change
430 * to STATE_TX_ON. This is a timeout handling, if the
431 * transceiver stucks in STATE_BUSY_RX_AACK.
432 *
433 * Additional we do several retries to try to get into
434 * TX_ON state without forcing. If the retries are
435 * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
436 * will do a force change.
437 */
438 if (ctx->to_state == STATE_TX_ON ||
439 ctx->to_state == STATE_TRX_OFF) {
440 u8 state = ctx->to_state;
441
442 if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
443 state = STATE_FORCE_TRX_OFF;
444 lp->tx_retry++;
445
446 at86rf230_async_state_change(lp, ctx, state,
447 ctx->complete);
448 return;
449 }
450 }
451
452 dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
453 ctx->from_state, ctx->to_state, trx_state);
454 }
455
456 done:
457 if (ctx->complete)
458 ctx->complete(context);
459 }
460
461 static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
462 {
463 struct at86rf230_state_change *ctx =
464 container_of(timer, struct at86rf230_state_change, timer);
465 struct at86rf230_local *lp = ctx->lp;
466
467 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
468 at86rf230_async_state_assert);
469
470 return HRTIMER_NORESTART;
471 }
472
473 /* Do state change timing delay. */
474 static void
475 at86rf230_async_state_delay(void *context)
476 {
477 struct at86rf230_state_change *ctx = context;
478 struct at86rf230_local *lp = ctx->lp;
479 struct at86rf2xx_chip_data *c = lp->data;
480 bool force = false;
481 ktime_t tim;
482
483 /* The force state changes are will show as normal states in the
484 * state status subregister. We change the to_state to the
485 * corresponding one and remember if it was a force change, this
486 * differs if we do a state change from STATE_BUSY_RX_AACK.
487 */
488 switch (ctx->to_state) {
489 case STATE_FORCE_TX_ON:
490 ctx->to_state = STATE_TX_ON;
491 force = true;
492 break;
493 case STATE_FORCE_TRX_OFF:
494 ctx->to_state = STATE_TRX_OFF;
495 force = true;
496 break;
497 default:
498 break;
499 }
500
501 switch (ctx->from_state) {
502 case STATE_TRX_OFF:
503 switch (ctx->to_state) {
504 case STATE_RX_AACK_ON:
505 tim = c->t_off_to_aack * NSEC_PER_USEC;
506 /* state change from TRX_OFF to RX_AACK_ON to do a
507 * calibration, we need to reset the timeout for the
508 * next one.
509 */
510 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
511 goto change;
512 case STATE_TX_ARET_ON:
513 case STATE_TX_ON:
514 tim = c->t_off_to_tx_on * NSEC_PER_USEC;
515 /* state change from TRX_OFF to TX_ON or ARET_ON to do
516 * a calibration, we need to reset the timeout for the
517 * next one.
518 */
519 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
520 goto change;
521 default:
522 break;
523 }
524 break;
525 case STATE_BUSY_RX_AACK:
526 switch (ctx->to_state) {
527 case STATE_TRX_OFF:
528 case STATE_TX_ON:
529 /* Wait for worst case receiving time if we
530 * didn't make a force change from BUSY_RX_AACK
531 * to TX_ON or TRX_OFF.
532 */
533 if (!force) {
534 tim = (c->t_frame + c->t_p_ack) * NSEC_PER_USEC;
535 goto change;
536 }
537 break;
538 default:
539 break;
540 }
541 break;
542 /* Default value, means RESET state */
543 case STATE_P_ON:
544 switch (ctx->to_state) {
545 case STATE_TRX_OFF:
546 tim = c->t_reset_to_off * NSEC_PER_USEC;
547 goto change;
548 default:
549 break;
550 }
551 break;
552 default:
553 break;
554 }
555
556 /* Default delay is 1us in the most cases */
557 udelay(1);
558 at86rf230_async_state_timer(&ctx->timer);
559 return;
560
561 change:
562 hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
563 }
564
565 static void
566 at86rf230_async_state_change_start(void *context)
567 {
568 struct at86rf230_state_change *ctx = context;
569 struct at86rf230_local *lp = ctx->lp;
570 u8 *buf = ctx->buf;
571 const u8 trx_state = buf[1] & TRX_STATE_MASK;
572
573 /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
574 if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
575 udelay(1);
576 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
577 at86rf230_async_state_change_start);
578 return;
579 }
580
581 /* Check if we already are in the state which we change in */
582 if (trx_state == ctx->to_state) {
583 if (ctx->complete)
584 ctx->complete(context);
585 return;
586 }
587
588 /* Set current state to the context of state change */
589 ctx->from_state = trx_state;
590
591 /* Going into the next step for a state change which do a timing
592 * relevant delay.
593 */
594 at86rf230_async_write_reg(lp, RG_TRX_STATE, ctx->to_state, ctx,
595 at86rf230_async_state_delay);
596 }
597
598 static void
599 at86rf230_async_state_change(struct at86rf230_local *lp,
600 struct at86rf230_state_change *ctx,
601 const u8 state, void (*complete)(void *context))
602 {
603 /* Initialization for the state change context */
604 ctx->to_state = state;
605 ctx->complete = complete;
606 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
607 at86rf230_async_state_change_start);
608 }
609
610 static void
611 at86rf230_sync_state_change_complete(void *context)
612 {
613 struct at86rf230_state_change *ctx = context;
614 struct at86rf230_local *lp = ctx->lp;
615
616 complete(&lp->state_complete);
617 }
618
619 /* This function do a sync framework above the async state change.
620 * Some callbacks of the IEEE 802.15.4 driver interface need to be
621 * handled synchronously.
622 */
623 static int
624 at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
625 {
626 unsigned long rc;
627
628 at86rf230_async_state_change(lp, &lp->state, state,
629 at86rf230_sync_state_change_complete);
630
631 rc = wait_for_completion_timeout(&lp->state_complete,
632 msecs_to_jiffies(100));
633 if (!rc) {
634 at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
635 return -ETIMEDOUT;
636 }
637
638 return 0;
639 }
640
641 static void
642 at86rf230_tx_complete(void *context)
643 {
644 struct at86rf230_state_change *ctx = context;
645 struct at86rf230_local *lp = ctx->lp;
646
647 ieee802154_xmit_complete(lp->hw, lp->tx_skb, false);
648 kfree(ctx);
649 }
650
651 static void
652 at86rf230_tx_on(void *context)
653 {
654 struct at86rf230_state_change *ctx = context;
655 struct at86rf230_local *lp = ctx->lp;
656
657 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
658 at86rf230_tx_complete);
659 }
660
661 static void
662 at86rf230_tx_trac_check(void *context)
663 {
664 struct at86rf230_state_change *ctx = context;
665 struct at86rf230_local *lp = ctx->lp;
666
667 if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) {
668 u8 trac = TRAC_MASK(ctx->buf[1]);
669
670 switch (trac) {
671 case TRAC_SUCCESS:
672 lp->trac.success++;
673 break;
674 case TRAC_SUCCESS_DATA_PENDING:
675 lp->trac.success_data_pending++;
676 break;
677 case TRAC_CHANNEL_ACCESS_FAILURE:
678 lp->trac.channel_access_failure++;
679 break;
680 case TRAC_NO_ACK:
681 lp->trac.no_ack++;
682 break;
683 case TRAC_INVALID:
684 lp->trac.invalid++;
685 break;
686 default:
687 WARN_ONCE(1, "received tx trac status %d\n", trac);
688 break;
689 }
690 }
691
692 at86rf230_async_state_change(lp, ctx, STATE_TX_ON, at86rf230_tx_on);
693 }
694
695 static void
696 at86rf230_rx_read_frame_complete(void *context)
697 {
698 struct at86rf230_state_change *ctx = context;
699 struct at86rf230_local *lp = ctx->lp;
700 const u8 *buf = ctx->buf;
701 struct sk_buff *skb;
702 u8 len, lqi;
703
704 len = buf[1];
705 if (!ieee802154_is_valid_psdu_len(len)) {
706 dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
707 len = IEEE802154_MTU;
708 }
709 lqi = buf[2 + len];
710
711 skb = dev_alloc_skb(IEEE802154_MTU);
712 if (!skb) {
713 dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
714 kfree(ctx);
715 return;
716 }
717
718 skb_put_data(skb, buf + 2, len);
719 ieee802154_rx_irqsafe(lp->hw, skb, lqi);
720 kfree(ctx);
721 }
722
723 static void
724 at86rf230_rx_trac_check(void *context)
725 {
726 struct at86rf230_state_change *ctx = context;
727 struct at86rf230_local *lp = ctx->lp;
728 u8 *buf = ctx->buf;
729 int rc;
730
731 if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) {
732 u8 trac = TRAC_MASK(buf[1]);
733
734 switch (trac) {
735 case TRAC_SUCCESS:
736 lp->trac.success++;
737 break;
738 case TRAC_SUCCESS_WAIT_FOR_ACK:
739 lp->trac.success_wait_for_ack++;
740 break;
741 case TRAC_INVALID:
742 lp->trac.invalid++;
743 break;
744 default:
745 WARN_ONCE(1, "received rx trac status %d\n", trac);
746 break;
747 }
748 }
749
750 buf[0] = CMD_FB;
751 ctx->trx.len = AT86RF2XX_MAX_BUF;
752 ctx->msg.complete = at86rf230_rx_read_frame_complete;
753 rc = spi_async(lp->spi, &ctx->msg);
754 if (rc) {
755 ctx->trx.len = 2;
756 at86rf230_async_error(lp, ctx, rc);
757 }
758 }
759
760 static void
761 at86rf230_irq_trx_end(void *context)
762 {
763 struct at86rf230_state_change *ctx = context;
764 struct at86rf230_local *lp = ctx->lp;
765
766 if (lp->is_tx) {
767 lp->is_tx = 0;
768 at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
769 at86rf230_tx_trac_check);
770 } else {
771 at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
772 at86rf230_rx_trac_check);
773 }
774 }
775
776 static void
777 at86rf230_irq_status(void *context)
778 {
779 struct at86rf230_state_change *ctx = context;
780 struct at86rf230_local *lp = ctx->lp;
781 const u8 *buf = ctx->buf;
782 u8 irq = buf[1];
783
784 enable_irq(lp->spi->irq);
785
786 if (irq & IRQ_TRX_END) {
787 at86rf230_irq_trx_end(ctx);
788 } else {
789 dev_err(&lp->spi->dev, "not supported irq %02x received\n",
790 irq);
791 kfree(ctx);
792 }
793 }
794
795 static void
796 at86rf230_setup_spi_messages(struct at86rf230_local *lp,
797 struct at86rf230_state_change *state)
798 {
799 state->lp = lp;
800 state->irq = lp->spi->irq;
801 spi_message_init(&state->msg);
802 state->msg.context = state;
803 state->trx.len = 2;
804 state->trx.tx_buf = state->buf;
805 state->trx.rx_buf = state->buf;
806 spi_message_add_tail(&state->trx, &state->msg);
807 hrtimer_init(&state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
808 state->timer.function = at86rf230_async_state_timer;
809 }
810
811 static irqreturn_t at86rf230_isr(int irq, void *data)
812 {
813 struct at86rf230_local *lp = data;
814 struct at86rf230_state_change *ctx;
815 int rc;
816
817 disable_irq_nosync(irq);
818
819 ctx = kzalloc(sizeof(*ctx), GFP_ATOMIC);
820 if (!ctx) {
821 enable_irq(irq);
822 return IRQ_NONE;
823 }
824
825 at86rf230_setup_spi_messages(lp, ctx);
826 /* tell on error handling to free ctx */
827 ctx->free = true;
828
829 ctx->buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
830 ctx->msg.complete = at86rf230_irq_status;
831 rc = spi_async(lp->spi, &ctx->msg);
832 if (rc) {
833 at86rf230_async_error(lp, ctx, rc);
834 enable_irq(irq);
835 return IRQ_NONE;
836 }
837
838 return IRQ_HANDLED;
839 }
840
841 static void
842 at86rf230_write_frame_complete(void *context)
843 {
844 struct at86rf230_state_change *ctx = context;
845 struct at86rf230_local *lp = ctx->lp;
846
847 ctx->trx.len = 2;
848
849 if (gpio_is_valid(lp->slp_tr))
850 at86rf230_slp_tr_rising_edge(lp);
851 else
852 at86rf230_async_write_reg(lp, RG_TRX_STATE, STATE_BUSY_TX, ctx,
853 NULL);
854 }
855
856 static void
857 at86rf230_write_frame(void *context)
858 {
859 struct at86rf230_state_change *ctx = context;
860 struct at86rf230_local *lp = ctx->lp;
861 struct sk_buff *skb = lp->tx_skb;
862 u8 *buf = ctx->buf;
863 int rc;
864
865 lp->is_tx = 1;
866
867 buf[0] = CMD_FB | CMD_WRITE;
868 buf[1] = skb->len + 2;
869 memcpy(buf + 2, skb->data, skb->len);
870 ctx->trx.len = skb->len + 2;
871 ctx->msg.complete = at86rf230_write_frame_complete;
872 rc = spi_async(lp->spi, &ctx->msg);
873 if (rc) {
874 ctx->trx.len = 2;
875 at86rf230_async_error(lp, ctx, rc);
876 }
877 }
878
879 static void
880 at86rf230_xmit_tx_on(void *context)
881 {
882 struct at86rf230_state_change *ctx = context;
883 struct at86rf230_local *lp = ctx->lp;
884
885 at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
886 at86rf230_write_frame);
887 }
888
889 static void
890 at86rf230_xmit_start(void *context)
891 {
892 struct at86rf230_state_change *ctx = context;
893 struct at86rf230_local *lp = ctx->lp;
894
895 /* check if we change from off state */
896 if (lp->is_tx_from_off)
897 at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
898 at86rf230_write_frame);
899 else
900 at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
901 at86rf230_xmit_tx_on);
902 }
903
904 static int
905 at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
906 {
907 struct at86rf230_local *lp = hw->priv;
908 struct at86rf230_state_change *ctx = &lp->tx;
909
910 lp->tx_skb = skb;
911 lp->tx_retry = 0;
912
913 /* After 5 minutes in PLL and the same frequency we run again the
914 * calibration loops which is recommended by at86rf2xx datasheets.
915 *
916 * The calibration is initiate by a state change from TRX_OFF
917 * to TX_ON, the lp->cal_timeout should be reinit by state_delay
918 * function then to start in the next 5 minutes.
919 */
920 if (time_is_before_jiffies(lp->cal_timeout)) {
921 lp->is_tx_from_off = true;
922 at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
923 at86rf230_xmit_start);
924 } else {
925 lp->is_tx_from_off = false;
926 at86rf230_xmit_start(ctx);
927 }
928
929 return 0;
930 }
931
932 static int
933 at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
934 {
935 WARN_ON(!level);
936 *level = 0xbe;
937 return 0;
938 }
939
940 static int
941 at86rf230_start(struct ieee802154_hw *hw)
942 {
943 struct at86rf230_local *lp = hw->priv;
944
945 /* reset trac stats on start */
946 if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS))
947 memset(&lp->trac, 0, sizeof(struct at86rf230_trac));
948
949 at86rf230_awake(lp);
950 enable_irq(lp->spi->irq);
951
952 return at86rf230_sync_state_change(lp, STATE_RX_AACK_ON);
953 }
954
955 static void
956 at86rf230_stop(struct ieee802154_hw *hw)
957 {
958 struct at86rf230_local *lp = hw->priv;
959 u8 csma_seed[2];
960
961 at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
962
963 disable_irq(lp->spi->irq);
964
965 /* It's recommended to set random new csma_seeds before sleep state.
966 * Makes only sense in the stop callback, not doing this inside of
967 * at86rf230_sleep, this is also used when we don't transmit afterwards
968 * when calling start callback again.
969 */
970 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
971 at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
972 at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
973
974 at86rf230_sleep(lp);
975 }
976
977 static int
978 at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
979 {
980 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
981 }
982
983 #define AT86RF2XX_MAX_ED_LEVELS 0xF
984 static const s32 at86rf233_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
985 -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000, -7800, -7600,
986 -7400, -7200, -7000, -6800, -6600, -6400,
987 };
988
989 static const s32 at86rf231_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
990 -9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300,
991 -7100, -6900, -6700, -6500, -6300, -6100,
992 };
993
994 static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = {
995 -10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200,
996 -8000, -7800, -7600, -7400, -7200, -7000,
997 };
998
999 static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = {
1000 -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000,
1001 -7800, -7600, -7400, -7200, -7000, -6800,
1002 };
1003
1004 static inline int
1005 at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val)
1006 {
1007 unsigned int cca_ed_thres;
1008 int rc;
1009
1010 rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres);
1011 if (rc < 0)
1012 return rc;
1013
1014 switch (rssi_base_val) {
1015 case -98:
1016 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98;
1017 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98);
1018 lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres];
1019 break;
1020 case -100:
1021 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
1022 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
1023 lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres];
1024 break;
1025 default:
1026 WARN_ON(1);
1027 }
1028
1029 return 0;
1030 }
1031
1032 static int
1033 at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1034 {
1035 int rc;
1036
1037 if (channel == 0)
1038 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
1039 else
1040 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
1041 if (rc < 0)
1042 return rc;
1043
1044 if (page == 0) {
1045 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
1046 lp->data->rssi_base_val = -100;
1047 } else {
1048 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
1049 lp->data->rssi_base_val = -98;
1050 }
1051 if (rc < 0)
1052 return rc;
1053
1054 rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val);
1055 if (rc < 0)
1056 return rc;
1057
1058 /* This sets the symbol_duration according frequency on the 212.
1059 * TODO move this handling while set channel and page in cfg802154.
1060 * We can do that, this timings are according 802.15.4 standard.
1061 * If we do that in cfg802154, this is a more generic calculation.
1062 *
1063 * This should also protected from ifs_timer. Means cancel timer and
1064 * init with a new value. For now, this is okay.
1065 */
1066 if (channel == 0) {
1067 if (page == 0) {
1068 /* SUB:0 and BPSK:0 -> BPSK-20 */
1069 lp->hw->phy->symbol_duration = 50;
1070 } else {
1071 /* SUB:1 and BPSK:0 -> BPSK-40 */
1072 lp->hw->phy->symbol_duration = 25;
1073 }
1074 } else {
1075 if (page == 0)
1076 /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
1077 lp->hw->phy->symbol_duration = 40;
1078 else
1079 /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
1080 lp->hw->phy->symbol_duration = 16;
1081 }
1082
1083 lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
1084 lp->hw->phy->symbol_duration;
1085 lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
1086 lp->hw->phy->symbol_duration;
1087
1088 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1089 }
1090
1091 static int
1092 at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
1093 {
1094 struct at86rf230_local *lp = hw->priv;
1095 int rc;
1096
1097 rc = lp->data->set_channel(lp, page, channel);
1098 /* Wait for PLL */
1099 usleep_range(lp->data->t_channel_switch,
1100 lp->data->t_channel_switch + 10);
1101
1102 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
1103 return rc;
1104 }
1105
1106 static int
1107 at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
1108 struct ieee802154_hw_addr_filt *filt,
1109 unsigned long changed)
1110 {
1111 struct at86rf230_local *lp = hw->priv;
1112
1113 if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
1114 u16 addr = le16_to_cpu(filt->short_addr);
1115
1116 dev_vdbg(&lp->spi->dev, "%s called for saddr\n", __func__);
1117 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
1118 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
1119 }
1120
1121 if (changed & IEEE802154_AFILT_PANID_CHANGED) {
1122 u16 pan = le16_to_cpu(filt->pan_id);
1123
1124 dev_vdbg(&lp->spi->dev, "%s called for pan id\n", __func__);
1125 __at86rf230_write(lp, RG_PAN_ID_0, pan);
1126 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
1127 }
1128
1129 if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
1130 u8 i, addr[8];
1131
1132 memcpy(addr, &filt->ieee_addr, 8);
1133 dev_vdbg(&lp->spi->dev, "%s called for IEEE addr\n", __func__);
1134 for (i = 0; i < 8; i++)
1135 __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
1136 }
1137
1138 if (changed & IEEE802154_AFILT_PANC_CHANGED) {
1139 dev_vdbg(&lp->spi->dev, "%s called for panc change\n", __func__);
1140 if (filt->pan_coord)
1141 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
1142 else
1143 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
1144 }
1145
1146 return 0;
1147 }
1148
1149 #define AT86RF23X_MAX_TX_POWERS 0xF
1150 static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1151 400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600,
1152 -800, -1200, -1700,
1153 };
1154
1155 static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1156 300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700,
1157 -900, -1200, -1700,
1158 };
1159
1160 #define AT86RF212_MAX_TX_POWERS 0x1F
1161 static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = {
1162 500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700,
1163 -800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700,
1164 -1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600,
1165 };
1166
1167 static int
1168 at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm)
1169 {
1170 u32 i;
1171
1172 for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1173 if (lp->hw->phy->supported.tx_powers[i] == mbm)
1174 return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i);
1175 }
1176
1177 return -EINVAL;
1178 }
1179
1180 static int
1181 at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm)
1182 {
1183 u32 i;
1184
1185 for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1186 if (lp->hw->phy->supported.tx_powers[i] == mbm)
1187 return at86rf230_write_subreg(lp, SR_TX_PWR_212, i);
1188 }
1189
1190 return -EINVAL;
1191 }
1192
1193 static int
1194 at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm)
1195 {
1196 struct at86rf230_local *lp = hw->priv;
1197
1198 return lp->data->set_txpower(lp, mbm);
1199 }
1200
1201 static int
1202 at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
1203 {
1204 struct at86rf230_local *lp = hw->priv;
1205
1206 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
1207 }
1208
1209 static int
1210 at86rf230_set_cca_mode(struct ieee802154_hw *hw,
1211 const struct wpan_phy_cca *cca)
1212 {
1213 struct at86rf230_local *lp = hw->priv;
1214 u8 val;
1215
1216 /* mapping 802.15.4 to driver spec */
1217 switch (cca->mode) {
1218 case NL802154_CCA_ENERGY:
1219 val = 1;
1220 break;
1221 case NL802154_CCA_CARRIER:
1222 val = 2;
1223 break;
1224 case NL802154_CCA_ENERGY_CARRIER:
1225 switch (cca->opt) {
1226 case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
1227 val = 3;
1228 break;
1229 case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
1230 val = 0;
1231 break;
1232 default:
1233 return -EINVAL;
1234 }
1235 break;
1236 default:
1237 return -EINVAL;
1238 }
1239
1240 return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
1241 }
1242
1243 static int
1244 at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm)
1245 {
1246 struct at86rf230_local *lp = hw->priv;
1247 u32 i;
1248
1249 for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) {
1250 if (hw->phy->supported.cca_ed_levels[i] == mbm)
1251 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i);
1252 }
1253
1254 return -EINVAL;
1255 }
1256
1257 static int
1258 at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
1259 u8 retries)
1260 {
1261 struct at86rf230_local *lp = hw->priv;
1262 int rc;
1263
1264 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
1265 if (rc)
1266 return rc;
1267
1268 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
1269 if (rc)
1270 return rc;
1271
1272 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
1273 }
1274
1275 static int
1276 at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
1277 {
1278 struct at86rf230_local *lp = hw->priv;
1279
1280 return at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
1281 }
1282
1283 static int
1284 at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
1285 {
1286 struct at86rf230_local *lp = hw->priv;
1287 int rc;
1288
1289 if (on) {
1290 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
1291 if (rc < 0)
1292 return rc;
1293
1294 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
1295 if (rc < 0)
1296 return rc;
1297 } else {
1298 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
1299 if (rc < 0)
1300 return rc;
1301
1302 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
1303 if (rc < 0)
1304 return rc;
1305 }
1306
1307 return 0;
1308 }
1309
1310 static const struct ieee802154_ops at86rf230_ops = {
1311 .owner = THIS_MODULE,
1312 .xmit_async = at86rf230_xmit,
1313 .ed = at86rf230_ed,
1314 .set_channel = at86rf230_channel,
1315 .start = at86rf230_start,
1316 .stop = at86rf230_stop,
1317 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
1318 .set_txpower = at86rf230_set_txpower,
1319 .set_lbt = at86rf230_set_lbt,
1320 .set_cca_mode = at86rf230_set_cca_mode,
1321 .set_cca_ed_level = at86rf230_set_cca_ed_level,
1322 .set_csma_params = at86rf230_set_csma_params,
1323 .set_frame_retries = at86rf230_set_frame_retries,
1324 .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
1325 };
1326
1327 static struct at86rf2xx_chip_data at86rf233_data = {
1328 .t_sleep_cycle = 330,
1329 .t_channel_switch = 11,
1330 .t_reset_to_off = 26,
1331 .t_off_to_aack = 80,
1332 .t_off_to_tx_on = 80,
1333 .t_off_to_sleep = 35,
1334 .t_sleep_to_off = 1000,
1335 .t_frame = 4096,
1336 .t_p_ack = 545,
1337 .rssi_base_val = -94,
1338 .set_channel = at86rf23x_set_channel,
1339 .set_txpower = at86rf23x_set_txpower,
1340 };
1341
1342 static struct at86rf2xx_chip_data at86rf231_data = {
1343 .t_sleep_cycle = 330,
1344 .t_channel_switch = 24,
1345 .t_reset_to_off = 37,
1346 .t_off_to_aack = 110,
1347 .t_off_to_tx_on = 110,
1348 .t_off_to_sleep = 35,
1349 .t_sleep_to_off = 1000,
1350 .t_frame = 4096,
1351 .t_p_ack = 545,
1352 .rssi_base_val = -91,
1353 .set_channel = at86rf23x_set_channel,
1354 .set_txpower = at86rf23x_set_txpower,
1355 };
1356
1357 static struct at86rf2xx_chip_data at86rf212_data = {
1358 .t_sleep_cycle = 330,
1359 .t_channel_switch = 11,
1360 .t_reset_to_off = 26,
1361 .t_off_to_aack = 200,
1362 .t_off_to_tx_on = 200,
1363 .t_off_to_sleep = 35,
1364 .t_sleep_to_off = 1000,
1365 .t_frame = 4096,
1366 .t_p_ack = 545,
1367 .rssi_base_val = -100,
1368 .set_channel = at86rf212_set_channel,
1369 .set_txpower = at86rf212_set_txpower,
1370 };
1371
1372 static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
1373 {
1374 int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
1375 unsigned int dvdd;
1376 u8 csma_seed[2];
1377
1378 rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
1379 if (rc)
1380 return rc;
1381
1382 irq_type = irq_get_trigger_type(lp->spi->irq);
1383 if (irq_type == IRQ_TYPE_EDGE_FALLING ||
1384 irq_type == IRQ_TYPE_LEVEL_LOW)
1385 irq_pol = IRQ_ACTIVE_LOW;
1386
1387 rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
1388 if (rc)
1389 return rc;
1390
1391 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
1392 if (rc)
1393 return rc;
1394
1395 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
1396 if (rc)
1397 return rc;
1398
1399 /* reset values differs in at86rf231 and at86rf233 */
1400 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
1401 if (rc)
1402 return rc;
1403
1404 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1405 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1406 if (rc)
1407 return rc;
1408 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1409 if (rc)
1410 return rc;
1411
1412 /* CLKM changes are applied immediately */
1413 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1414 if (rc)
1415 return rc;
1416
1417 /* Turn CLKM Off */
1418 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1419 if (rc)
1420 return rc;
1421 /* Wait the next SLEEP cycle */
1422 usleep_range(lp->data->t_sleep_cycle,
1423 lp->data->t_sleep_cycle + 100);
1424
1425 /* xtal_trim value is calculated by:
1426 * CL = 0.5 * (CX + CTRIM + CPAR)
1427 *
1428 * whereas:
1429 * CL = capacitor of used crystal
1430 * CX = connected capacitors at xtal pins
1431 * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
1432 * but this is different on each board setup. You need to fine
1433 * tuning this value via CTRIM.
1434 * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
1435 * 0 pF upto 4.5 pF.
1436 *
1437 * Examples:
1438 * atben transceiver:
1439 *
1440 * CL = 8 pF
1441 * CX = 12 pF
1442 * CPAR = 3 pF (We assume the magic constant from datasheet)
1443 * CTRIM = 0.9 pF
1444 *
1445 * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
1446 *
1447 * xtal_trim = 0x3
1448 *
1449 * openlabs transceiver:
1450 *
1451 * CL = 16 pF
1452 * CX = 22 pF
1453 * CPAR = 3 pF (We assume the magic constant from datasheet)
1454 * CTRIM = 4.5 pF
1455 *
1456 * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
1457 *
1458 * xtal_trim = 0xf
1459 */
1460 rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
1461 if (rc)
1462 return rc;
1463
1464 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1465 if (rc)
1466 return rc;
1467 if (!dvdd) {
1468 dev_err(&lp->spi->dev, "DVDD error\n");
1469 return -EINVAL;
1470 }
1471
1472 /* Force setting slotted operation bit to 0. Sometimes the atben
1473 * sets this bit and I don't know why. We set this always force
1474 * to zero while probing.
1475 */
1476 return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
1477 }
1478
1479 static int
1480 at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
1481 u8 *xtal_trim)
1482 {
1483 struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1484 int ret;
1485
1486 if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
1487 if (!pdata)
1488 return -ENOENT;
1489
1490 *rstn = pdata->rstn;
1491 *slp_tr = pdata->slp_tr;
1492 *xtal_trim = pdata->xtal_trim;
1493 return 0;
1494 }
1495
1496 *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1497 *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1498 ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
1499 if (ret < 0 && ret != -EINVAL)
1500 return ret;
1501
1502 return 0;
1503 }
1504
1505 static int
1506 at86rf230_detect_device(struct at86rf230_local *lp)
1507 {
1508 unsigned int part, version, val;
1509 u16 man_id = 0;
1510 const char *chip;
1511 int rc;
1512
1513 rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
1514 if (rc)
1515 return rc;
1516 man_id |= val;
1517
1518 rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
1519 if (rc)
1520 return rc;
1521 man_id |= (val << 8);
1522
1523 rc = __at86rf230_read(lp, RG_PART_NUM, &part);
1524 if (rc)
1525 return rc;
1526
1527 rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
1528 if (rc)
1529 return rc;
1530
1531 if (man_id != 0x001f) {
1532 dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1533 man_id >> 8, man_id & 0xFF);
1534 return -EINVAL;
1535 }
1536
1537 lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |
1538 IEEE802154_HW_CSMA_PARAMS |
1539 IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT |
1540 IEEE802154_HW_PROMISCUOUS;
1541
1542 lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER |
1543 WPAN_PHY_FLAG_CCA_ED_LEVEL |
1544 WPAN_PHY_FLAG_CCA_MODE;
1545
1546 lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) |
1547 BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER);
1548 lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) |
1549 BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR);
1550
1551 lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
1552
1553 switch (part) {
1554 case 2:
1555 chip = "at86rf230";
1556 rc = -ENOTSUPP;
1557 goto not_supp;
1558 case 3:
1559 chip = "at86rf231";
1560 lp->data = &at86rf231_data;
1561 lp->hw->phy->supported.channels[0] = 0x7FFF800;
1562 lp->hw->phy->current_channel = 11;
1563 lp->hw->phy->symbol_duration = 16;
1564 lp->hw->phy->supported.tx_powers = at86rf231_powers;
1565 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers);
1566 lp->hw->phy->supported.cca_ed_levels = at86rf231_ed_levels;
1567 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf231_ed_levels);
1568 break;
1569 case 7:
1570 chip = "at86rf212";
1571 lp->data = &at86rf212_data;
1572 lp->hw->flags |= IEEE802154_HW_LBT;
1573 lp->hw->phy->supported.channels[0] = 0x00007FF;
1574 lp->hw->phy->supported.channels[2] = 0x00007FF;
1575 lp->hw->phy->current_channel = 5;
1576 lp->hw->phy->symbol_duration = 25;
1577 lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH;
1578 lp->hw->phy->supported.tx_powers = at86rf212_powers;
1579 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers);
1580 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
1581 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
1582 break;
1583 case 11:
1584 chip = "at86rf233";
1585 lp->data = &at86rf233_data;
1586 lp->hw->phy->supported.channels[0] = 0x7FFF800;
1587 lp->hw->phy->current_channel = 13;
1588 lp->hw->phy->symbol_duration = 16;
1589 lp->hw->phy->supported.tx_powers = at86rf233_powers;
1590 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers);
1591 lp->hw->phy->supported.cca_ed_levels = at86rf233_ed_levels;
1592 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf233_ed_levels);
1593 break;
1594 default:
1595 chip = "unknown";
1596 rc = -ENOTSUPP;
1597 goto not_supp;
1598 }
1599
1600 lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7];
1601 lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0];
1602
1603 not_supp:
1604 dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
1605
1606 return rc;
1607 }
1608
1609 #ifdef CONFIG_IEEE802154_AT86RF230_DEBUGFS
1610 static struct dentry *at86rf230_debugfs_root;
1611
1612 static int at86rf230_stats_show(struct seq_file *file, void *offset)
1613 {
1614 struct at86rf230_local *lp = file->private;
1615
1616 seq_printf(file, "SUCCESS:\t\t%8llu\n", lp->trac.success);
1617 seq_printf(file, "SUCCESS_DATA_PENDING:\t%8llu\n",
1618 lp->trac.success_data_pending);
1619 seq_printf(file, "SUCCESS_WAIT_FOR_ACK:\t%8llu\n",
1620 lp->trac.success_wait_for_ack);
1621 seq_printf(file, "CHANNEL_ACCESS_FAILURE:\t%8llu\n",
1622 lp->trac.channel_access_failure);
1623 seq_printf(file, "NO_ACK:\t\t\t%8llu\n", lp->trac.no_ack);
1624 seq_printf(file, "INVALID:\t\t%8llu\n", lp->trac.invalid);
1625 return 0;
1626 }
1627 DEFINE_SHOW_ATTRIBUTE(at86rf230_stats);
1628
1629 static void at86rf230_debugfs_init(struct at86rf230_local *lp)
1630 {
1631 char debugfs_dir_name[DNAME_INLINE_LEN + 1] = "at86rf230-";
1632
1633 strncat(debugfs_dir_name, dev_name(&lp->spi->dev), DNAME_INLINE_LEN);
1634
1635 at86rf230_debugfs_root = debugfs_create_dir(debugfs_dir_name, NULL);
1636
1637 debugfs_create_file("trac_stats", 0444, at86rf230_debugfs_root, lp,
1638 &at86rf230_stats_fops);
1639 }
1640
1641 static void at86rf230_debugfs_remove(void)
1642 {
1643 debugfs_remove_recursive(at86rf230_debugfs_root);
1644 }
1645 #else
1646 static void at86rf230_debugfs_init(struct at86rf230_local *lp) { }
1647 static void at86rf230_debugfs_remove(void) { }
1648 #endif
1649
1650 static int at86rf230_probe(struct spi_device *spi)
1651 {
1652 struct ieee802154_hw *hw;
1653 struct at86rf230_local *lp;
1654 unsigned int status;
1655 int rc, irq_type, rstn, slp_tr;
1656 u8 xtal_trim = 0;
1657
1658 if (!spi->irq) {
1659 dev_err(&spi->dev, "no IRQ specified\n");
1660 return -EINVAL;
1661 }
1662
1663 rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
1664 if (rc < 0) {
1665 dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
1666 return rc;
1667 }
1668
1669 if (gpio_is_valid(rstn)) {
1670 rc = devm_gpio_request_one(&spi->dev, rstn,
1671 GPIOF_OUT_INIT_HIGH, "rstn");
1672 if (rc)
1673 return rc;
1674 }
1675
1676 if (gpio_is_valid(slp_tr)) {
1677 rc = devm_gpio_request_one(&spi->dev, slp_tr,
1678 GPIOF_OUT_INIT_LOW, "slp_tr");
1679 if (rc)
1680 return rc;
1681 }
1682
1683 /* Reset */
1684 if (gpio_is_valid(rstn)) {
1685 udelay(1);
1686 gpio_set_value_cansleep(rstn, 0);
1687 udelay(1);
1688 gpio_set_value_cansleep(rstn, 1);
1689 usleep_range(120, 240);
1690 }
1691
1692 hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
1693 if (!hw)
1694 return -ENOMEM;
1695
1696 lp = hw->priv;
1697 lp->hw = hw;
1698 lp->spi = spi;
1699 lp->slp_tr = slp_tr;
1700 hw->parent = &spi->dev;
1701 ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
1702
1703 lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
1704 if (IS_ERR(lp->regmap)) {
1705 rc = PTR_ERR(lp->regmap);
1706 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1707 rc);
1708 goto free_dev;
1709 }
1710
1711 at86rf230_setup_spi_messages(lp, &lp->state);
1712 at86rf230_setup_spi_messages(lp, &lp->tx);
1713
1714 rc = at86rf230_detect_device(lp);
1715 if (rc < 0)
1716 goto free_dev;
1717
1718 init_completion(&lp->state_complete);
1719
1720 spi_set_drvdata(spi, lp);
1721
1722 rc = at86rf230_hw_init(lp, xtal_trim);
1723 if (rc)
1724 goto free_dev;
1725
1726 /* Read irq status register to reset irq line */
1727 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1728 if (rc)
1729 goto free_dev;
1730
1731 irq_type = irq_get_trigger_type(spi->irq);
1732 if (!irq_type)
1733 irq_type = IRQF_TRIGGER_HIGH;
1734
1735 rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
1736 IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
1737 if (rc)
1738 goto free_dev;
1739
1740 /* disable_irq by default and wait for starting hardware */
1741 disable_irq(spi->irq);
1742
1743 /* going into sleep by default */
1744 at86rf230_sleep(lp);
1745
1746 at86rf230_debugfs_init(lp);
1747
1748 rc = ieee802154_register_hw(lp->hw);
1749 if (rc)
1750 goto free_debugfs;
1751
1752 return rc;
1753
1754 free_debugfs:
1755 at86rf230_debugfs_remove();
1756 free_dev:
1757 ieee802154_free_hw(lp->hw);
1758
1759 return rc;
1760 }
1761
1762 static int at86rf230_remove(struct spi_device *spi)
1763 {
1764 struct at86rf230_local *lp = spi_get_drvdata(spi);
1765
1766 /* mask all at86rf230 irq's */
1767 at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1768 ieee802154_unregister_hw(lp->hw);
1769 ieee802154_free_hw(lp->hw);
1770 at86rf230_debugfs_remove();
1771 dev_dbg(&spi->dev, "unregistered at86rf230\n");
1772
1773 return 0;
1774 }
1775
1776 static const struct of_device_id at86rf230_of_match[] = {
1777 { .compatible = "atmel,at86rf230", },
1778 { .compatible = "atmel,at86rf231", },
1779 { .compatible = "atmel,at86rf233", },
1780 { .compatible = "atmel,at86rf212", },
1781 { },
1782 };
1783 MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1784
1785 static const struct spi_device_id at86rf230_device_id[] = {
1786 { .name = "at86rf230", },
1787 { .name = "at86rf231", },
1788 { .name = "at86rf233", },
1789 { .name = "at86rf212", },
1790 { },
1791 };
1792 MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
1793
1794 static struct spi_driver at86rf230_driver = {
1795 .id_table = at86rf230_device_id,
1796 .driver = {
1797 .of_match_table = of_match_ptr(at86rf230_of_match),
1798 .name = "at86rf230",
1799 },
1800 .probe = at86rf230_probe,
1801 .remove = at86rf230_remove,
1802 };
1803
1804 module_spi_driver(at86rf230_driver);
1805
1806 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1807 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support