1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2010 Broadcom Corporation
6 #include <linux/kernel.h>
10 static const u32 frame_struct_rev0
[] = {
845 static const u8 frame_lut_rev0
[] = {
880 static const u32 tmap_tbl_rev0
[] = {
1331 static const u32 tdtrn_tbl_rev0
[] = {
2038 static const u32 intlv_tbl_rev0
[] = {
2048 static const u16 pilot_tbl_rev0
[] = {
2139 static const u32 pltlut_tbl_rev0
[] = {
2148 static const u32 tdi_tbl20_ant0_rev0
[] = {
2206 static const u32 tdi_tbl20_ant1_rev0
[] = {
2264 static const u32 tdi_tbl40_ant0_rev0
[] = {
2377 static const u32 tdi_tbl40_ant1_rev0
[] = {
2490 static const u16 bdi_tbl_rev0
[] = {
2499 static const u32 chanest_tbl_rev0
[] = {
2598 static const u8 mcs_tbl_rev0
[] = {
2729 static const u32 noise_var_tbl0_rev0
[] = {
2988 static const u32 noise_var_tbl1_rev0
[] = {
3247 static const u8 est_pwr_lut_core0_rev0
[] = {
3314 static const u8 est_pwr_lut_core1_rev0
[] = {
3381 static const u8 adj_pwr_lut_core0_rev0
[] = {
3512 static const u8 adj_pwr_lut_core1_rev0
[] = {
3643 static const u32 gainctrl_lut_core0_rev0
[] = {
3774 static const u32 gainctrl_lut_core1_rev0
[] = {
3905 static const u32 iq_lut_core0_rev0
[] = {
4036 static const u32 iq_lut_core1_rev0
[] = {
4167 static const u16 loft_lut_core0_rev0
[] = {
4298 static const u16 loft_lut_core1_rev0
[] = {
4429 const struct phytbl_info mimophytbl_info_rev0_volatile
[] = {
4430 {&bdi_tbl_rev0
, ARRAY_SIZE(bdi_tbl_rev0
), 21, 0, 16},
4431 {&pltlut_tbl_rev0
, ARRAY_SIZE(pltlut_tbl_rev0
), 20, 0, 32},
4432 {&gainctrl_lut_core0_rev0
, ARRAY_SIZE(gainctrl_lut_core0_rev0
), 26, 192, 32},
4433 {&gainctrl_lut_core1_rev0
, ARRAY_SIZE(gainctrl_lut_core1_rev0
), 27, 192, 32},
4434 {&est_pwr_lut_core0_rev0
, ARRAY_SIZE(est_pwr_lut_core0_rev0
), 26, 0, 8},
4435 {&est_pwr_lut_core1_rev0
, ARRAY_SIZE(est_pwr_lut_core1_rev0
), 27, 0, 8},
4436 {&adj_pwr_lut_core0_rev0
, ARRAY_SIZE(adj_pwr_lut_core0_rev0
), 26, 64, 8},
4437 {&adj_pwr_lut_core1_rev0
, ARRAY_SIZE(adj_pwr_lut_core1_rev0
), 27, 64, 8},
4438 {&iq_lut_core0_rev0
, ARRAY_SIZE(iq_lut_core0_rev0
), 26, 320, 32},
4439 {&iq_lut_core1_rev0
, ARRAY_SIZE(iq_lut_core1_rev0
), 27, 320, 32},
4440 {&loft_lut_core0_rev0
, ARRAY_SIZE(loft_lut_core0_rev0
), 26, 448, 16},
4441 {&loft_lut_core1_rev0
, ARRAY_SIZE(loft_lut_core1_rev0
), 27, 448, 16},
4444 const struct phytbl_info mimophytbl_info_rev0
[] = {
4445 {&frame_struct_rev0
, ARRAY_SIZE(frame_struct_rev0
), 10, 0, 32},
4446 {&frame_lut_rev0
, ARRAY_SIZE(frame_lut_rev0
), 24, 0, 8},
4447 {&tmap_tbl_rev0
, ARRAY_SIZE(tmap_tbl_rev0
), 12, 0, 32},
4448 {&tdtrn_tbl_rev0
, ARRAY_SIZE(tdtrn_tbl_rev0
), 14, 0, 32},
4449 {&intlv_tbl_rev0
, ARRAY_SIZE(intlv_tbl_rev0
), 13, 0, 32},
4450 {&pilot_tbl_rev0
, ARRAY_SIZE(pilot_tbl_rev0
), 11, 0, 16},
4451 {&tdi_tbl20_ant0_rev0
, ARRAY_SIZE(tdi_tbl20_ant0_rev0
), 19, 128, 32},
4452 {&tdi_tbl20_ant1_rev0
, ARRAY_SIZE(tdi_tbl20_ant1_rev0
), 19, 256, 32},
4453 {&tdi_tbl40_ant0_rev0
, ARRAY_SIZE(tdi_tbl40_ant0_rev0
), 19, 640, 32},
4454 {&tdi_tbl40_ant1_rev0
, ARRAY_SIZE(tdi_tbl40_ant1_rev0
), 19, 768, 32},
4455 {&chanest_tbl_rev0
, ARRAY_SIZE(chanest_tbl_rev0
), 22, 0, 32},
4456 {&mcs_tbl_rev0
, ARRAY_SIZE(mcs_tbl_rev0
), 18, 0, 8},
4457 {&noise_var_tbl0_rev0
, ARRAY_SIZE(noise_var_tbl0_rev0
), 16, 0, 32},
4458 {&noise_var_tbl1_rev0
, ARRAY_SIZE(noise_var_tbl1_rev0
), 16, 128, 32},
4461 const u32 mimophytbl_info_sz_rev0
= ARRAY_SIZE(mimophytbl_info_rev0
);
4462 const u32 mimophytbl_info_sz_rev0_volatile
= ARRAY_SIZE(mimophytbl_info_rev0_volatile
);
4464 static const u16 ant_swctrl_tbl_rev3
[] = {
4499 static const u16 ant_swctrl_tbl_rev3_1
[] = {
4534 static const u16 ant_swctrl_tbl_rev3_2
[] = {
4569 static const u16 ant_swctrl_tbl_rev3_3
[] = {
4604 static const u32 frame_struct_rev3
[] = {
5439 static const u16 pilot_tbl_rev3
[] = {
5530 static const u32 tmap_tbl_rev3
[] = {
5981 static const u32 intlv_tbl_rev3
[] = {
5991 static const u32 tdtrn_tbl_rev3
[] = {
6698 const u32 noise_var_tbl_rev3
[] = {
6957 static const u16 mcs_tbl_rev3
[] = {
7088 static const u32 tdi_tbl20_ant0_rev3
[] = {
7146 static const u32 tdi_tbl20_ant1_rev3
[] = {
7204 static const u32 tdi_tbl40_ant0_rev3
[] = {
7317 static const u32 tdi_tbl40_ant1_rev3
[] = {
7430 static const u32 pltlut_tbl_rev3
[] = {
7439 static const u32 chanest_tbl_rev3
[] = {
7538 static const u8 frame_lut_rev3
[] = {
7573 static const u8 est_pwr_lut_core0_rev3
[] = {
7640 static const u8 est_pwr_lut_core1_rev3
[] = {
7707 static const u8 adj_pwr_lut_core0_rev3
[] = {
7838 static const u8 adj_pwr_lut_core1_rev3
[] = {
7969 static const u32 gainctrl_lut_core0_rev3
[] = {
8100 static const u32 gainctrl_lut_core1_rev3
[] = {
8231 static const u32 iq_lut_core0_rev3
[] = {
8362 static const u32 iq_lut_core1_rev3
[] = {
8493 static const u16 loft_lut_core0_rev3
[] = {
8624 static const u16 loft_lut_core1_rev3
[] = {
8755 static const u16 papd_comp_rfpwr_tbl_core0_rev3
[] = {
8886 static const u16 papd_comp_rfpwr_tbl_core1_rev3
[] = {
9017 const struct phytbl_info mimophytbl_info_rev3_volatile
[] = {
9018 {&ant_swctrl_tbl_rev3
, ARRAY_SIZE(ant_swctrl_tbl_rev3
), 9, 0, 16},
9021 const struct phytbl_info mimophytbl_info_rev3_volatile1
[] = {
9022 {&ant_swctrl_tbl_rev3_1
, ARRAY_SIZE(ant_swctrl_tbl_rev3_1
), 9, 0, 16},
9025 const struct phytbl_info mimophytbl_info_rev3_volatile2
[] = {
9026 {&ant_swctrl_tbl_rev3_2
, ARRAY_SIZE(ant_swctrl_tbl_rev3_2
), 9, 0, 16},
9029 const struct phytbl_info mimophytbl_info_rev3_volatile3
[] = {
9030 {&ant_swctrl_tbl_rev3_3
, ARRAY_SIZE(ant_swctrl_tbl_rev3_3
), 9, 0, 16},
9033 const struct phytbl_info mimophytbl_info_rev3
[] = {
9034 {&frame_struct_rev3
, ARRAY_SIZE(frame_struct_rev3
), 10, 0, 32},
9035 {&pilot_tbl_rev3
, ARRAY_SIZE(pilot_tbl_rev3
), 11, 0, 16},
9036 {&tmap_tbl_rev3
, ARRAY_SIZE(tmap_tbl_rev3
), 12, 0, 32},
9037 {&intlv_tbl_rev3
, ARRAY_SIZE(intlv_tbl_rev3
), 13, 0, 32},
9038 {&tdtrn_tbl_rev3
, ARRAY_SIZE(tdtrn_tbl_rev3
), 14, 0, 32},
9039 {&noise_var_tbl_rev3
, ARRAY_SIZE(noise_var_tbl_rev3
), 16, 0, 32},
9040 {&mcs_tbl_rev3
, ARRAY_SIZE(mcs_tbl_rev3
), 18, 0, 16},
9041 {&tdi_tbl20_ant0_rev3
, ARRAY_SIZE(tdi_tbl20_ant0_rev3
), 19, 128, 32},
9042 {&tdi_tbl20_ant1_rev3
, ARRAY_SIZE(tdi_tbl20_ant1_rev3
), 19, 256, 32},
9043 {&tdi_tbl40_ant0_rev3
, ARRAY_SIZE(tdi_tbl40_ant0_rev3
), 19, 640, 32},
9044 {&tdi_tbl40_ant1_rev3
, ARRAY_SIZE(tdi_tbl40_ant1_rev3
), 19, 768, 32},
9045 {&pltlut_tbl_rev3
, ARRAY_SIZE(pltlut_tbl_rev3
), 20, 0, 32},
9046 {&chanest_tbl_rev3
, ARRAY_SIZE(chanest_tbl_rev3
), 22, 0, 32},
9047 {&frame_lut_rev3
, ARRAY_SIZE(frame_lut_rev3
), 24, 0, 8},
9048 {&est_pwr_lut_core0_rev3
, ARRAY_SIZE(est_pwr_lut_core0_rev3
), 26, 0, 8},
9049 {&est_pwr_lut_core1_rev3
, ARRAY_SIZE(est_pwr_lut_core1_rev3
), 27, 0, 8},
9050 {&adj_pwr_lut_core0_rev3
, ARRAY_SIZE(adj_pwr_lut_core0_rev3
), 26, 64, 8},
9051 {&adj_pwr_lut_core1_rev3
, ARRAY_SIZE(adj_pwr_lut_core1_rev3
), 27, 64, 8},
9052 {&gainctrl_lut_core0_rev3
, ARRAY_SIZE(gainctrl_lut_core0_rev3
), 26, 192, 32},
9053 {&gainctrl_lut_core1_rev3
, ARRAY_SIZE(gainctrl_lut_core1_rev3
), 27, 192, 32},
9054 {&iq_lut_core0_rev3
, ARRAY_SIZE(iq_lut_core0_rev3
), 26, 320, 32},
9055 {&iq_lut_core1_rev3
, ARRAY_SIZE(iq_lut_core1_rev3
), 27, 320, 32},
9056 {&loft_lut_core0_rev3
, ARRAY_SIZE(loft_lut_core0_rev3
), 26, 448, 16},
9057 {&loft_lut_core1_rev3
, ARRAY_SIZE(loft_lut_core1_rev3
), 27, 448, 16}
9060 const u32 mimophytbl_info_sz_rev3
= ARRAY_SIZE(mimophytbl_info_rev3
);
9061 const u32 mimophytbl_info_sz_rev3_volatile
= ARRAY_SIZE(mimophytbl_info_rev3_volatile
);
9062 const u32 mimophytbl_info_sz_rev3_volatile1
= ARRAY_SIZE(mimophytbl_info_rev3_volatile1
);
9063 const u32 mimophytbl_info_sz_rev3_volatile2
= ARRAY_SIZE(mimophytbl_info_rev3_volatile2
);
9064 const u32 mimophytbl_info_sz_rev3_volatile3
= ARRAY_SIZE(mimophytbl_info_rev3_volatile3
);
9066 static const u32 tmap_tbl_rev7
[] = {
9517 const u32 noise_var_tbl_rev7
[] = {
9776 static const u32 papd_comp_epsilon_tbl_core0_rev7
[] = {
9843 static const u32 papd_cal_scalars_tbl_core0_rev7
[] = {
9910 static const u32 papd_comp_epsilon_tbl_core1_rev7
[] = {
9977 static const u32 papd_cal_scalars_tbl_core1_rev7
[] = {
10044 const struct phytbl_info mimophytbl_info_rev7
[] = {
10045 {&frame_struct_rev3
, ARRAY_SIZE(frame_struct_rev3
), 10, 0, 32},
10046 {&pilot_tbl_rev3
, ARRAY_SIZE(pilot_tbl_rev3
), 11, 0, 16},
10047 {&tmap_tbl_rev7
, ARRAY_SIZE(tmap_tbl_rev7
), 12, 0, 32},
10048 {&intlv_tbl_rev3
, ARRAY_SIZE(intlv_tbl_rev3
), 13, 0, 32},
10049 {&tdtrn_tbl_rev3
, ARRAY_SIZE(tdtrn_tbl_rev3
), 14, 0, 32},
10050 {&noise_var_tbl_rev7
, ARRAY_SIZE(noise_var_tbl_rev7
), 16, 0, 32},
10051 {&mcs_tbl_rev3
, ARRAY_SIZE(mcs_tbl_rev3
), 18, 0, 16},
10052 {&tdi_tbl20_ant0_rev3
, ARRAY_SIZE(tdi_tbl20_ant0_rev3
), 19, 128, 32},
10053 {&tdi_tbl20_ant1_rev3
, ARRAY_SIZE(tdi_tbl20_ant1_rev3
), 19, 256, 32},
10054 {&tdi_tbl40_ant0_rev3
, ARRAY_SIZE(tdi_tbl40_ant0_rev3
), 19, 640, 32},
10055 {&tdi_tbl40_ant1_rev3
, ARRAY_SIZE(tdi_tbl40_ant1_rev3
), 19, 768, 32},
10056 {&pltlut_tbl_rev3
, ARRAY_SIZE(pltlut_tbl_rev3
), 20, 0, 32},
10057 {&chanest_tbl_rev3
, ARRAY_SIZE(chanest_tbl_rev3
), 22, 0, 32},
10058 {&frame_lut_rev3
, ARRAY_SIZE(frame_lut_rev3
), 24, 0, 8},
10059 {&est_pwr_lut_core0_rev3
, ARRAY_SIZE(est_pwr_lut_core0_rev3
), 26, 0, 8},
10060 {&est_pwr_lut_core1_rev3
, ARRAY_SIZE(est_pwr_lut_core1_rev3
), 27, 0, 8},
10061 {&adj_pwr_lut_core0_rev3
, ARRAY_SIZE(adj_pwr_lut_core0_rev3
), 26, 64, 8},
10062 {&adj_pwr_lut_core1_rev3
, ARRAY_SIZE(adj_pwr_lut_core1_rev3
), 27, 64, 8},
10063 {&gainctrl_lut_core0_rev3
, ARRAY_SIZE(gainctrl_lut_core0_rev3
), 26, 192, 32},
10064 {&gainctrl_lut_core1_rev3
, ARRAY_SIZE(gainctrl_lut_core1_rev3
), 27, 192, 32},
10065 {&iq_lut_core0_rev3
, ARRAY_SIZE(iq_lut_core0_rev3
), 26, 320, 32},
10066 {&iq_lut_core1_rev3
, ARRAY_SIZE(iq_lut_core1_rev3
), 27, 320, 32},
10067 {&loft_lut_core0_rev3
, ARRAY_SIZE(loft_lut_core0_rev3
), 26, 448, 16},
10068 {&loft_lut_core1_rev3
, ARRAY_SIZE(loft_lut_core1_rev3
), 27, 448, 16},
10069 {&papd_comp_rfpwr_tbl_core0_rev3
,
10070 ARRAY_SIZE(papd_comp_rfpwr_tbl_core0_rev3
), 26, 576, 16},
10071 {&papd_comp_rfpwr_tbl_core1_rev3
,
10072 ARRAY_SIZE(papd_comp_rfpwr_tbl_core1_rev3
), 27, 576, 16},
10073 {&papd_comp_epsilon_tbl_core0_rev7
,
10074 ARRAY_SIZE(papd_comp_epsilon_tbl_core0_rev7
), 31, 0, 32},
10075 {&papd_cal_scalars_tbl_core0_rev7
,
10076 ARRAY_SIZE(papd_cal_scalars_tbl_core0_rev7
), 32, 0, 32},
10077 {&papd_comp_epsilon_tbl_core1_rev7
,
10078 ARRAY_SIZE(papd_comp_epsilon_tbl_core1_rev7
), 33, 0, 32},
10079 {&papd_cal_scalars_tbl_core1_rev7
,
10080 ARRAY_SIZE(papd_cal_scalars_tbl_core1_rev7
), 34, 0, 32},
10083 const u32 mimophytbl_info_sz_rev7
= ARRAY_SIZE(mimophytbl_info_rev7
);
10085 const struct phytbl_info mimophytbl_info_rev16
[] = {
10086 {&noise_var_tbl_rev7
, ARRAY_SIZE(noise_var_tbl_rev7
), 16, 0, 32},
10087 {&est_pwr_lut_core0_rev3
, ARRAY_SIZE(est_pwr_lut_core0_rev3
), 26, 0, 8},
10088 {&est_pwr_lut_core1_rev3
, ARRAY_SIZE(est_pwr_lut_core1_rev3
), 27, 0, 8},
10089 {&adj_pwr_lut_core0_rev3
, ARRAY_SIZE(adj_pwr_lut_core0_rev3
), 26, 64, 8},
10090 {&adj_pwr_lut_core1_rev3
, ARRAY_SIZE(adj_pwr_lut_core1_rev3
), 27, 64, 8},
10091 {&gainctrl_lut_core0_rev3
, ARRAY_SIZE(gainctrl_lut_core0_rev3
), 26, 192, 32},
10092 {&gainctrl_lut_core1_rev3
, ARRAY_SIZE(gainctrl_lut_core1_rev3
), 27, 192, 32},
10093 {&iq_lut_core0_rev3
, ARRAY_SIZE(iq_lut_core0_rev3
), 26, 320, 32},
10094 {&iq_lut_core1_rev3
, ARRAY_SIZE(iq_lut_core1_rev3
), 27, 320, 32},
10095 {&loft_lut_core0_rev3
, ARRAY_SIZE(loft_lut_core0_rev3
), 26, 448, 16},
10096 {&loft_lut_core1_rev3
, ARRAY_SIZE(loft_lut_core1_rev3
), 27, 448, 16},
10099 const u32 mimophytbl_info_sz_rev16
= ARRAY_SIZE(mimophytbl_info_rev16
);