1 // SPDX-License-Identifier: GPL-2.0
3 * Cadence PCIe platform driver.
5 * Copyright (c) 2019, Cadence Design Systems
6 * Author: Tom Joseph <tjoseph@cadence.com>
8 #include <linux/kernel.h>
9 #include <linux/of_address.h>
10 #include <linux/of_pci.h>
11 #include <linux/platform_device.h>
12 #include <linux/pm_runtime.h>
13 #include <linux/of_device.h>
14 #include "pcie-cadence.h"
16 #define CDNS_PLAT_CPU_TO_BUS_ADDR 0x0FFFFFFF
19 * struct cdns_plat_pcie - private data for this PCIe platform driver
20 * @pcie: Cadence PCIe controller
21 * @is_rc: Set to 1 indicates the PCIe controller mode is Root Complex,
22 * if 0 it is in Endpoint mode.
24 struct cdns_plat_pcie
{
25 struct cdns_pcie
*pcie
;
29 struct cdns_plat_pcie_of_data
{
33 static const struct of_device_id cdns_plat_pcie_of_match
[];
35 static u64
cdns_plat_cpu_addr_fixup(struct cdns_pcie
*pcie
, u64 cpu_addr
)
37 return cpu_addr
& CDNS_PLAT_CPU_TO_BUS_ADDR
;
40 static const struct cdns_pcie_ops cdns_plat_ops
= {
41 .cpu_addr_fixup
= cdns_plat_cpu_addr_fixup
,
44 static int cdns_plat_pcie_probe(struct platform_device
*pdev
)
46 const struct cdns_plat_pcie_of_data
*data
;
47 struct cdns_plat_pcie
*cdns_plat_pcie
;
48 const struct of_device_id
*match
;
49 struct device
*dev
= &pdev
->dev
;
50 struct pci_host_bridge
*bridge
;
51 struct cdns_pcie_ep
*ep
;
52 struct cdns_pcie_rc
*rc
;
57 match
= of_match_device(cdns_plat_pcie_of_match
, dev
);
61 data
= (struct cdns_plat_pcie_of_data
*)match
->data
;
64 pr_debug(" Started %s with is_rc: %d\n", __func__
, is_rc
);
65 cdns_plat_pcie
= devm_kzalloc(dev
, sizeof(*cdns_plat_pcie
), GFP_KERNEL
);
69 platform_set_drvdata(pdev
, cdns_plat_pcie
);
71 if (!IS_ENABLED(CONFIG_PCIE_CADENCE_PLAT_HOST
))
74 bridge
= devm_pci_alloc_host_bridge(dev
, sizeof(*rc
));
78 rc
= pci_host_bridge_priv(bridge
);
80 rc
->pcie
.ops
= &cdns_plat_ops
;
81 cdns_plat_pcie
->pcie
= &rc
->pcie
;
82 cdns_plat_pcie
->is_rc
= is_rc
;
84 ret
= cdns_pcie_init_phy(dev
, cdns_plat_pcie
->pcie
);
86 dev_err(dev
, "failed to init phy\n");
89 pm_runtime_enable(dev
);
90 ret
= pm_runtime_get_sync(dev
);
92 dev_err(dev
, "pm_runtime_get_sync() failed\n");
96 ret
= cdns_pcie_host_setup(rc
);
100 if (!IS_ENABLED(CONFIG_PCIE_CADENCE_PLAT_EP
))
103 ep
= devm_kzalloc(dev
, sizeof(*ep
), GFP_KERNEL
);
108 ep
->pcie
.ops
= &cdns_plat_ops
;
109 cdns_plat_pcie
->pcie
= &ep
->pcie
;
110 cdns_plat_pcie
->is_rc
= is_rc
;
112 ret
= cdns_pcie_init_phy(dev
, cdns_plat_pcie
->pcie
);
114 dev_err(dev
, "failed to init phy\n");
118 pm_runtime_enable(dev
);
119 ret
= pm_runtime_get_sync(dev
);
121 dev_err(dev
, "pm_runtime_get_sync() failed\n");
125 ret
= cdns_pcie_ep_setup(ep
);
132 pm_runtime_put_sync(dev
);
133 pm_runtime_disable(dev
);
134 cdns_pcie_disable_phy(cdns_plat_pcie
->pcie
);
135 phy_count
= cdns_plat_pcie
->pcie
->phy_count
;
137 device_link_del(cdns_plat_pcie
->pcie
->link
[phy_count
]);
142 static void cdns_plat_pcie_shutdown(struct platform_device
*pdev
)
144 struct device
*dev
= &pdev
->dev
;
145 struct cdns_pcie
*pcie
= dev_get_drvdata(dev
);
148 ret
= pm_runtime_put_sync(dev
);
150 dev_dbg(dev
, "pm_runtime_put_sync failed\n");
152 pm_runtime_disable(dev
);
154 cdns_pcie_disable_phy(pcie
);
157 static const struct cdns_plat_pcie_of_data cdns_plat_pcie_host_of_data
= {
161 static const struct cdns_plat_pcie_of_data cdns_plat_pcie_ep_of_data
= {
165 static const struct of_device_id cdns_plat_pcie_of_match
[] = {
167 .compatible
= "cdns,cdns-pcie-host",
168 .data
= &cdns_plat_pcie_host_of_data
,
171 .compatible
= "cdns,cdns-pcie-ep",
172 .data
= &cdns_plat_pcie_ep_of_data
,
177 static struct platform_driver cdns_plat_pcie_driver
= {
180 .of_match_table
= cdns_plat_pcie_of_match
,
181 .pm
= &cdns_pcie_pm_ops
,
183 .probe
= cdns_plat_pcie_probe
,
184 .shutdown
= cdns_plat_pcie_shutdown
,
186 builtin_platform_driver(cdns_plat_pcie_driver
);