drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /* Copyright (C) 2019 IBM Corp. */
   3 #include <linux/bitops.h>
   4 #include <linux/init.h>
   5 #include <linux/io.h>
   6 #include <linux/kernel.h>
   7 #include <linux/mfd/syscon.h>
   8 #include <linux/mutex.h>
   9 #include <linux/of.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/pinctrl/pinctrl.h>
  12 #include <linux/pinctrl/pinmux.h>
  13 #include <linux/string.h>
  14 #include <linux/types.h>
  15
  16 #include "../core.h"
  17 #include "../pinctrl-utils.h"
  18 #include "pinctrl-aspeed.h"
  19
  20 #define SCU400          0x400 /* Multi-function Pin Control #1  */
  21 #define SCU404          0x404 /* Multi-function Pin Control #2  */
  22 #define SCU40C          0x40C /* Multi-function Pin Control #3  */
  23 #define SCU410          0x410 /* Multi-function Pin Control #4  */
  24 #define SCU414          0x414 /* Multi-function Pin Control #5  */
  25 #define SCU418          0x418 /* Multi-function Pin Control #6  */
  26 #define SCU41C          0x41C /* Multi-function Pin Control #7  */
  27 #define SCU430          0x430 /* Multi-function Pin Control #8  */
  28 #define SCU434          0x434 /* Multi-function Pin Control #9  */
  29 #define SCU438          0x438 /* Multi-function Pin Control #10 */
  30 #define SCU440          0x440 /* USB Multi-function Pin Control #12 */
  31 #define SCU450          0x450 /* Multi-function Pin Control #14 */
  32 #define SCU454          0x454 /* Multi-function Pin Control #15 */
  33 #define SCU458          0x458 /* Multi-function Pin Control #16 */
  34 #define SCU4B0          0x4B0 /* Multi-function Pin Control #17 */
  35 #define SCU4B4          0x4B4 /* Multi-function Pin Control #18 */
  36 #define SCU4B8          0x4B8 /* Multi-function Pin Control #19 */
  37 #define SCU4BC          0x4BC /* Multi-function Pin Control #20 */
  38 #define SCU4D4          0x4D4 /* Multi-function Pin Control #22 */
  39 #define SCU4D8          0x4D8 /* Multi-function Pin Control #23 */
  40 #define SCU500          0x500 /* Hardware Strap 1 */
  41 #define SCU510          0x510 /* Hardware Strap 2 */
  42 #define SCU610          0x610 /* Disable GPIO Internal Pull-Down #0 */
  43 #define SCU614          0x614 /* Disable GPIO Internal Pull-Down #1 */
  44 #define SCU618          0x618 /* Disable GPIO Internal Pull-Down #2 */
  45 #define SCU61C          0x61c /* Disable GPIO Internal Pull-Down #3 */
  46 #define SCU620          0x620 /* Disable GPIO Internal Pull-Down #4 */
  47 #define SCU634          0x634 /* Disable GPIO Internal Pull-Down #5 */
  48 #define SCU638          0x638 /* Disable GPIO Internal Pull-Down #6 */
  49 #define SCU694          0x694 /* Multi-function Pin Control #25 */
  50 #define SCU69C          0x69C /* Multi-function Pin Control #27 */
  51 #define SCUC20          0xC20 /* PCIE configuration Setting Control */
  52
  53 #define ASPEED_G6_NR_PINS 256
  54
  55 #define M24 0
  56 SIG_EXPR_LIST_DECL_SESG(M24, MDC3, MDIO3, SIG_DESC_SET(SCU410, 0));
  57 SIG_EXPR_LIST_DECL_SESG(M24, SCL11, I2C11, SIG_DESC_SET(SCU4B0, 0));
  58 PIN_DECL_2(M24, GPIOA0, MDC3, SCL11);
  59
  60 #define M25 1
  61 SIG_EXPR_LIST_DECL_SESG(M25, MDIO3, MDIO3, SIG_DESC_SET(SCU410, 1));
  62 SIG_EXPR_LIST_DECL_SESG(M25, SDA11, I2C11, SIG_DESC_SET(SCU4B0, 1));
  63 PIN_DECL_2(M25, GPIOA1, MDIO3, SDA11);
  64
  65 FUNC_GROUP_DECL(MDIO3, M24, M25);
  66 FUNC_GROUP_DECL(I2C11, M24, M25);
  67
  68 #define L26 2
  69 SIG_EXPR_LIST_DECL_SESG(L26, MDC4, MDIO4, SIG_DESC_SET(SCU410, 2));
  70 SIG_EXPR_LIST_DECL_SESG(L26, SCL12, I2C12, SIG_DESC_SET(SCU4B0, 2));
  71 PIN_DECL_2(L26, GPIOA2, MDC4, SCL12);
  72
  73 #define K24 3
  74 SIG_EXPR_LIST_DECL_SESG(K24, MDIO4, MDIO4, SIG_DESC_SET(SCU410, 3));
  75 SIG_EXPR_LIST_DECL_SESG(K24, SDA12, I2C12, SIG_DESC_SET(SCU4B0, 3));
  76 PIN_DECL_2(K24, GPIOA3, MDIO4, SDA12);
  77
  78 FUNC_GROUP_DECL(MDIO4, L26, K24);
  79 FUNC_GROUP_DECL(I2C12, L26, K24);
  80
  81 #define K26 4
  82 SIG_EXPR_LIST_DECL_SESG(K26, MACLINK1, MACLINK1, SIG_DESC_SET(SCU410, 4));
  83 SIG_EXPR_LIST_DECL_SESG(K26, SCL13, I2C13, SIG_DESC_SET(SCU4B0, 4));
  84 PIN_DECL_2(K26, GPIOA4, MACLINK1, SCL13);
  85 FUNC_GROUP_DECL(MACLINK1, K26);
  86
  87 #define L24 5
  88 SIG_EXPR_LIST_DECL_SESG(L24, MACLINK2, MACLINK2, SIG_DESC_SET(SCU410, 5));
  89 SIG_EXPR_LIST_DECL_SESG(L24, SDA13, I2C13, SIG_DESC_SET(SCU4B0, 5));
  90 PIN_DECL_2(L24, GPIOA5, MACLINK2, SDA13);
  91 FUNC_GROUP_DECL(MACLINK2, L24);
  92
  93 FUNC_GROUP_DECL(I2C13, K26, L24);
  94
  95 #define L23 6
  96 SIG_EXPR_LIST_DECL_SESG(L23, MACLINK3, MACLINK3, SIG_DESC_SET(SCU410, 6));
  97 SIG_EXPR_LIST_DECL_SESG(L23, SCL14, I2C14, SIG_DESC_SET(SCU4B0, 6));
  98 PIN_DECL_2(L23, GPIOA6, MACLINK3, SCL14);
  99 FUNC_GROUP_DECL(MACLINK3, L23);
 100
 101 #define K25 7
 102 SIG_EXPR_LIST_DECL_SESG(K25, MACLINK4, MACLINK4, SIG_DESC_SET(SCU410, 7));
 103 SIG_EXPR_LIST_DECL_SESG(K25, SDA14, I2C14, SIG_DESC_SET(SCU4B0, 7));
 104 PIN_DECL_2(K25, GPIOA7, MACLINK4, SDA14);
 105 FUNC_GROUP_DECL(MACLINK4, K25);
 106
 107 FUNC_GROUP_DECL(I2C14, L23, K25);
 108
 109 #define J26 8
 110 SIG_EXPR_LIST_DECL_SESG(J26, SALT1, SALT1, SIG_DESC_SET(SCU410, 8));
 111 SIG_EXPR_LIST_DECL_SESG(J26, LHAD0, LPCHC, SIG_DESC_SET(SCU4B0, 8));
 112 PIN_DECL_2(J26, GPIOB0, SALT1, LHAD0);
 113 FUNC_GROUP_DECL(SALT1, J26);
 114
 115 #define K23 9
 116 SIG_EXPR_LIST_DECL_SESG(K23, SALT2, SALT2, SIG_DESC_SET(SCU410, 9));
 117 SIG_EXPR_LIST_DECL_SESG(K23, LHAD1, LPCHC, SIG_DESC_SET(SCU4B0, 9));
 118 PIN_DECL_2(K23, GPIOB1, SALT2, LHAD1);
 119 FUNC_GROUP_DECL(SALT2, K23);
 120
 121 #define H26 10
 122 SIG_EXPR_LIST_DECL_SESG(H26, SALT3, SALT3, SIG_DESC_SET(SCU410, 10));
 123 SIG_EXPR_LIST_DECL_SESG(H26, LHAD2, LPCHC, SIG_DESC_SET(SCU4B0, 10));
 124 PIN_DECL_2(H26, GPIOB2, SALT3, LHAD2);
 125 FUNC_GROUP_DECL(SALT3, H26);
 126
 127 #define J25 11
 128 SIG_EXPR_LIST_DECL_SESG(J25, SALT4, SALT4, SIG_DESC_SET(SCU410, 11));
 129 SIG_EXPR_LIST_DECL_SESG(J25, LHAD3, LPCHC, SIG_DESC_SET(SCU4B0, 11));
 130 PIN_DECL_2(J25, GPIOB3, SALT4, LHAD3);
 131 FUNC_GROUP_DECL(SALT4, J25);
 132
 133 #define J23 12
 134 SIG_EXPR_LIST_DECL_SESG(J23, MDC2, MDIO2, SIG_DESC_SET(SCU410, 12));
 135 SIG_EXPR_LIST_DECL_SESG(J23, LHCLK, LPCHC, SIG_DESC_SET(SCU4B0, 12));
 136 PIN_DECL_2(J23, GPIOB4, MDC2, LHCLK);
 137
 138 #define G26 13
 139 SIG_EXPR_LIST_DECL_SESG(G26, MDIO2, MDIO2, SIG_DESC_SET(SCU410, 13));
 140 SIG_EXPR_LIST_DECL_SESG(G26, LHFRAME, LPCHC, SIG_DESC_SET(SCU4B0, 13));
 141 PIN_DECL_2(G26, GPIOB5, MDIO2, LHFRAME);
 142
 143 FUNC_GROUP_DECL(MDIO2, J23, G26);
 144
 145 #define H25 14
 146 SIG_EXPR_LIST_DECL_SESG(H25, TXD4, TXD4, SIG_DESC_SET(SCU410, 14));
 147 SIG_EXPR_LIST_DECL_SESG(H25, LHSIRQ, LHSIRQ, SIG_DESC_SET(SCU4B0, 14));
 148 PIN_DECL_2(H25, GPIOB6, TXD4, LHSIRQ);
 149 FUNC_GROUP_DECL(TXD4, H25);
 150 FUNC_GROUP_DECL(LHSIRQ, H25);
 151
 152 #define J24 15
 153 SIG_EXPR_LIST_DECL_SESG(J24, RXD4, RXD4, SIG_DESC_SET(SCU410, 15));
 154 SIG_EXPR_LIST_DECL_SESG(J24, LHRST, LPCHC, SIG_DESC_SET(SCU4B0, 15));
 155 PIN_DECL_2(J24, GPIOB7, RXD4, LHRST);
 156 FUNC_GROUP_DECL(RXD4, J24);
 157
 158 FUNC_GROUP_DECL(LPCHC, J26, K23, H26, J25, J23, G26, H25, J24);
 159
 160 #define H24 16
 161 SIG_EXPR_LIST_DECL_SESG(H24, RGMII3TXCK, RGMII3, SIG_DESC_SET(SCU410, 16),
 162                           SIG_DESC_SET(SCU510, 0));
 163 SIG_EXPR_LIST_DECL_SESG(H24, RMII3RCLKO, RMII3, SIG_DESC_SET(SCU410, 16),
 164                           SIG_DESC_CLEAR(SCU510, 0));
 165 PIN_DECL_2(H24, GPIOC0, RGMII3TXCK, RMII3RCLKO);
 166
 167 #define J22 17
 168 SIG_EXPR_LIST_DECL_SESG(J22, RGMII3TXCTL, RGMII3, SIG_DESC_SET(SCU410, 17),
 169                           SIG_DESC_SET(SCU510, 0));
 170 SIG_EXPR_LIST_DECL_SESG(J22, RMII3TXEN, RMII3, SIG_DESC_SET(SCU410, 17),
 171                           SIG_DESC_CLEAR(SCU510, 0));
 172 PIN_DECL_2(J22, GPIOC1, RGMII3TXCTL, RMII3TXEN);
 173
 174 #define H22 18
 175 SIG_EXPR_LIST_DECL_SESG(H22, RGMII3TXD0, RGMII3, SIG_DESC_SET(SCU410, 18),
 176                           SIG_DESC_SET(SCU510, 0));
 177 SIG_EXPR_LIST_DECL_SESG(H22, RMII3TXD0, RMII3, SIG_DESC_SET(SCU410, 18),
 178                           SIG_DESC_CLEAR(SCU510, 0));
 179 PIN_DECL_2(H22, GPIOC2, RGMII3TXD0, RMII3TXD0);
 180
 181 #define H23 19
 182 SIG_EXPR_LIST_DECL_SESG(H23, RGMII3TXD1, RGMII3, SIG_DESC_SET(SCU410, 19),
 183                           SIG_DESC_SET(SCU510, 0));
 184 SIG_EXPR_LIST_DECL_SESG(H23, RMII3TXD1, RMII3, SIG_DESC_SET(SCU410, 19),
 185                           SIG_DESC_CLEAR(SCU510, 0));
 186 PIN_DECL_2(H23, GPIOC3, RGMII3TXD1, RMII3TXD1);
 187
 188 #define G22 20
 189 SIG_EXPR_LIST_DECL_SESG(G22, RGMII3TXD2, RGMII3, SIG_DESC_SET(SCU410, 20),
 190                           SIG_DESC_SET(SCU510, 0));
 191 PIN_DECL_1(G22, GPIOC4, RGMII3TXD2);
 192
 193 #define F22 21
 194 SIG_EXPR_LIST_DECL_SESG(F22, RGMII3TXD3, RGMII3, SIG_DESC_SET(SCU410, 21),
 195                           SIG_DESC_SET(SCU510, 0));
 196 PIN_DECL_1(F22, GPIOC5, RGMII3TXD3);
 197
 198 #define G23 22
 199 SIG_EXPR_LIST_DECL_SESG(G23, RGMII3RXCK, RGMII3, SIG_DESC_SET(SCU410, 22),
 200                           SIG_DESC_SET(SCU510, 0));
 201 SIG_EXPR_LIST_DECL_SESG(G23, RMII3RCLKI, RMII3, SIG_DESC_SET(SCU410, 22),
 202                           SIG_DESC_CLEAR(SCU510, 0));
 203 PIN_DECL_2(G23, GPIOC6, RGMII3RXCK, RMII3RCLKI);
 204
 205 #define G24 23
 206 SIG_EXPR_LIST_DECL_SESG(G24, RGMII3RXCTL, RGMII3, SIG_DESC_SET(SCU410, 23),
 207                           SIG_DESC_SET(SCU510, 0));
 208 PIN_DECL_1(G24, GPIOC7, RGMII3RXCTL);
 209
 210 #define F23 24
 211 SIG_EXPR_LIST_DECL_SESG(F23, RGMII3RXD0, RGMII3, SIG_DESC_SET(SCU410, 24),
 212                           SIG_DESC_SET(SCU510, 0));
 213 SIG_EXPR_LIST_DECL_SESG(F23, RMII3RXD0, RMII3, SIG_DESC_SET(SCU410, 24),
 214                           SIG_DESC_CLEAR(SCU510, 0));
 215 PIN_DECL_2(F23, GPIOD0, RGMII3RXD0, RMII3RXD0);
 216
 217 #define F26 25
 218 SIG_EXPR_LIST_DECL_SESG(F26, RGMII3RXD1, RGMII3, SIG_DESC_SET(SCU410, 25),
 219                           SIG_DESC_SET(SCU510, 0));
 220 SIG_EXPR_LIST_DECL_SESG(F26, RMII3RXD1, RMII3, SIG_DESC_SET(SCU410, 25),
 221                           SIG_DESC_CLEAR(SCU510, 0));
 222 PIN_DECL_2(F26, GPIOD1, RGMII3RXD1, RMII3RXD1);
 223
 224 #define F25 26
 225 SIG_EXPR_LIST_DECL_SESG(F25, RGMII3RXD2, RGMII3, SIG_DESC_SET(SCU410, 26),
 226                           SIG_DESC_SET(SCU510, 0));
 227 SIG_EXPR_LIST_DECL_SESG(F25, RMII3CRSDV, RMII3, SIG_DESC_SET(SCU410, 26),
 228                           SIG_DESC_CLEAR(SCU510, 0));
 229 PIN_DECL_2(F25, GPIOD2, RGMII3RXD2, RMII3CRSDV);
 230
 231 #define E26 27
 232 SIG_EXPR_LIST_DECL_SESG(E26, RGMII3RXD3, RGMII3, SIG_DESC_SET(SCU410, 27),
 233                           SIG_DESC_SET(SCU510, 0));
 234 SIG_EXPR_LIST_DECL_SESG(E26, RMII3RXER, RMII3, SIG_DESC_SET(SCU410, 27),
 235                           SIG_DESC_CLEAR(SCU510, 0));
 236 PIN_DECL_2(E26, GPIOD3, RGMII3RXD3, RMII3RXER);
 237
 238 FUNC_GROUP_DECL(RGMII3, H24, J22, H22, H23, G22, F22, G23, G24, F23, F26, F25,
 239                 E26);
 240 FUNC_GROUP_DECL(RMII3, H24, J22, H22, H23, G23, F23, F26, F25, E26);
 241
 242 #define F24 28
 243 SIG_EXPR_LIST_DECL_SESG(F24, NCTS3, NCTS3, SIG_DESC_SET(SCU410, 28));
 244 SIG_EXPR_LIST_DECL_SESG(F24, RGMII4TXCK, RGMII4, SIG_DESC_SET(SCU4B0, 28),
 245                           SIG_DESC_SET(SCU510, 1));
 246 SIG_EXPR_LIST_DECL_SESG(F24, RMII4RCLKO, RMII4, SIG_DESC_SET(SCU4B0, 28),
 247                           SIG_DESC_CLEAR(SCU510, 1));
 248 PIN_DECL_3(F24, GPIOD4, NCTS3, RGMII4TXCK, RMII4RCLKO);
 249 FUNC_GROUP_DECL(NCTS3, F24);
 250
 251 #define E23 29
 252 SIG_EXPR_LIST_DECL_SESG(E23, NDCD3, NDCD3, SIG_DESC_SET(SCU410, 29));
 253 SIG_EXPR_LIST_DECL_SESG(E23, RGMII4TXCTL, RGMII4, SIG_DESC_SET(SCU4B0, 29),
 254                           SIG_DESC_SET(SCU510, 1));
 255 SIG_EXPR_LIST_DECL_SESG(E23, RMII4TXEN, RMII4, SIG_DESC_SET(SCU4B0, 29),
 256                           SIG_DESC_CLEAR(SCU510, 1));
 257 PIN_DECL_3(E23, GPIOD5, NDCD3, RGMII4TXCTL, RMII4TXEN);
 258 FUNC_GROUP_DECL(NDCD3, E23);
 259
 260 #define E24 30
 261 SIG_EXPR_LIST_DECL_SESG(E24, NDSR3, NDSR3, SIG_DESC_SET(SCU410, 30));
 262 SIG_EXPR_LIST_DECL_SESG(E24, RGMII4TXD0, RGMII4, SIG_DESC_SET(SCU4B0, 30),
 263                           SIG_DESC_SET(SCU510, 1));
 264 SIG_EXPR_LIST_DECL_SESG(E24, RMII4TXD0, RMII4, SIG_DESC_SET(SCU4B0, 30),
 265                           SIG_DESC_CLEAR(SCU510, 1));
 266 PIN_DECL_3(E24, GPIOD6, NDSR3, RGMII4TXD0, RMII4TXD0);
 267 FUNC_GROUP_DECL(NDSR3, E24);
 268
 269 #define E25 31
 270 SIG_EXPR_LIST_DECL_SESG(E25, NRI3, NRI3, SIG_DESC_SET(SCU410, 31));
 271 SIG_EXPR_LIST_DECL_SESG(E25, RGMII4TXD1, RGMII4, SIG_DESC_SET(SCU4B0, 31),
 272                           SIG_DESC_SET(SCU510, 1));
 273 SIG_EXPR_LIST_DECL_SESG(E25, RMII4TXD1, RMII4, SIG_DESC_SET(SCU4B0, 31),
 274                           SIG_DESC_CLEAR(SCU510, 1));
 275 PIN_DECL_3(E25, GPIOD7, NRI3, RGMII4TXD1, RMII4TXD1);
 276 FUNC_GROUP_DECL(NRI3, E25);
 277
 278 #define D26 32
 279 SIG_EXPR_LIST_DECL_SESG(D26, NDTR3, NDTR3, SIG_DESC_SET(SCU414, 0));
 280 SIG_EXPR_LIST_DECL_SESG(D26, RGMII4TXD2, RGMII4, SIG_DESC_SET(SCU4B4, 0),
 281                           SIG_DESC_SET(SCU510, 1));
 282 PIN_DECL_2(D26, GPIOE0, NDTR3, RGMII4TXD2);
 283 FUNC_GROUP_DECL(NDTR3, D26);
 284
 285 #define D24 33
 286 SIG_EXPR_LIST_DECL_SESG(D24, NRTS3, NRTS3, SIG_DESC_SET(SCU414, 1));
 287 SIG_EXPR_LIST_DECL_SESG(D24, RGMII4TXD3, RGMII4, SIG_DESC_SET(SCU4B4, 1),
 288                           SIG_DESC_SET(SCU510, 1));
 289 PIN_DECL_2(D24, GPIOE1, NRTS3, RGMII4TXD3);
 290 FUNC_GROUP_DECL(NRTS3, D24);
 291
 292 #define C25 34
 293 SIG_EXPR_LIST_DECL_SESG(C25, NCTS4, NCTS4, SIG_DESC_SET(SCU414, 2));
 294 SIG_EXPR_LIST_DECL_SESG(C25, RGMII4RXCK, RGMII4, SIG_DESC_SET(SCU4B4, 2),
 295                           SIG_DESC_SET(SCU510, 1));
 296 SIG_EXPR_LIST_DECL_SESG(C25, RMII4RCLKI, RMII4, SIG_DESC_SET(SCU4B4, 2),
 297                           SIG_DESC_CLEAR(SCU510, 1));
 298 PIN_DECL_3(C25, GPIOE2, NCTS4, RGMII4RXCK, RMII4RCLKI);
 299 FUNC_GROUP_DECL(NCTS4, C25);
 300
 301 #define C26 35
 302 SIG_EXPR_LIST_DECL_SESG(C26, NDCD4, NDCD4, SIG_DESC_SET(SCU414, 3));
 303 SIG_EXPR_LIST_DECL_SESG(C26, RGMII4RXCTL, RGMII4, SIG_DESC_SET(SCU4B4, 3),
 304                           SIG_DESC_SET(SCU510, 1));
 305 PIN_DECL_2(C26, GPIOE3, NDCD4, RGMII4RXCTL);
 306 FUNC_GROUP_DECL(NDCD4, C26);
 307
 308 #define C24 36
 309 SIG_EXPR_LIST_DECL_SESG(C24, NDSR4, NDSR4, SIG_DESC_SET(SCU414, 4));
 310 SIG_EXPR_LIST_DECL_SESG(C24, RGMII4RXD0, RGMII4, SIG_DESC_SET(SCU4B4, 4),
 311                           SIG_DESC_SET(SCU510, 1));
 312 SIG_EXPR_LIST_DECL_SESG(C24, RMII4RXD0, RMII4, SIG_DESC_SET(SCU4B4, 4),
 313                           SIG_DESC_CLEAR(SCU510, 1));
 314 PIN_DECL_3(C24, GPIOE4, NDSR4, RGMII4RXD0, RMII4RXD0);
 315 FUNC_GROUP_DECL(NDSR4, C24);
 316
 317 #define B26 37
 318 SIG_EXPR_LIST_DECL_SESG(B26, NRI4, NRI4, SIG_DESC_SET(SCU414, 5));
 319 SIG_EXPR_LIST_DECL_SESG(B26, RGMII4RXD1, RGMII4, SIG_DESC_SET(SCU4B4, 5),
 320                           SIG_DESC_SET(SCU510, 1));
 321 SIG_EXPR_LIST_DECL_SESG(B26, RMII4RXD1, RMII4, SIG_DESC_SET(SCU4B4, 5),
 322                           SIG_DESC_CLEAR(SCU510, 1));
 323 PIN_DECL_3(B26, GPIOE5, NRI4, RGMII4RXD1, RMII4RXD1);
 324 FUNC_GROUP_DECL(NRI4, B26);
 325
 326 #define B25 38
 327 SIG_EXPR_LIST_DECL_SESG(B25, NDTR4, NDTR4, SIG_DESC_SET(SCU414, 6));
 328 SIG_EXPR_LIST_DECL_SESG(B25, RGMII4RXD2, RGMII4, SIG_DESC_SET(SCU4B4, 6),
 329                           SIG_DESC_SET(SCU510, 1));
 330 SIG_EXPR_LIST_DECL_SESG(B25, RMII4CRSDV, RMII4, SIG_DESC_SET(SCU4B4, 6),
 331                           SIG_DESC_CLEAR(SCU510, 1));
 332 PIN_DECL_3(B25, GPIOE6, NDTR4, RGMII4RXD2, RMII4CRSDV);
 333 FUNC_GROUP_DECL(NDTR4, B25);
 334
 335 #define B24 39
 336 SIG_EXPR_LIST_DECL_SESG(B24, NRTS4, NRTS4, SIG_DESC_SET(SCU414, 7));
 337 SIG_EXPR_LIST_DECL_SESG(B24, RGMII4RXD3, RGMII4, SIG_DESC_SET(SCU4B4, 7),
 338                           SIG_DESC_SET(SCU510, 1));
 339 SIG_EXPR_LIST_DECL_SESG(B24, RMII4RXER, RMII4, SIG_DESC_SET(SCU4B4, 7),
 340                           SIG_DESC_CLEAR(SCU510, 1));
 341 PIN_DECL_3(B24, GPIOE7, NRTS4, RGMII4RXD3, RMII4RXER);
 342 FUNC_GROUP_DECL(NRTS4, B24);
 343
 344 FUNC_GROUP_DECL(RGMII4, F24, E23, E24, E25, D26, D24, C25, C26, C24, B26, B25,
 345                 B24);
 346 FUNC_GROUP_DECL(RMII4, F24, E23, E24, E25, C25, C24, B26, B25, B24);
 347
 348 #define D22 40
 349 SIG_EXPR_LIST_DECL_SESG(D22, SD1CLK, SD1, SIG_DESC_SET(SCU414, 8));
 350 SIG_EXPR_LIST_DECL_SEMG(D22, PWM8, PWM8G0, PWM8, SIG_DESC_SET(SCU414, 8));
 351 PIN_DECL_2(D22, GPIOF0, SD1CLK, PWM8);
 352 GROUP_DECL(PWM8G0, D22);
 353
 354 #define E22 41
 355 SIG_EXPR_LIST_DECL_SESG(E22, SD1CMD, SD1, SIG_DESC_SET(SCU414, 9));
 356 SIG_EXPR_LIST_DECL_SEMG(E22, PWM9, PWM9G0, PWM9, SIG_DESC_SET(SCU4B4, 9));
 357 PIN_DECL_2(E22, GPIOF1, SD1CMD, PWM9);
 358 GROUP_DECL(PWM9G0, E22);
 359
 360 #define D23 42
 361 SIG_EXPR_LIST_DECL_SESG(D23, SD1DAT0, SD1, SIG_DESC_SET(SCU414, 10));
 362 SIG_EXPR_LIST_DECL_SEMG(D23, PWM10, PWM10G0, PWM10, SIG_DESC_SET(SCU4B4, 10));
 363 PIN_DECL_2(D23, GPIOF2, SD1DAT0, PWM10);
 364 GROUP_DECL(PWM10G0, D23);
 365
 366 #define C23 43
 367 SIG_EXPR_LIST_DECL_SESG(C23, SD1DAT1, SD1, SIG_DESC_SET(SCU414, 11));
 368 SIG_EXPR_LIST_DECL_SEMG(C23, PWM11, PWM11G0, PWM11, SIG_DESC_SET(SCU4B4, 11));
 369 PIN_DECL_2(C23, GPIOF3, SD1DAT1, PWM11);
 370 GROUP_DECL(PWM11G0, C23);
 371
 372 #define C22 44
 373 SIG_EXPR_LIST_DECL_SESG(C22, SD1DAT2, SD1, SIG_DESC_SET(SCU414, 12));
 374 SIG_EXPR_LIST_DECL_SEMG(C22, PWM12, PWM12G0, PWM12, SIG_DESC_SET(SCU4B4, 12));
 375 PIN_DECL_2(C22, GPIOF4, SD1DAT2, PWM12);
 376 GROUP_DECL(PWM12G0, C22);
 377
 378 #define A25 45
 379 SIG_EXPR_LIST_DECL_SESG(A25, SD1DAT3, SD1, SIG_DESC_SET(SCU414, 13));
 380 SIG_EXPR_LIST_DECL_SEMG(A25, PWM13, PWM13G0, PWM13, SIG_DESC_SET(SCU4B4, 13));
 381 PIN_DECL_2(A25, GPIOF5, SD1DAT3, PWM13);
 382 GROUP_DECL(PWM13G0, A25);
 383
 384 #define A24 46
 385 SIG_EXPR_LIST_DECL_SESG(A24, SD1CD, SD1, SIG_DESC_SET(SCU414, 14));
 386 SIG_EXPR_LIST_DECL_SEMG(A24, PWM14, PWM14G0, PWM14, SIG_DESC_SET(SCU4B4, 14));
 387 PIN_DECL_2(A24, GPIOF6, SD1CD, PWM14);
 388 GROUP_DECL(PWM14G0, A24);
 389
 390 #define A23 47
 391 SIG_EXPR_LIST_DECL_SESG(A23, SD1WP, SD1, SIG_DESC_SET(SCU414, 15));
 392 SIG_EXPR_LIST_DECL_SEMG(A23, PWM15, PWM15G0, PWM15, SIG_DESC_SET(SCU4B4, 15));
 393 PIN_DECL_2(A23, GPIOF7, SD1WP, PWM15);
 394 GROUP_DECL(PWM15G0, A23);
 395
 396 FUNC_GROUP_DECL(SD1, D22, E22, D23, C23, C22, A25, A24, A23);
 397
 398 #define E21 48
 399 SIG_EXPR_LIST_DECL_SESG(E21, TXD6, UART6, SIG_DESC_SET(SCU414, 16));
 400 SIG_EXPR_LIST_DECL_SESG(E21, SD2CLK, SD2, SIG_DESC_SET(SCU4B4, 16),
 401                           SIG_DESC_SET(SCU450, 1));
 402 SIG_EXPR_LIST_DECL_SEMG(E21, SALT9, SALT9G0, SALT9, SIG_DESC_SET(SCU694, 16));
 403 PIN_DECL_3(E21, GPIOG0, TXD6, SD2CLK, SALT9);
 404 GROUP_DECL(SALT9G0, E21);
 405
 406 #define B22 49
 407 SIG_EXPR_LIST_DECL_SESG(B22, RXD6, UART6, SIG_DESC_SET(SCU414, 17));
 408 SIG_EXPR_LIST_DECL_SESG(B22, SD2CMD, SD2, SIG_DESC_SET(SCU4B4, 17),
 409                           SIG_DESC_SET(SCU450, 1));
 410 SIG_EXPR_LIST_DECL_SEMG(B22, SALT10, SALT10G0, SALT10,
 411                         SIG_DESC_SET(SCU694, 17));
 412 PIN_DECL_3(B22, GPIOG1, RXD6, SD2CMD, SALT10);
 413 GROUP_DECL(SALT10G0, B22);
 414
 415 FUNC_GROUP_DECL(UART6, E21, B22);
 416
 417 #define C21 50
 418 SIG_EXPR_LIST_DECL_SESG(C21, TXD7, UART7, SIG_DESC_SET(SCU414, 18));
 419 SIG_EXPR_LIST_DECL_SESG(C21, SD2DAT0, SD2, SIG_DESC_SET(SCU4B4, 18),
 420                           SIG_DESC_SET(SCU450, 1));
 421 SIG_EXPR_LIST_DECL_SEMG(C21, SALT11, SALT11G0, SALT11,
 422                         SIG_DESC_SET(SCU694, 18));
 423 PIN_DECL_3(C21, GPIOG2, TXD7, SD2DAT0, SALT11);
 424 GROUP_DECL(SALT11G0, C21);
 425
 426 #define A22 51
 427 SIG_EXPR_LIST_DECL_SESG(A22, RXD7, UART7, SIG_DESC_SET(SCU414, 19));
 428 SIG_EXPR_LIST_DECL_SESG(A22, SD2DAT1, SD2, SIG_DESC_SET(SCU4B4, 19),
 429                           SIG_DESC_SET(SCU450, 1));
 430 SIG_EXPR_LIST_DECL_SEMG(A22, SALT12, SALT12G0, SALT12,
 431                         SIG_DESC_SET(SCU694, 19));
 432 PIN_DECL_3(A22, GPIOG3, RXD7, SD2DAT1, SALT12);
 433 GROUP_DECL(SALT12G0, A22);
 434
 435 FUNC_GROUP_DECL(UART7, C21, A22);
 436
 437 #define A21 52
 438 SIG_EXPR_LIST_DECL_SESG(A21, TXD8, UART8, SIG_DESC_SET(SCU414, 20));
 439 SIG_EXPR_LIST_DECL_SESG(A21, SD2DAT2, SD2, SIG_DESC_SET(SCU4B4, 20),
 440                           SIG_DESC_SET(SCU450, 1));
 441 SIG_EXPR_LIST_DECL_SEMG(A21, SALT13, SALT13G0, SALT13,
 442                         SIG_DESC_SET(SCU694, 20));
 443 PIN_DECL_3(A21, GPIOG4, TXD8, SD2DAT2, SALT13);
 444 GROUP_DECL(SALT13G0, A21);
 445
 446 #define E20 53
 447 SIG_EXPR_LIST_DECL_SESG(E20, RXD8, UART8, SIG_DESC_SET(SCU414, 21));
 448 SIG_EXPR_LIST_DECL_SESG(E20, SD2DAT3, SD2, SIG_DESC_SET(SCU4B4, 21),
 449                           SIG_DESC_SET(SCU450, 1));
 450 SIG_EXPR_LIST_DECL_SEMG(E20, SALT14, SALT14G0, SALT14,
 451                         SIG_DESC_SET(SCU694, 21));
 452 PIN_DECL_3(E20, GPIOG5, RXD8, SD2DAT3, SALT14);
 453 GROUP_DECL(SALT14G0, E20);
 454
 455 FUNC_GROUP_DECL(UART8, A21, E20);
 456
 457 #define D21 54
 458 SIG_EXPR_LIST_DECL_SESG(D21, TXD9, UART9, SIG_DESC_SET(SCU414, 22));
 459 SIG_EXPR_LIST_DECL_SESG(D21, SD2CD, SD2, SIG_DESC_SET(SCU4B4, 22),
 460                           SIG_DESC_SET(SCU450, 1));
 461 SIG_EXPR_LIST_DECL_SEMG(D21, SALT15, SALT15G0, SALT15,
 462                         SIG_DESC_SET(SCU694, 22));
 463 PIN_DECL_3(D21, GPIOG6, TXD9, SD2CD, SALT15);
 464 GROUP_DECL(SALT15G0, D21);
 465
 466 #define B21 55
 467 SIG_EXPR_LIST_DECL_SESG(B21, RXD9, UART9, SIG_DESC_SET(SCU414, 23));
 468 SIG_EXPR_LIST_DECL_SESG(B21, SD2WP, SD2, SIG_DESC_SET(SCU4B4, 23),
 469                         SIG_DESC_SET(SCU450, 1));
 470 SIG_EXPR_LIST_DECL_SEMG(B21, SALT16, SALT16G0, SALT16,
 471                         SIG_DESC_SET(SCU694, 23));
 472 PIN_DECL_3(B21, GPIOG7, RXD9, SD2WP, SALT16);
 473 GROUP_DECL(SALT16G0, B21);
 474
 475 FUNC_GROUP_DECL(UART9, D21, B21);
 476
 477 FUNC_GROUP_DECL(SD2, E21, B22, C21, A22, A21, E20, D21, B21);
 478
 479 #define A18 56
 480 SIG_EXPR_LIST_DECL_SESG(A18, SGPM1CLK, SGPM1, SIG_DESC_SET(SCU414, 24));
 481 PIN_DECL_1(A18, GPIOH0, SGPM1CLK);
 482
 483 #define B18 57
 484 SIG_EXPR_LIST_DECL_SESG(B18, SGPM1LD, SGPM1, SIG_DESC_SET(SCU414, 25));
 485 PIN_DECL_1(B18, GPIOH1, SGPM1LD);
 486
 487 #define C18 58
 488 SIG_EXPR_LIST_DECL_SESG(C18, SGPM1O, SGPM1, SIG_DESC_SET(SCU414, 26));
 489 PIN_DECL_1(C18, GPIOH2, SGPM1O);
 490
 491 #define A17 59
 492 SIG_EXPR_LIST_DECL_SESG(A17, SGPM1I, SGPM1, SIG_DESC_SET(SCU414, 27));
 493 PIN_DECL_1(A17, GPIOH3, SGPM1I);
 494
 495 FUNC_GROUP_DECL(SGPM1, A18, B18, C18, A17);
 496
 497 #define D18 60
 498 SIG_EXPR_LIST_DECL_SESG(D18, SGPS1CK, SGPS1, SIG_DESC_SET(SCU414, 28));
 499 SIG_EXPR_LIST_DECL_SESG(D18, SCL15, I2C15, SIG_DESC_SET(SCU4B4, 28));
 500 PIN_DECL_2(D18, GPIOH4, SGPS1CK, SCL15);
 501
 502 #define B17 61
 503 SIG_EXPR_LIST_DECL_SESG(B17, SGPS1LD, SGPS1, SIG_DESC_SET(SCU414, 29));
 504 SIG_EXPR_LIST_DECL_SESG(B17, SDA15, I2C15, SIG_DESC_SET(SCU4B4, 29));
 505 PIN_DECL_2(B17, GPIOH5, SGPS1LD, SDA15);
 506
 507 FUNC_GROUP_DECL(I2C15, D18, B17);
 508
 509 #define C17 62
 510 SIG_EXPR_LIST_DECL_SESG(C17, SGPS1O, SGPS1, SIG_DESC_SET(SCU414, 30));
 511 SIG_EXPR_LIST_DECL_SESG(C17, SCL16, I2C16, SIG_DESC_SET(SCU4B4, 30));
 512 PIN_DECL_2(C17, GPIOH6, SGPS1O, SCL16);
 513
 514 #define E18 63
 515 SIG_EXPR_LIST_DECL_SESG(E18, SGPS1I, SGPS1, SIG_DESC_SET(SCU414, 31));
 516 SIG_EXPR_LIST_DECL_SESG(E18, SDA16, I2C16, SIG_DESC_SET(SCU4B4, 31));
 517 PIN_DECL_2(E18, GPIOH7, SGPS1I, SDA16);
 518
 519 FUNC_GROUP_DECL(I2C16, C17, E18);
 520 FUNC_GROUP_DECL(SGPS1, D18, B17, C17, E18);
 521
 522 #define D17 64
 523 SIG_EXPR_LIST_DECL_SESG(D17, MTRSTN, JTAGM, SIG_DESC_SET(SCU418, 0));
 524 SIG_EXPR_LIST_DECL_SEMG(D17, TXD12, UART12G0, UART12, SIG_DESC_SET(SCU4B8, 0));
 525 PIN_DECL_2(D17, GPIOI0, MTRSTN, TXD12);
 526
 527 #define A16 65
 528 SIG_EXPR_LIST_DECL_SESG(A16, MTDI, JTAGM, SIG_DESC_SET(SCU418, 1));
 529 SIG_EXPR_LIST_DECL_SEMG(A16, RXD12, UART12G0, UART12, SIG_DESC_SET(SCU4B8, 1));
 530 PIN_DECL_2(A16, GPIOI1, MTDI, RXD12);
 531
 532 GROUP_DECL(UART12G0, D17, A16);
 533
 534 #define E17 66
 535 SIG_EXPR_LIST_DECL_SESG(E17, MTCK, JTAGM, SIG_DESC_SET(SCU418, 2));
 536 SIG_EXPR_LIST_DECL_SEMG(E17, TXD13, UART13G0, UART13, SIG_DESC_SET(SCU4B8, 2));
 537 PIN_DECL_2(E17, GPIOI2, MTCK, TXD13);
 538
 539 #define D16 67
 540 SIG_EXPR_LIST_DECL_SESG(D16, MTMS, JTAGM, SIG_DESC_SET(SCU418, 3));
 541 SIG_EXPR_LIST_DECL_SEMG(D16, RXD13, UART13G0, UART13, SIG_DESC_SET(SCU4B8, 3));
 542 PIN_DECL_2(D16, GPIOI3, MTMS, RXD13);
 543
 544 GROUP_DECL(UART13G0, E17, D16);
 545
 546 #define C16 68
 547 SIG_EXPR_LIST_DECL_SESG(C16, MTDO, JTAGM, SIG_DESC_SET(SCU418, 4));
 548 PIN_DECL_1(C16, GPIOI4, MTDO);
 549
 550 FUNC_GROUP_DECL(JTAGM, D17, A16, E17, D16, C16);
 551
 552 #define E16 69
 553 SIG_EXPR_LIST_DECL_SESG(E16, SIOPBO, SIOPBO, SIG_DESC_SET(SCU418, 5));
 554 PIN_DECL_1(E16, GPIOI5, SIOPBO);
 555 FUNC_GROUP_DECL(SIOPBO, E16);
 556
 557 #define B16 70
 558 SIG_EXPR_LIST_DECL_SESG(B16, SIOPBI, SIOPBI, SIG_DESC_SET(SCU418, 6));
 559 PIN_DECL_1(B16, GPIOI6, SIOPBI);
 560 FUNC_GROUP_DECL(SIOPBI, B16);
 561
 562 #define A15 71
 563 SIG_EXPR_LIST_DECL_SESG(A15, BMCINT, BMCINT, SIG_DESC_SET(SCU418, 7));
 564 SIG_EXPR_LIST_DECL_SESG(A15, SIOSCI, SIOSCI, SIG_DESC_SET(SCU4B8, 7));
 565 PIN_DECL_2(A15, GPIOI7, BMCINT, SIOSCI);
 566 FUNC_GROUP_DECL(BMCINT, A15);
 567 FUNC_GROUP_DECL(SIOSCI, A15);
 568
 569 #define B20 72
 570 SIG_EXPR_LIST_DECL_SEMG(B20, I3C3SCL, HVI3C3, I3C3, SIG_DESC_SET(SCU418, 8));
 571 SIG_EXPR_LIST_DECL_SESG(B20, SCL1, I2C1, SIG_DESC_SET(SCU4B8, 8));
 572 PIN_DECL_2(B20, GPIOJ0, I3C3SCL, SCL1);
 573
 574 #define A20 73
 575 SIG_EXPR_LIST_DECL_SEMG(A20, I3C3SDA, HVI3C3, I3C3, SIG_DESC_SET(SCU418, 9));
 576 SIG_EXPR_LIST_DECL_SESG(A20, SDA1, I2C1, SIG_DESC_SET(SCU4B8, 9));
 577 PIN_DECL_2(A20, GPIOJ1, I3C3SDA, SDA1);
 578
 579 GROUP_DECL(HVI3C3, B20, A20);
 580 FUNC_GROUP_DECL(I2C1, B20, A20);
 581
 582 #define E19 74
 583 SIG_EXPR_LIST_DECL_SEMG(E19, I3C4SCL, HVI3C4, I3C4, SIG_DESC_SET(SCU418, 10));
 584 SIG_EXPR_LIST_DECL_SESG(E19, SCL2, I2C2, SIG_DESC_SET(SCU4B8, 10));
 585 PIN_DECL_2(E19, GPIOJ2, I3C4SCL, SCL2);
 586
 587 #define D20 75
 588 SIG_EXPR_LIST_DECL_SEMG(D20, I3C4SDA, HVI3C4, I3C4, SIG_DESC_SET(SCU418, 11));
 589 SIG_EXPR_LIST_DECL_SESG(D20, SDA2, I2C2, SIG_DESC_SET(SCU4B8, 11));
 590 PIN_DECL_2(D20, GPIOJ3, I3C4SDA, SDA2);
 591
 592 GROUP_DECL(HVI3C4, E19, D20);
 593 FUNC_GROUP_DECL(I2C2, E19, D20);
 594
 595 #define C19 76
 596 SIG_EXPR_LIST_DECL_SESG(C19, I3C5SCL, I3C5, SIG_DESC_SET(SCU418, 12));
 597 SIG_EXPR_LIST_DECL_SESG(C19, SCL3, I2C3, SIG_DESC_SET(SCU4B8, 12));
 598 PIN_DECL_2(C19, GPIOJ4, I3C5SCL, SCL3);
 599
 600 #define A19 77
 601 SIG_EXPR_LIST_DECL_SESG(A19, I3C5SDA, I3C5, SIG_DESC_SET(SCU418, 13));
 602 SIG_EXPR_LIST_DECL_SESG(A19, SDA3, I2C3, SIG_DESC_SET(SCU4B8, 13));
 603 PIN_DECL_2(A19, GPIOJ5, I3C5SDA, SDA3);
 604
 605 FUNC_GROUP_DECL(I3C5, C19, A19);
 606 FUNC_GROUP_DECL(I2C3, C19, A19);
 607
 608 #define C20 78
 609 SIG_EXPR_LIST_DECL_SESG(C20, I3C6SCL, I3C6, SIG_DESC_SET(SCU418, 14));
 610 SIG_EXPR_LIST_DECL_SESG(C20, SCL4, I2C4, SIG_DESC_SET(SCU4B8, 14));
 611 PIN_DECL_2(C20, GPIOJ6, I3C6SCL, SCL4);
 612
 613 #define D19 79
 614 SIG_EXPR_LIST_DECL_SESG(D19, I3C6SDA, I3C6, SIG_DESC_SET(SCU418, 15));
 615 SIG_EXPR_LIST_DECL_SESG(D19, SDA4, I2C4, SIG_DESC_SET(SCU4B8, 15));
 616 PIN_DECL_2(D19, GPIOJ7, I3C6SDA, SDA4);
 617
 618 FUNC_GROUP_DECL(I3C6, C20, D19);
 619 FUNC_GROUP_DECL(I2C4, C20, D19);
 620
 621 #define A11 80
 622 SIG_EXPR_LIST_DECL_SESG(A11, SCL5, I2C5, SIG_DESC_SET(SCU418, 16));
 623 PIN_DECL_1(A11, GPIOK0, SCL5);
 624
 625 #define C11 81
 626 SIG_EXPR_LIST_DECL_SESG(C11, SDA5, I2C5, SIG_DESC_SET(SCU418, 17));
 627 PIN_DECL_1(C11, GPIOK1, SDA5);
 628
 629 FUNC_GROUP_DECL(I2C5, A11, C11);
 630
 631 #define D12 82
 632 SIG_EXPR_LIST_DECL_SESG(D12, SCL6, I2C6, SIG_DESC_SET(SCU418, 18));
 633 PIN_DECL_1(D12, GPIOK2, SCL6);
 634
 635 #define E13 83
 636 SIG_EXPR_LIST_DECL_SESG(E13, SDA6, I2C6, SIG_DESC_SET(SCU418, 19));
 637 PIN_DECL_1(E13, GPIOK3, SDA6);
 638
 639 FUNC_GROUP_DECL(I2C6, D12, E13);
 640
 641 #define D11 84
 642 SIG_EXPR_LIST_DECL_SESG(D11, SCL7, I2C7, SIG_DESC_SET(SCU418, 20));
 643 PIN_DECL_1(D11, GPIOK4, SCL7);
 644
 645 #define E11 85
 646 SIG_EXPR_LIST_DECL_SESG(E11, SDA7, I2C7, SIG_DESC_SET(SCU418, 21));
 647 PIN_DECL_1(E11, GPIOK5, SDA7);
 648
 649 FUNC_GROUP_DECL(I2C7, D11, E11);
 650
 651 #define F13 86
 652 SIG_EXPR_LIST_DECL_SESG(F13, SCL8, I2C8, SIG_DESC_SET(SCU418, 22));
 653 PIN_DECL_1(F13, GPIOK6, SCL8);
 654
 655 #define E12 87
 656 SIG_EXPR_LIST_DECL_SESG(E12, SDA8, I2C8, SIG_DESC_SET(SCU418, 23));
 657 PIN_DECL_1(E12, GPIOK7, SDA8);
 658
 659 FUNC_GROUP_DECL(I2C8, F13, E12);
 660
 661 #define D15 88
 662 SIG_EXPR_LIST_DECL_SESG(D15, SCL9, I2C9, SIG_DESC_SET(SCU418, 24));
 663 PIN_DECL_1(D15, GPIOL0, SCL9);
 664
 665 #define A14 89
 666 SIG_EXPR_LIST_DECL_SESG(A14, SDA9, I2C9, SIG_DESC_SET(SCU418, 25));
 667 PIN_DECL_1(A14, GPIOL1, SDA9);
 668
 669 FUNC_GROUP_DECL(I2C9, D15, A14);
 670
 671 #define E15 90
 672 SIG_EXPR_LIST_DECL_SESG(E15, SCL10, I2C10, SIG_DESC_SET(SCU418, 26));
 673 PIN_DECL_1(E15, GPIOL2, SCL10);
 674
 675 #define A13 91
 676 SIG_EXPR_LIST_DECL_SESG(A13, SDA10, I2C10, SIG_DESC_SET(SCU418, 27));
 677 PIN_DECL_1(A13, GPIOL3, SDA10);
 678
 679 FUNC_GROUP_DECL(I2C10, E15, A13);
 680
 681 #define C15 92
 682 SSSF_PIN_DECL(C15, GPIOL4, TXD3, SIG_DESC_SET(SCU418, 28));
 683
 684 #define F15 93
 685 SSSF_PIN_DECL(F15, GPIOL5, RXD3, SIG_DESC_SET(SCU418, 29));
 686
 687 #define B14 94
 688 SSSF_PIN_DECL(B14, GPIOL6, VGAHS, SIG_DESC_SET(SCU418, 30));
 689
 690 #define C14 95
 691 SSSF_PIN_DECL(C14, GPIOL7, VGAVS, SIG_DESC_SET(SCU418, 31));
 692
 693 #define D14 96
 694 SSSF_PIN_DECL(D14, GPIOM0, NCTS1, SIG_DESC_SET(SCU41C, 0));
 695
 696 #define B13 97
 697 SSSF_PIN_DECL(B13, GPIOM1, NDCD1, SIG_DESC_SET(SCU41C, 1));
 698
 699 #define A12 98
 700 SSSF_PIN_DECL(A12, GPIOM2, NDSR1, SIG_DESC_SET(SCU41C, 2));
 701
 702 #define E14 99
 703 SSSF_PIN_DECL(E14, GPIOM3, NRI1, SIG_DESC_SET(SCU41C, 3));
 704
 705 #define B12 100
 706 SSSF_PIN_DECL(B12, GPIOM4, NDTR1, SIG_DESC_SET(SCU41C, 4));
 707
 708 #define C12 101
 709 SSSF_PIN_DECL(C12, GPIOM5, NRTS1, SIG_DESC_SET(SCU41C, 5));
 710
 711 #define C13 102
 712 SSSF_PIN_DECL(C13, GPIOM6, TXD1, SIG_DESC_SET(SCU41C, 6));
 713
 714 #define D13 103
 715 SSSF_PIN_DECL(D13, GPIOM7, RXD1, SIG_DESC_SET(SCU41C, 7));
 716
 717 #define P25 104
 718 SSSF_PIN_DECL(P25, GPION0, NCTS2, SIG_DESC_SET(SCU41C, 8));
 719
 720 #define N23 105
 721 SSSF_PIN_DECL(N23, GPION1, NDCD2, SIG_DESC_SET(SCU41C, 9));
 722
 723 #define N25 106
 724 SSSF_PIN_DECL(N25, GPION2, NDSR2, SIG_DESC_SET(SCU41C, 10));
 725
 726 #define N24 107
 727 SSSF_PIN_DECL(N24, GPION3, NRI2, SIG_DESC_SET(SCU41C, 11));
 728
 729 #define P26 108
 730 SSSF_PIN_DECL(P26, GPION4, NDTR2, SIG_DESC_SET(SCU41C, 12));
 731
 732 #define M23 109
 733 SSSF_PIN_DECL(M23, GPION5, NRTS2, SIG_DESC_SET(SCU41C, 13));
 734
 735 #define N26 110
 736 SSSF_PIN_DECL(N26, GPION6, TXD2, SIG_DESC_SET(SCU41C, 14));
 737
 738 #define M26 111
 739 SSSF_PIN_DECL(M26, GPION7, RXD2, SIG_DESC_SET(SCU41C, 15));
 740
 741 #define AD26 112
 742 SSSF_PIN_DECL(AD26, GPIOO0, PWM0, SIG_DESC_SET(SCU41C, 16));
 743
 744 #define AD22 113
 745 SSSF_PIN_DECL(AD22, GPIOO1, PWM1, SIG_DESC_SET(SCU41C, 17));
 746
 747 #define AD23 114
 748 SSSF_PIN_DECL(AD23, GPIOO2, PWM2, SIG_DESC_SET(SCU41C, 18));
 749
 750 #define AD24 115
 751 SSSF_PIN_DECL(AD24, GPIOO3, PWM3, SIG_DESC_SET(SCU41C, 19));
 752
 753 #define AD25 116
 754 SSSF_PIN_DECL(AD25, GPIOO4, PWM4, SIG_DESC_SET(SCU41C, 20));
 755
 756 #define AC22 117
 757 SSSF_PIN_DECL(AC22, GPIOO5, PWM5, SIG_DESC_SET(SCU41C, 21));
 758
 759 #define AC24 118
 760 SSSF_PIN_DECL(AC24, GPIOO6, PWM6, SIG_DESC_SET(SCU41C, 22));
 761
 762 #define AC23 119
 763 SSSF_PIN_DECL(AC23, GPIOO7, PWM7, SIG_DESC_SET(SCU41C, 23));
 764
 765 #define AB22 120
 766 SIG_EXPR_LIST_DECL_SEMG(AB22, PWM8, PWM8G1, PWM8, SIG_DESC_SET(SCU41C, 24));
 767 SIG_EXPR_LIST_DECL_SESG(AB22, THRUIN0, THRU0, SIG_DESC_SET(SCU4BC, 24));
 768 PIN_DECL_2(AB22, GPIOP0, PWM8, THRUIN0);
 769 GROUP_DECL(PWM8G1, AB22);
 770 FUNC_DECL_2(PWM8, PWM8G0, PWM8G1);
 771
 772 #define W24 121
 773 SIG_EXPR_LIST_DECL_SEMG(W24, PWM9, PWM9G1, PWM9, SIG_DESC_SET(SCU41C, 25));
 774 SIG_EXPR_LIST_DECL_SESG(W24, THRUOUT0, THRU0, SIG_DESC_SET(SCU4BC, 25));
 775 PIN_DECL_2(W24, GPIOP1, PWM9, THRUOUT0);
 776
 777 FUNC_GROUP_DECL(THRU0, AB22, W24);
 778
 779 GROUP_DECL(PWM9G1, W24);
 780 FUNC_DECL_2(PWM9, PWM9G0, PWM9G1);
 781
 782 #define AA23 122
 783 SIG_EXPR_LIST_DECL_SEMG(AA23, PWM10, PWM10G1, PWM10, SIG_DESC_SET(SCU41C, 26));
 784 SIG_EXPR_LIST_DECL_SESG(AA23, THRUIN1, THRU1, SIG_DESC_SET(SCU4BC, 26));
 785 PIN_DECL_2(AA23, GPIOP2, PWM10, THRUIN1);
 786 GROUP_DECL(PWM10G1, AA23);
 787 FUNC_DECL_2(PWM10, PWM10G0, PWM10G1);
 788
 789 #define AA24 123
 790 SIG_EXPR_LIST_DECL_SEMG(AA24, PWM11, PWM11G1, PWM11, SIG_DESC_SET(SCU41C, 27));
 791 SIG_EXPR_LIST_DECL_SESG(AA24, THRUOUT1, THRU1, SIG_DESC_SET(SCU4BC, 27));
 792 PIN_DECL_2(AA24, GPIOP3, PWM11, THRUOUT1);
 793 GROUP_DECL(PWM11G1, AA24);
 794 FUNC_DECL_2(PWM11, PWM11G0, PWM11G1);
 795
 796 FUNC_GROUP_DECL(THRU1, AA23, AA24);
 797
 798 #define W23 124
 799 SIG_EXPR_LIST_DECL_SEMG(W23, PWM12, PWM12G1, PWM12, SIG_DESC_SET(SCU41C, 28));
 800 SIG_EXPR_LIST_DECL_SESG(W23, THRUIN2, THRU2, SIG_DESC_SET(SCU4BC, 28));
 801 PIN_DECL_2(W23, GPIOP4, PWM12, THRUIN2);
 802 GROUP_DECL(PWM12G1, W23);
 803 FUNC_DECL_2(PWM12, PWM12G0, PWM12G1);
 804
 805 #define AB23 125
 806 SIG_EXPR_LIST_DECL_SEMG(AB23, PWM13, PWM13G1, PWM13, SIG_DESC_SET(SCU41C, 29));
 807 SIG_EXPR_LIST_DECL_SESG(AB23, THRUOUT2, THRU2, SIG_DESC_SET(SCU4BC, 29));
 808 PIN_DECL_2(AB23, GPIOP5, PWM13, THRUOUT2);
 809 GROUP_DECL(PWM13G1, AB23);
 810 FUNC_DECL_2(PWM13, PWM13G0, PWM13G1);
 811
 812 FUNC_GROUP_DECL(THRU2, W23, AB23);
 813
 814 #define AB24 126
 815 SIG_EXPR_LIST_DECL_SEMG(AB24, PWM14, PWM14G1, PWM14, SIG_DESC_SET(SCU41C, 30));
 816 SIG_EXPR_LIST_DECL_SESG(AB24, THRUIN3, THRU3, SIG_DESC_SET(SCU4BC, 30));
 817 PIN_DECL_2(AB24, GPIOP6, PWM14, THRUIN3);
 818 GROUP_DECL(PWM14G1, AB24);
 819 FUNC_DECL_2(PWM14, PWM14G0, PWM14G1);
 820
 821 #define Y23 127
 822 SIG_EXPR_LIST_DECL_SEMG(Y23, PWM15, PWM15G1, PWM15, SIG_DESC_SET(SCU41C, 31));
 823 SIG_EXPR_LIST_DECL_SESG(Y23, THRUOUT3, THRU3, SIG_DESC_SET(SCU4BC, 31));
 824 SIG_EXPR_LIST_DECL_SESG(Y23, HEARTBEAT, HEARTBEAT, SIG_DESC_SET(SCU69C, 31));
 825 PIN_DECL_3(Y23, GPIOP7, PWM15, THRUOUT3, HEARTBEAT);
 826 GROUP_DECL(PWM15G1, Y23);
 827 FUNC_DECL_2(PWM15, PWM15G0, PWM15G1);
 828
 829 FUNC_GROUP_DECL(THRU3, AB24, Y23);
 830 FUNC_GROUP_DECL(HEARTBEAT, Y23);
 831
 832 #define AA25 128
 833 SSSF_PIN_DECL(AA25, GPIOQ0, TACH0, SIG_DESC_SET(SCU430, 0));
 834
 835 #define AB25 129
 836 SSSF_PIN_DECL(AB25, GPIOQ1, TACH1, SIG_DESC_SET(SCU430, 1));
 837
 838 #define Y24 130
 839 SSSF_PIN_DECL(Y24, GPIOQ2, TACH2, SIG_DESC_SET(SCU430, 2));
 840
 841 #define AB26 131
 842 SSSF_PIN_DECL(AB26, GPIOQ3, TACH3, SIG_DESC_SET(SCU430, 3));
 843
 844 #define Y26 132
 845 SSSF_PIN_DECL(Y26, GPIOQ4, TACH4, SIG_DESC_SET(SCU430, 4));
 846
 847 #define AC26 133
 848 SSSF_PIN_DECL(AC26, GPIOQ5, TACH5, SIG_DESC_SET(SCU430, 5));
 849
 850 #define Y25 134
 851 SSSF_PIN_DECL(Y25, GPIOQ6, TACH6, SIG_DESC_SET(SCU430, 6));
 852
 853 #define AA26 135
 854 SSSF_PIN_DECL(AA26, GPIOQ7, TACH7, SIG_DESC_SET(SCU430, 7));
 855
 856 #define V25 136
 857 SSSF_PIN_DECL(V25, GPIOR0, TACH8, SIG_DESC_SET(SCU430, 8));
 858
 859 #define U24 137
 860 SSSF_PIN_DECL(U24, GPIOR1, TACH9, SIG_DESC_SET(SCU430, 9));
 861
 862 #define V24 138
 863 SSSF_PIN_DECL(V24, GPIOR2, TACH10, SIG_DESC_SET(SCU430, 10));
 864
 865 #define V26 139
 866 SSSF_PIN_DECL(V26, GPIOR3, TACH11, SIG_DESC_SET(SCU430, 11));
 867
 868 #define U25 140
 869 SSSF_PIN_DECL(U25, GPIOR4, TACH12, SIG_DESC_SET(SCU430, 12));
 870
 871 #define T23 141
 872 SSSF_PIN_DECL(T23, GPIOR5, TACH13, SIG_DESC_SET(SCU430, 13));
 873
 874 #define W26 142
 875 SSSF_PIN_DECL(W26, GPIOR6, TACH14, SIG_DESC_SET(SCU430, 14));
 876
 877 #define U26 143
 878 SSSF_PIN_DECL(U26, GPIOR7, TACH15, SIG_DESC_SET(SCU430, 15));
 879
 880 #define R23 144
 881 SIG_EXPR_LIST_DECL_SESG(R23, MDC1, MDIO1, SIG_DESC_SET(SCU430, 16));
 882 PIN_DECL_1(R23, GPIOS0, MDC1);
 883
 884 #define T25 145
 885 SIG_EXPR_LIST_DECL_SESG(T25, MDIO1, MDIO1, SIG_DESC_SET(SCU430, 17));
 886 PIN_DECL_1(T25, GPIOS1, MDIO1);
 887
 888 FUNC_GROUP_DECL(MDIO1, R23, T25);
 889
 890 #define T26 146
 891 SSSF_PIN_DECL(T26, GPIOS2, PEWAKE, SIG_DESC_SET(SCU430, 18));
 892
 893 #define R24 147
 894 SSSF_PIN_DECL(R24, GPIOS3, OSCCLK, SIG_DESC_SET(SCU430, 19));
 895
 896 #define R26 148
 897 SIG_EXPR_LIST_DECL_SESG(R26, TXD10, UART10, SIG_DESC_SET(SCU430, 20));
 898 PIN_DECL_1(R26, GPIOS4, TXD10);
 899
 900 #define P24 149
 901 SIG_EXPR_LIST_DECL_SESG(P24, RXD10, UART10, SIG_DESC_SET(SCU430, 21));
 902 PIN_DECL_1(P24, GPIOS5, RXD10);
 903
 904 FUNC_GROUP_DECL(UART10, R26, P24);
 905
 906 #define P23 150
 907 SIG_EXPR_LIST_DECL_SESG(P23, TXD11, UART11, SIG_DESC_SET(SCU430, 22));
 908 PIN_DECL_1(P23, GPIOS6, TXD11);
 909
 910 #define T24 151
 911 SIG_EXPR_LIST_DECL_SESG(T24, RXD11, UART11, SIG_DESC_SET(SCU430, 23));
 912 PIN_DECL_1(T24, GPIOS7, RXD11);
 913
 914 FUNC_GROUP_DECL(UART11, P23, T24);
 915
 916 #define AD20 152
 917 SIG_EXPR_LIST_DECL_SESG(AD20, GPIT0, GPIT0, SIG_DESC_SET(SCU430, 24));
 918 SIG_EXPR_LIST_DECL_SESG(AD20, ADC0, ADC0);
 919 PIN_DECL_(AD20, SIG_EXPR_LIST_PTR(AD20, GPIT0), SIG_EXPR_LIST_PTR(AD20, ADC0));
 920 FUNC_GROUP_DECL(GPIT0, AD20);
 921 FUNC_GROUP_DECL(ADC0, AD20);
 922
 923 #define AC18 153
 924 SIG_EXPR_LIST_DECL_SESG(AC18, GPIT1, GPIT1, SIG_DESC_SET(SCU430, 25));
 925 SIG_EXPR_LIST_DECL_SESG(AC18, ADC1, ADC1);
 926 PIN_DECL_(AC18, SIG_EXPR_LIST_PTR(AC18, GPIT1), SIG_EXPR_LIST_PTR(AC18, ADC1));
 927 FUNC_GROUP_DECL(GPIT1, AC18);
 928 FUNC_GROUP_DECL(ADC1, AC18);
 929
 930 #define AE19 154
 931 SIG_EXPR_LIST_DECL_SESG(AE19, GPIT2, GPIT2, SIG_DESC_SET(SCU430, 26));
 932 SIG_EXPR_LIST_DECL_SESG(AE19, ADC2, ADC2);
 933 PIN_DECL_(AE19, SIG_EXPR_LIST_PTR(AE19, GPIT2), SIG_EXPR_LIST_PTR(AE19, ADC2));
 934 FUNC_GROUP_DECL(GPIT2, AE19);
 935 FUNC_GROUP_DECL(ADC2, AE19);
 936
 937 #define AD19 155
 938 SIG_EXPR_LIST_DECL_SESG(AD19, GPIT3, GPIT3, SIG_DESC_SET(SCU430, 27));
 939 SIG_EXPR_LIST_DECL_SESG(AD19, ADC3, ADC3);
 940 PIN_DECL_(AD19, SIG_EXPR_LIST_PTR(AD19, GPIT3), SIG_EXPR_LIST_PTR(AD19, ADC3));
 941 FUNC_GROUP_DECL(GPIT3, AD19);
 942 FUNC_GROUP_DECL(ADC3, AD19);
 943
 944 #define AC19 156
 945 SIG_EXPR_LIST_DECL_SESG(AC19, GPIT4, GPIT4, SIG_DESC_SET(SCU430, 28));
 946 SIG_EXPR_LIST_DECL_SESG(AC19, ADC4, ADC4);
 947 PIN_DECL_(AC19, SIG_EXPR_LIST_PTR(AC19, GPIT4), SIG_EXPR_LIST_PTR(AC19, ADC4));
 948 FUNC_GROUP_DECL(GPIT4, AC19);
 949 FUNC_GROUP_DECL(ADC4, AC19);
 950
 951 #define AB19 157
 952 SIG_EXPR_LIST_DECL_SESG(AB19, GPIT5, GPIT5, SIG_DESC_SET(SCU430, 29));
 953 SIG_EXPR_LIST_DECL_SESG(AB19, ADC5, ADC5);
 954 PIN_DECL_(AB19, SIG_EXPR_LIST_PTR(AB19, GPIT5), SIG_EXPR_LIST_PTR(AB19, ADC5));
 955 FUNC_GROUP_DECL(GPIT5, AB19);
 956 FUNC_GROUP_DECL(ADC5, AB19);
 957
 958 #define AB18 158
 959 SIG_EXPR_LIST_DECL_SESG(AB18, GPIT6, GPIT6, SIG_DESC_SET(SCU430, 30));
 960 SIG_EXPR_LIST_DECL_SESG(AB18, ADC6, ADC6);
 961 PIN_DECL_(AB18, SIG_EXPR_LIST_PTR(AB18, GPIT6), SIG_EXPR_LIST_PTR(AB18, ADC6));
 962 FUNC_GROUP_DECL(GPIT6, AB18);
 963 FUNC_GROUP_DECL(ADC6, AB18);
 964
 965 #define AE18 159
 966 SIG_EXPR_LIST_DECL_SESG(AE18, GPIT7, GPIT7, SIG_DESC_SET(SCU430, 31));
 967 SIG_EXPR_LIST_DECL_SESG(AE18, ADC7, ADC7);
 968 PIN_DECL_(AE18, SIG_EXPR_LIST_PTR(AE18, GPIT7), SIG_EXPR_LIST_PTR(AE18, ADC7));
 969 FUNC_GROUP_DECL(GPIT7, AE18);
 970 FUNC_GROUP_DECL(ADC7, AE18);
 971
 972 #define AB16 160
 973 SIG_EXPR_LIST_DECL_SEMG(AB16, SALT9, SALT9G1, SALT9, SIG_DESC_SET(SCU434, 0),
 974                         SIG_DESC_CLEAR(SCU694, 16));
 975 SIG_EXPR_LIST_DECL_SESG(AB16, GPIU0, GPIU0, SIG_DESC_SET(SCU434, 0),
 976                         SIG_DESC_SET(SCU694, 16));
 977 SIG_EXPR_LIST_DECL_SESG(AB16, ADC8, ADC8);
 978 PIN_DECL_(AB16, SIG_EXPR_LIST_PTR(AB16, SALT9), SIG_EXPR_LIST_PTR(AB16, GPIU0),
 979           SIG_EXPR_LIST_PTR(AB16, ADC8));
 980 GROUP_DECL(SALT9G1, AB16);
 981 FUNC_DECL_2(SALT9, SALT9G0, SALT9G1);
 982 FUNC_GROUP_DECL(GPIU0, AB16);
 983 FUNC_GROUP_DECL(ADC8, AB16);
 984
 985 #define AA17 161
 986 SIG_EXPR_LIST_DECL_SEMG(AA17, SALT10, SALT10G1, SALT10, SIG_DESC_SET(SCU434, 1),
 987                         SIG_DESC_CLEAR(SCU694, 17));
 988 SIG_EXPR_LIST_DECL_SESG(AA17, GPIU1, GPIU1, SIG_DESC_SET(SCU434, 1),
 989                         SIG_DESC_SET(SCU694, 17));
 990 SIG_EXPR_LIST_DECL_SESG(AA17, ADC9, ADC9);
 991 PIN_DECL_(AA17, SIG_EXPR_LIST_PTR(AA17, SALT10), SIG_EXPR_LIST_PTR(AA17, GPIU1),
 992           SIG_EXPR_LIST_PTR(AA17, ADC9));
 993 GROUP_DECL(SALT10G1, AA17);
 994 FUNC_DECL_2(SALT10, SALT10G0, SALT10G1);
 995 FUNC_GROUP_DECL(GPIU1, AA17);
 996 FUNC_GROUP_DECL(ADC9, AA17);
 997
 998 #define AB17 162
 999 SIG_EXPR_LIST_DECL_SEMG(AB17, SALT11, SALT11G1, SALT11, SIG_DESC_SET(SCU434, 2),
1000                         SIG_DESC_CLEAR(SCU694, 18));
1001 SIG_EXPR_LIST_DECL_SESG(AB17, GPIU2, GPIU2, SIG_DESC_SET(SCU434, 2),
1002                         SIG_DESC_SET(SCU694, 18));
1003 SIG_EXPR_LIST_DECL_SESG(AB17, ADC10, ADC10);
1004 PIN_DECL_(AB17, SIG_EXPR_LIST_PTR(AB17, SALT11), SIG_EXPR_LIST_PTR(AB17, GPIU2),
1005           SIG_EXPR_LIST_PTR(AB17, ADC10));
1006 GROUP_DECL(SALT11G1, AB17);
1007 FUNC_DECL_2(SALT11, SALT11G0, SALT11G1);
1008 FUNC_GROUP_DECL(GPIU2, AB17);
1009 FUNC_GROUP_DECL(ADC10, AB17);
1010
1011 #define AE16 163
1012 SIG_EXPR_LIST_DECL_SEMG(AE16, SALT12, SALT12G1, SALT12, SIG_DESC_SET(SCU434, 3),
1013                         SIG_DESC_CLEAR(SCU694, 19));
1014 SIG_EXPR_LIST_DECL_SESG(AE16, GPIU3, GPIU3, SIG_DESC_SET(SCU434, 3),
1015                         SIG_DESC_SET(SCU694, 19));
1016 SIG_EXPR_LIST_DECL_SESG(AE16, ADC11, ADC11);
1017 PIN_DECL_(AE16, SIG_EXPR_LIST_PTR(AE16, SALT12), SIG_EXPR_LIST_PTR(AE16, GPIU3),
1018           SIG_EXPR_LIST_PTR(AE16, ADC11));
1019 GROUP_DECL(SALT12G1, AE16);
1020 FUNC_DECL_2(SALT12, SALT12G0, SALT12G1);
1021 FUNC_GROUP_DECL(GPIU3, AE16);
1022 FUNC_GROUP_DECL(ADC11, AE16);
1023
1024 #define AC16 164
1025 SIG_EXPR_LIST_DECL_SEMG(AC16, SALT13, SALT13G1, SALT13, SIG_DESC_SET(SCU434, 4),
1026                         SIG_DESC_CLEAR(SCU694, 20));
1027 SIG_EXPR_LIST_DECL_SESG(AC16, GPIU4, GPIU4, SIG_DESC_SET(SCU434, 4),
1028                         SIG_DESC_SET(SCU694, 20));
1029 SIG_EXPR_LIST_DECL_SESG(AC16, ADC12, ADC12);
1030 PIN_DECL_(AC16, SIG_EXPR_LIST_PTR(AC16, SALT13), SIG_EXPR_LIST_PTR(AC16, GPIU4),
1031           SIG_EXPR_LIST_PTR(AC16, ADC12));
1032 GROUP_DECL(SALT13G1, AC16);
1033 FUNC_DECL_2(SALT13, SALT13G0, SALT13G1);
1034 FUNC_GROUP_DECL(GPIU4, AC16);
1035 FUNC_GROUP_DECL(ADC12, AC16);
1036
1037 #define AA16 165
1038 SIG_EXPR_LIST_DECL_SEMG(AA16, SALT14, SALT14G1, SALT14, SIG_DESC_SET(SCU434, 5),
1039                         SIG_DESC_CLEAR(SCU694, 21));
1040 SIG_EXPR_LIST_DECL_SESG(AA16, GPIU5, GPIU5, SIG_DESC_SET(SCU434, 5),
1041                         SIG_DESC_SET(SCU694, 21));
1042 SIG_EXPR_LIST_DECL_SESG(AA16, ADC13, ADC13);
1043 PIN_DECL_(AA16, SIG_EXPR_LIST_PTR(AA16, SALT14), SIG_EXPR_LIST_PTR(AA16, GPIU5),
1044           SIG_EXPR_LIST_PTR(AA16, ADC13));
1045 GROUP_DECL(SALT14G1, AA16);
1046 FUNC_DECL_2(SALT14, SALT14G0, SALT14G1);
1047 FUNC_GROUP_DECL(GPIU5, AA16);
1048 FUNC_GROUP_DECL(ADC13, AA16);
1049
1050 #define AD16 166
1051 SIG_EXPR_LIST_DECL_SEMG(AD16, SALT15, SALT15G1, SALT15, SIG_DESC_SET(SCU434, 6),
1052                         SIG_DESC_CLEAR(SCU694, 22));
1053 SIG_EXPR_LIST_DECL_SESG(AD16, GPIU6, GPIU6, SIG_DESC_SET(SCU434, 6),
1054                         SIG_DESC_SET(SCU694, 22));
1055 SIG_EXPR_LIST_DECL_SESG(AD16, ADC14, ADC14);
1056 PIN_DECL_(AD16, SIG_EXPR_LIST_PTR(AD16, SALT15), SIG_EXPR_LIST_PTR(AD16, GPIU6),
1057           SIG_EXPR_LIST_PTR(AD16, ADC14));
1058 GROUP_DECL(SALT15G1, AD16);
1059 FUNC_DECL_2(SALT15, SALT15G0, SALT15G1);
1060 FUNC_GROUP_DECL(GPIU6, AD16);
1061 FUNC_GROUP_DECL(ADC14, AD16);
1062
1063 #define AC17 167
1064 SIG_EXPR_LIST_DECL_SEMG(AC17, SALT16, SALT16G1, SALT16, SIG_DESC_SET(SCU434, 7),
1065                         SIG_DESC_CLEAR(SCU694, 23));
1066 SIG_EXPR_LIST_DECL_SESG(AC17, GPIU7, GPIU7, SIG_DESC_SET(SCU434, 7),
1067                         SIG_DESC_SET(SCU694, 23));
1068 SIG_EXPR_LIST_DECL_SESG(AC17, ADC15, ADC15);
1069 PIN_DECL_(AC17, SIG_EXPR_LIST_PTR(AC17, SALT16), SIG_EXPR_LIST_PTR(AC17, GPIU7),
1070           SIG_EXPR_LIST_PTR(AC17, ADC15));
1071 GROUP_DECL(SALT16G1, AC17);
1072 FUNC_DECL_2(SALT16, SALT16G0, SALT16G1);
1073 FUNC_GROUP_DECL(GPIU7, AC17);
1074 FUNC_GROUP_DECL(ADC15, AC17);
1075
1076 #define AB15 168
1077 SSSF_PIN_DECL(AB15, GPIOV0, SIOS3, SIG_DESC_SET(SCU434, 8));
1078
1079 #define AF14 169
1080 SSSF_PIN_DECL(AF14, GPIOV1, SIOS5, SIG_DESC_SET(SCU434, 9));
1081
1082 #define AD14 170
1083 SSSF_PIN_DECL(AD14, GPIOV2, SIOPWREQ, SIG_DESC_SET(SCU434, 10));
1084
1085 #define AC15 171
1086 SSSF_PIN_DECL(AC15, GPIOV3, SIOONCTRL, SIG_DESC_SET(SCU434, 11));
1087
1088 #define AE15 172
1089 SSSF_PIN_DECL(AE15, GPIOV4, SIOPWRGD, SIG_DESC_SET(SCU434, 12));
1090
1091 #define AE14 173
1092 SIG_EXPR_LIST_DECL_SESG(AE14, LPCPD, LPCPD, SIG_DESC_SET(SCU434, 13));
1093 SIG_EXPR_LIST_DECL_SESG(AE14, LHPD, LHPD, SIG_DESC_SET(SCU4D4, 13));
1094 PIN_DECL_2(AE14, GPIOV5, LPCPD, LHPD);
1095 FUNC_GROUP_DECL(LPCPD, AE14);
1096 FUNC_GROUP_DECL(LHPD, AE14);
1097
1098 #define AD15 174
1099 SSSF_PIN_DECL(AD15, GPIOV6, LPCPME, SIG_DESC_SET(SCU434, 14));
1100
1101 #define AF15 175
1102 SSSF_PIN_DECL(AF15, GPIOV7, LPCSMI, SIG_DESC_SET(SCU434, 15));
1103
1104 #define AB7 176
1105 SIG_EXPR_LIST_DECL_SESG(AB7, LAD0, LPC, SIG_DESC_SET(SCU434, 16),
1106                           SIG_DESC_SET(SCU510, 6));
1107 SIG_EXPR_LIST_DECL_SESG(AB7, ESPID0, ESPI, SIG_DESC_SET(SCU434, 16));
1108 PIN_DECL_2(AB7, GPIOW0, LAD0, ESPID0);
1109
1110 #define AB8 177
1111 SIG_EXPR_LIST_DECL_SESG(AB8, LAD1, LPC, SIG_DESC_SET(SCU434, 17),
1112                           SIG_DESC_SET(SCU510, 6));
1113 SIG_EXPR_LIST_DECL_SESG(AB8, ESPID1, ESPI, SIG_DESC_SET(SCU434, 17));
1114 PIN_DECL_2(AB8, GPIOW1, LAD1, ESPID1);
1115
1116 #define AC8 178
1117 SIG_EXPR_LIST_DECL_SESG(AC8, LAD2, LPC, SIG_DESC_SET(SCU434, 18),
1118                           SIG_DESC_SET(SCU510, 6));
1119 SIG_EXPR_LIST_DECL_SESG(AC8, ESPID2, ESPI, SIG_DESC_SET(SCU434, 18));
1120 PIN_DECL_2(AC8, GPIOW2, LAD2, ESPID2);
1121
1122 #define AC7 179
1123 SIG_EXPR_LIST_DECL_SESG(AC7, LAD3, LPC, SIG_DESC_SET(SCU434, 19),
1124                           SIG_DESC_SET(SCU510, 6));
1125 SIG_EXPR_LIST_DECL_SESG(AC7, ESPID3, ESPI, SIG_DESC_SET(SCU434, 19));
1126 PIN_DECL_2(AC7, GPIOW3, LAD3, ESPID3);
1127
1128 #define AE7 180
1129 SIG_EXPR_LIST_DECL_SESG(AE7, LCLK, LPC, SIG_DESC_SET(SCU434, 20),
1130                           SIG_DESC_SET(SCU510, 6));
1131 SIG_EXPR_LIST_DECL_SESG(AE7, ESPICK, ESPI, SIG_DESC_SET(SCU434, 20));
1132 PIN_DECL_2(AE7, GPIOW4, LCLK, ESPICK);
1133
1134 #define AF7 181
1135 SIG_EXPR_LIST_DECL_SESG(AF7, LFRAME, LPC, SIG_DESC_SET(SCU434, 21),
1136                           SIG_DESC_SET(SCU510, 6));
1137 SIG_EXPR_LIST_DECL_SESG(AF7, ESPICS, ESPI, SIG_DESC_SET(SCU434, 21));
1138 PIN_DECL_2(AF7, GPIOW5, LFRAME, ESPICS);
1139
1140 #define AD7 182
1141 SIG_EXPR_LIST_DECL_SESG(AD7, LSIRQ, LSIRQ, SIG_DESC_SET(SCU434, 22),
1142                           SIG_DESC_SET(SCU510, 6));
1143 SIG_EXPR_LIST_DECL_SESG(AD7, ESPIALT, ESPIALT, SIG_DESC_SET(SCU434, 22));
1144 PIN_DECL_2(AD7, GPIOW6, LSIRQ, ESPIALT);
1145 FUNC_GROUP_DECL(LSIRQ, AD7);
1146 FUNC_GROUP_DECL(ESPIALT, AD7);
1147
1148 #define AD8 183
1149 SIG_EXPR_LIST_DECL_SESG(AD8, LPCRST, LPC, SIG_DESC_SET(SCU434, 23),
1150                           SIG_DESC_SET(SCU510, 6));
1151 SIG_EXPR_LIST_DECL_SESG(AD8, ESPIRST, ESPI, SIG_DESC_SET(SCU434, 23));
1152 PIN_DECL_2(AD8, GPIOW7, LPCRST, ESPIRST);
1153
1154 FUNC_GROUP_DECL(LPC, AB7, AB8, AC8, AC7, AE7, AF7, AD8);
1155 FUNC_GROUP_DECL(ESPI, AB7, AB8, AC8, AC7, AE7, AF7, AD8);
1156
1157 #define AE8 184
1158 SIG_EXPR_LIST_DECL_SEMG(AE8, SPI2CS0, SPI2, SPI2, SIG_DESC_SET(SCU434, 24));
1159 PIN_DECL_1(AE8, GPIOX0, SPI2CS0);
1160
1161 #define AA9 185
1162 SSSF_PIN_DECL(AA9, GPIOX1, SPI2CS1, SIG_DESC_SET(SCU434, 25));
1163
1164 #define AC9 186
1165 SSSF_PIN_DECL(AC9, GPIOX2, SPI2CS2, SIG_DESC_SET(SCU434, 26));
1166
1167 #define AF8 187
1168 SIG_EXPR_LIST_DECL_SEMG(AF8, SPI2CK, SPI2, SPI2, SIG_DESC_SET(SCU434, 27));
1169 PIN_DECL_1(AF8, GPIOX3, SPI2CK);
1170
1171 #define AB9 188
1172 SIG_EXPR_LIST_DECL_SEMG(AB9, SPI2MOSI, SPI2, SPI2, SIG_DESC_SET(SCU434, 28));
1173 PIN_DECL_1(AB9, GPIOX4, SPI2MOSI);
1174
1175 #define AD9 189
1176 SIG_EXPR_LIST_DECL_SEMG(AD9, SPI2MISO, SPI2, SPI2, SIG_DESC_SET(SCU434, 29));
1177 PIN_DECL_1(AD9, GPIOX5, SPI2MISO);
1178
1179 GROUP_DECL(SPI2, AE8, AF8, AB9, AD9);
1180
1181 #define AF9 190
1182 SIG_EXPR_LIST_DECL_SEMG(AF9, SPI2DQ2, QSPI2, SPI2, SIG_DESC_SET(SCU434, 30));
1183 SIG_EXPR_LIST_DECL_SEMG(AF9, TXD12, UART12G1, UART12, SIG_DESC_SET(SCU4D4, 30));
1184 PIN_DECL_2(AF9, GPIOX6, SPI2DQ2, TXD12);
1185
1186 #define AB10 191
1187 SIG_EXPR_LIST_DECL_SEMG(AB10, SPI2DQ3, QSPI2, SPI2, SIG_DESC_SET(SCU434, 31));
1188 SIG_EXPR_LIST_DECL_SEMG(AB10, RXD12, UART12G1, UART12,
1189                         SIG_DESC_SET(SCU4D4, 31));
1190 PIN_DECL_2(AB10, GPIOX7, SPI2DQ3, RXD12);
1191
1192 GROUP_DECL(QSPI2, AE8, AF8, AB9, AD9, AF9, AB10);
1193 FUNC_DECL_2(SPI2, SPI2, QSPI2);
1194
1195 GROUP_DECL(UART12G1, AF9, AB10);
1196 FUNC_DECL_2(UART12, UART12G0, UART12G1);
1197
1198 #define AF11 192
1199 SIG_EXPR_LIST_DECL_SESG(AF11, SALT5, SALT5, SIG_DESC_SET(SCU438, 0));
1200 SIG_EXPR_LIST_DECL_SESG(AF11, WDTRST1, WDTRST1, SIG_DESC_SET(SCU4D8, 0));
1201 PIN_DECL_2(AF11, GPIOY0, SALT5, WDTRST1);
1202 FUNC_GROUP_DECL(SALT5, AF11);
1203 FUNC_GROUP_DECL(WDTRST1, AF11);
1204
1205 #define AD12 193
1206 SIG_EXPR_LIST_DECL_SESG(AD12, SALT6, SALT6, SIG_DESC_SET(SCU438, 1));
1207 SIG_EXPR_LIST_DECL_SESG(AD12, WDTRST2, WDTRST2, SIG_DESC_SET(SCU4D8, 1));
1208 PIN_DECL_2(AD12, GPIOY1, SALT6, WDTRST2);
1209 FUNC_GROUP_DECL(SALT6, AD12);
1210 FUNC_GROUP_DECL(WDTRST2, AD12);
1211
1212 #define AE11 194
1213 SIG_EXPR_LIST_DECL_SESG(AE11, SALT7, SALT7, SIG_DESC_SET(SCU438, 2));
1214 SIG_EXPR_LIST_DECL_SESG(AE11, WDTRST3, WDTRST3, SIG_DESC_SET(SCU4D8, 2));
1215 PIN_DECL_2(AE11, GPIOY2, SALT7, WDTRST3);
1216 FUNC_GROUP_DECL(SALT7, AE11);
1217 FUNC_GROUP_DECL(WDTRST3, AE11);
1218
1219 #define AA12 195
1220 SIG_EXPR_LIST_DECL_SESG(AA12, SALT8, SALT8, SIG_DESC_SET(SCU438, 3));
1221 SIG_EXPR_LIST_DECL_SESG(AA12, WDTRST4, WDTRST4, SIG_DESC_SET(SCU4D8, 3));
1222 PIN_DECL_2(AA12, GPIOY3, SALT8, WDTRST4);
1223 FUNC_GROUP_DECL(SALT8, AA12);
1224 FUNC_GROUP_DECL(WDTRST4, AA12);
1225
1226 #define AE12 196
1227 SIG_EXPR_LIST_DECL_SEMG(AE12, FWSPIDQ2, FWQSPID, FWSPID,
1228                         SIG_DESC_SET(SCU438, 4));
1229 SIG_EXPR_LIST_DECL_SESG(AE12, GPIOY4, GPIOY4);
1230 PIN_DECL_(AE12, SIG_EXPR_LIST_PTR(AE12, FWSPIDQ2),
1231           SIG_EXPR_LIST_PTR(AE12, GPIOY4));
1232
1233 #define AF12 197
1234 SIG_EXPR_LIST_DECL_SEMG(AF12, FWSPIDQ3, FWQSPID, FWSPID,
1235                         SIG_DESC_SET(SCU438, 5));
1236 SIG_EXPR_LIST_DECL_SESG(AF12, GPIOY5, GPIOY5);
1237 PIN_DECL_(AF12, SIG_EXPR_LIST_PTR(AF12, FWSPIDQ3),
1238           SIG_EXPR_LIST_PTR(AF12, GPIOY5));
1239
1240 #define AC12 198
1241 SSSF_PIN_DECL(AC12, GPIOY6, FWSPIABR, SIG_DESC_SET(SCU438, 6));
1242
1243 #define AB12 199
1244 SSSF_PIN_DECL(AB12, GPIOY7, FWSPIWP, SIG_DESC_SET(SCU438, 7));
1245
1246 #define AC10 200
1247 SSSF_PIN_DECL(AC10, GPIOZ0, SPI1CS1, SIG_DESC_SET(SCU438, 8));
1248
1249 #define AD10 201
1250 SSSF_PIN_DECL(AD10, GPIOZ1, SPI1ABR, SIG_DESC_SET(SCU438, 9));
1251
1252 #define AE10 202
1253 SSSF_PIN_DECL(AE10, GPIOZ2, SPI1WP, SIG_DESC_SET(SCU438, 10));
1254
1255 #define AB11 203
1256 SIG_EXPR_LIST_DECL_SEMG(AB11, SPI1CK, SPI1, SPI1, SIG_DESC_SET(SCU438, 11));
1257 PIN_DECL_1(AB11, GPIOZ3, SPI1CK);
1258
1259 #define AC11 204
1260 SIG_EXPR_LIST_DECL_SEMG(AC11, SPI1MOSI, SPI1, SPI1, SIG_DESC_SET(SCU438, 12));
1261 PIN_DECL_1(AC11, GPIOZ4, SPI1MOSI);
1262
1263 #define AA11 205
1264 SIG_EXPR_LIST_DECL_SEMG(AA11, SPI1MISO, SPI1, SPI1, SIG_DESC_SET(SCU438, 13));
1265 PIN_DECL_1(AA11, GPIOZ5, SPI1MISO);
1266
1267 GROUP_DECL(SPI1, AB11, AC11, AA11);
1268
1269 #define AD11 206
1270 SIG_EXPR_LIST_DECL_SEMG(AD11, SPI1DQ2, QSPI1, SPI1, SIG_DESC_SET(SCU438, 14));
1271 SIG_EXPR_LIST_DECL_SEMG(AD11, TXD13, UART13G1, UART13,
1272                         SIG_DESC_CLEAR(SCU4B8, 2), SIG_DESC_SET(SCU4D8, 14));
1273 PIN_DECL_2(AD11, GPIOZ6, SPI1DQ2, TXD13);
1274
1275 #define AF10 207
1276 SIG_EXPR_LIST_DECL_SEMG(AF10, SPI1DQ3, QSPI1, SPI1, SIG_DESC_SET(SCU438, 15));
1277 SIG_EXPR_LIST_DECL_SEMG(AF10, RXD13, UART13G1, UART13,
1278                         SIG_DESC_CLEAR(SCU4B8, 3), SIG_DESC_SET(SCU4D8, 15));
1279 PIN_DECL_2(AF10, GPIOZ7, SPI1DQ3, RXD13);
1280
1281 GROUP_DECL(QSPI1, AB11, AC11, AA11, AD11, AF10);
1282 FUNC_DECL_2(SPI1, SPI1, QSPI1);
1283
1284 GROUP_DECL(UART13G1, AD11, AF10);
1285 FUNC_DECL_2(UART13, UART13G0, UART13G1);
1286
1287 #define C6 208
1288 SIG_EXPR_LIST_DECL_SESG(C6, RGMII1TXCK, RGMII1, SIG_DESC_SET(SCU400, 0),
1289                           SIG_DESC_SET(SCU500, 6));
1290 SIG_EXPR_LIST_DECL_SESG(C6, RMII1RCLKO, RMII1, SIG_DESC_SET(SCU400, 0),
1291                           SIG_DESC_CLEAR(SCU500, 6));
1292 PIN_DECL_2(C6, GPIO18A0, RGMII1TXCK, RMII1RCLKO);
1293
1294 #define D6 209
1295 SIG_EXPR_LIST_DECL_SESG(D6, RGMII1TXCTL, RGMII1, SIG_DESC_SET(SCU400, 1),
1296                           SIG_DESC_SET(SCU500, 6));
1297 SIG_EXPR_LIST_DECL_SESG(D6, RMII1TXEN, RMII1, SIG_DESC_SET(SCU400, 1),
1298                           SIG_DESC_CLEAR(SCU500, 6));
1299 PIN_DECL_2(D6, GPIO18A1, RGMII1TXCTL, RMII1TXEN);
1300
1301 #define D5 210
1302 SIG_EXPR_LIST_DECL_SESG(D5, RGMII1TXD0, RGMII1, SIG_DESC_SET(SCU400, 2),
1303                           SIG_DESC_SET(SCU500, 6));
1304 SIG_EXPR_LIST_DECL_SESG(D5, RMII1TXD0, RMII1, SIG_DESC_SET(SCU400, 2),
1305                           SIG_DESC_CLEAR(SCU500, 6));
1306 PIN_DECL_2(D5, GPIO18A2, RGMII1TXD0, RMII1TXD0);
1307
1308 #define A3 211
1309 SIG_EXPR_LIST_DECL_SESG(A3, RGMII1TXD1, RGMII1, SIG_DESC_SET(SCU400, 3),
1310                           SIG_DESC_SET(SCU500, 6));
1311 SIG_EXPR_LIST_DECL_SESG(A3, RMII1TXD1, RMII1, SIG_DESC_SET(SCU400, 3),
1312                           SIG_DESC_CLEAR(SCU500, 6));
1313 PIN_DECL_2(A3, GPIO18A3, RGMII1TXD1, RMII1TXD1);
1314
1315 #define C5 212
1316 SIG_EXPR_LIST_DECL_SESG(C5, RGMII1TXD2, RGMII1, SIG_DESC_SET(SCU400, 4),
1317                           SIG_DESC_SET(SCU500, 6));
1318 PIN_DECL_1(C5, GPIO18A4, RGMII1TXD2);
1319
1320 #define E6 213
1321 SIG_EXPR_LIST_DECL_SESG(E6, RGMII1TXD3, RGMII1, SIG_DESC_SET(SCU400, 5),
1322                           SIG_DESC_SET(SCU500, 6));
1323 PIN_DECL_1(E6, GPIO18A5, RGMII1TXD3);
1324
1325 #define B3 214
1326 SIG_EXPR_LIST_DECL_SESG(B3, RGMII1RXCK, RGMII1, SIG_DESC_SET(SCU400, 6),
1327                           SIG_DESC_SET(SCU500, 6));
1328 SIG_EXPR_LIST_DECL_SESG(B3, RMII1RCLKI, RMII1, SIG_DESC_SET(SCU400, 6),
1329                           SIG_DESC_CLEAR(SCU500, 6));
1330 PIN_DECL_2(B3, GPIO18A6, RGMII1RXCK, RMII1RCLKI);
1331
1332 #define A2 215
1333 SIG_EXPR_LIST_DECL_SESG(A2, RGMII1RXCTL, RGMII1, SIG_DESC_SET(SCU400, 7),
1334                           SIG_DESC_SET(SCU500, 6));
1335 PIN_DECL_1(A2, GPIO18A7, RGMII1RXCTL);
1336
1337 #define B2 216
1338 SIG_EXPR_LIST_DECL_SESG(B2, RGMII1RXD0, RGMII1, SIG_DESC_SET(SCU400, 8),
1339                           SIG_DESC_SET(SCU500, 6));
1340 SIG_EXPR_LIST_DECL_SESG(B2, RMII1RXD0, RMII1, SIG_DESC_SET(SCU400, 8),
1341                           SIG_DESC_CLEAR(SCU500, 6));
1342 PIN_DECL_2(B2, GPIO18B0, RGMII1RXD0, RMII1RXD0);
1343
1344 #define B1 217
1345 SIG_EXPR_LIST_DECL_SESG(B1, RGMII1RXD1, RGMII1, SIG_DESC_SET(SCU400, 9),
1346                           SIG_DESC_SET(SCU500, 6));
1347 SIG_EXPR_LIST_DECL_SESG(B1, RMII1RXD1, RMII1, SIG_DESC_SET(SCU400, 9),
1348                           SIG_DESC_CLEAR(SCU500, 6));
1349 PIN_DECL_2(B1, GPIO18B1, RGMII1RXD1, RMII1RXD1);
1350
1351 #define C4 218
1352 SIG_EXPR_LIST_DECL_SESG(C4, RGMII1RXD2, RGMII1, SIG_DESC_SET(SCU400, 10),
1353                           SIG_DESC_SET(SCU500, 6));
1354 SIG_EXPR_LIST_DECL_SESG(C4, RMII1CRSDV, RMII1, SIG_DESC_SET(SCU400, 10),
1355                           SIG_DESC_CLEAR(SCU500, 6));
1356 PIN_DECL_2(C4, GPIO18B2, RGMII1RXD2, RMII1CRSDV);
1357
1358 #define E5 219
1359 SIG_EXPR_LIST_DECL_SESG(E5, RGMII1RXD3, RGMII1, SIG_DESC_SET(SCU400, 11),
1360                           SIG_DESC_SET(SCU500, 6));
1361 SIG_EXPR_LIST_DECL_SESG(E5, RMII1RXER, RMII1, SIG_DESC_SET(SCU400, 11),
1362                           SIG_DESC_CLEAR(SCU500, 6));
1363 PIN_DECL_2(E5, GPIO18B3, RGMII1RXD3, RMII1RXER);
1364
1365 FUNC_GROUP_DECL(RGMII1, C6, D6, D5, A3, C5, E6, B3, A2, B2, B1, C4, E5);
1366 FUNC_GROUP_DECL(RMII1, C6, D6, D5, A3, B3, B2, B1, C4, E5);
1367
1368 #define D4 220
1369 SIG_EXPR_LIST_DECL_SESG(D4, RGMII2TXCK, RGMII2, SIG_DESC_SET(SCU400, 12),
1370                           SIG_DESC_SET(SCU500, 7));
1371 SIG_EXPR_LIST_DECL_SESG(D4, RMII2RCLKO, RMII2, SIG_DESC_SET(SCU400, 12),
1372                           SIG_DESC_CLEAR(SCU500, 7));
1373 PIN_DECL_2(D4, GPIO18B4, RGMII2TXCK, RMII2RCLKO);
1374
1375 #define C2 221
1376 SIG_EXPR_LIST_DECL_SESG(C2, RGMII2TXCTL, RGMII2, SIG_DESC_SET(SCU400, 13),
1377                           SIG_DESC_SET(SCU500, 7));
1378 SIG_EXPR_LIST_DECL_SESG(C2, RMII2TXEN, RMII2, SIG_DESC_SET(SCU400, 13),
1379                           SIG_DESC_CLEAR(SCU500, 7));
1380 PIN_DECL_2(C2, GPIO18B5, RGMII2TXCTL, RMII2TXEN);
1381
1382 #define C1 222
1383 SIG_EXPR_LIST_DECL_SESG(C1, RGMII2TXD0, RGMII2, SIG_DESC_SET(SCU400, 14),
1384                           SIG_DESC_SET(SCU500, 7));
1385 SIG_EXPR_LIST_DECL_SESG(C1, RMII2TXD0, RMII2, SIG_DESC_SET(SCU400, 14),
1386                           SIG_DESC_CLEAR(SCU500, 7));
1387 PIN_DECL_2(C1, GPIO18B6, RGMII2TXD0, RMII2TXD0);
1388
1389 #define D3 223
1390 SIG_EXPR_LIST_DECL_SESG(D3, RGMII2TXD1, RGMII2, SIG_DESC_SET(SCU400, 15),
1391                           SIG_DESC_SET(SCU500, 7));
1392 SIG_EXPR_LIST_DECL_SESG(D3, RMII2TXD1, RMII2, SIG_DESC_SET(SCU400, 15),
1393                           SIG_DESC_CLEAR(SCU500, 7));
1394 PIN_DECL_2(D3, GPIO18B7, RGMII2TXD1, RMII2TXD1);
1395
1396 #define E4 224
1397 SIG_EXPR_LIST_DECL_SESG(E4, RGMII2TXD2, RGMII2, SIG_DESC_SET(SCU400, 16),
1398                           SIG_DESC_SET(SCU500, 7));
1399 PIN_DECL_1(E4, GPIO18C0, RGMII2TXD2);
1400
1401 #define F5 225
1402 SIG_EXPR_LIST_DECL_SESG(F5, RGMII2TXD3, RGMII2, SIG_DESC_SET(SCU400, 17),
1403                           SIG_DESC_SET(SCU500, 7));
1404 PIN_DECL_1(F5, GPIO18C1, RGMII2TXD3);
1405
1406 #define D2 226
1407 SIG_EXPR_LIST_DECL_SESG(D2, RGMII2RXCK, RGMII2, SIG_DESC_SET(SCU400, 18),
1408                           SIG_DESC_SET(SCU500, 7));
1409 SIG_EXPR_LIST_DECL_SESG(D2, RMII2RCLKI, RMII2, SIG_DESC_SET(SCU400, 18),
1410                           SIG_DESC_CLEAR(SCU500, 7));
1411 PIN_DECL_2(D2, GPIO18C2, RGMII2RXCK, RMII2RCLKI);
1412
1413 #define E3 227
1414 SIG_EXPR_LIST_DECL_SESG(E3, RGMII2RXCTL, RGMII2, SIG_DESC_SET(SCU400, 19),
1415                           SIG_DESC_SET(SCU500, 7));
1416 PIN_DECL_1(E3, GPIO18C3, RGMII2RXCTL);
1417
1418 #define D1 228
1419 SIG_EXPR_LIST_DECL_SESG(D1, RGMII2RXD0, RGMII2, SIG_DESC_SET(SCU400, 20),
1420                           SIG_DESC_SET(SCU500, 7));
1421 SIG_EXPR_LIST_DECL_SESG(D1, RMII2RXD0, RMII2, SIG_DESC_SET(SCU400, 20),
1422                           SIG_DESC_CLEAR(SCU500, 7));
1423 PIN_DECL_2(D1, GPIO18C4, RGMII2RXD0, RMII2RXD0);
1424
1425 #define F4 229
1426 SIG_EXPR_LIST_DECL_SESG(F4, RGMII2RXD1, RGMII2, SIG_DESC_SET(SCU400, 21),
1427                           SIG_DESC_SET(SCU500, 7));
1428 SIG_EXPR_LIST_DECL_SESG(F4, RMII2RXD1, RMII2, SIG_DESC_SET(SCU400, 21),
1429                           SIG_DESC_CLEAR(SCU500, 7));
1430 PIN_DECL_2(F4, GPIO18C5, RGMII2RXD1, RMII2RXD1);
1431
1432 #define E2 230
1433 SIG_EXPR_LIST_DECL_SESG(E2, RGMII2RXD2, RGMII2, SIG_DESC_SET(SCU400, 22),
1434                           SIG_DESC_SET(SCU500, 7));
1435 SIG_EXPR_LIST_DECL_SESG(E2, RMII2CRSDV, RMII2, SIG_DESC_SET(SCU400, 22),
1436                           SIG_DESC_CLEAR(SCU500, 7));
1437 PIN_DECL_2(E2, GPIO18C6, RGMII2RXD2, RMII2CRSDV);
1438
1439 #define E1 231
1440 SIG_EXPR_LIST_DECL_SESG(E1, RGMII2RXD3, RGMII2, SIG_DESC_SET(SCU400, 23),
1441                           SIG_DESC_SET(SCU500, 7));
1442 SIG_EXPR_LIST_DECL_SESG(E1, RMII2RXER, RMII2, SIG_DESC_SET(SCU400, 23),
1443                           SIG_DESC_CLEAR(SCU500, 7));
1444 PIN_DECL_2(E1, GPIO18C7, RGMII2RXD3, RMII2RXER);
1445
1446 FUNC_GROUP_DECL(RGMII2, D4, C2, C1, D3, E4, F5, D2, E3, D1, F4, E2, E1);
1447 FUNC_GROUP_DECL(RMII2, D4, C2, C1, D3, D2, D1, F4, E2, E1);
1448
1449 #define AB4 232
1450 SIG_EXPR_LIST_DECL_SEMG(AB4, EMMCCLK, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 24));
1451 PIN_DECL_1(AB4, GPIO18D0, EMMCCLK);
1452
1453 #define AA4 233
1454 SIG_EXPR_LIST_DECL_SEMG(AA4, EMMCCMD, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 25));
1455 PIN_DECL_1(AA4, GPIO18D1, EMMCCMD);
1456
1457 #define AC4 234
1458 SIG_EXPR_LIST_DECL_SEMG(AC4, EMMCDAT0, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 26));
1459 PIN_DECL_1(AC4, GPIO18D2, EMMCDAT0);
1460
1461 #define AA5 235
1462 SIG_EXPR_LIST_DECL_SEMG(AA5, EMMCDAT1, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 27));
1463 PIN_DECL_1(AA5, GPIO18D3, EMMCDAT1);
1464
1465 #define Y5 236
1466 SIG_EXPR_LIST_DECL_SEMG(Y5, EMMCDAT2, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 28));
1467 PIN_DECL_1(Y5, GPIO18D4, EMMCDAT2);
1468
1469 #define AB5 237
1470 SIG_EXPR_LIST_DECL_SEMG(AB5, EMMCDAT3, EMMCG4, EMMC, SIG_DESC_SET(SCU400, 29));
1471 PIN_DECL_1(AB5, GPIO18D5, EMMCDAT3);
1472
1473 #define AB6 238
1474 SIG_EXPR_LIST_DECL_SEMG(AB6, EMMCCD, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 30));
1475 PIN_DECL_1(AB6, GPIO18D6, EMMCCD);
1476
1477 #define AC5 239
1478 SIG_EXPR_LIST_DECL_SEMG(AC5, EMMCWP, EMMCG1, EMMC, SIG_DESC_SET(SCU400, 31));
1479 PIN_DECL_1(AC5, GPIO18D7, EMMCWP);
1480
1481 GROUP_DECL(EMMCG1, AB4, AA4, AC4, AB6, AC5);
1482 GROUP_DECL(EMMCG4, AB4, AA4, AC4, AA5, Y5, AB5, AB6, AC5);
1483
1484 #define Y1 240
1485 SIG_EXPR_LIST_DECL_SEMG(Y1, FWSPIDCS, FWSPID, FWSPID, SIG_DESC_SET(SCU500, 3));
1486 SIG_EXPR_LIST_DECL_SESG(Y1, VBCS, VB, SIG_DESC_SET(SCU500, 5));
1487 SIG_EXPR_LIST_DECL_SEMG(Y1, EMMCDAT4, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 0));
1488 PIN_DECL_3(Y1, GPIO18E0, FWSPIDCS, VBCS, EMMCDAT4);
1489
1490 #define Y2 241
1491 SIG_EXPR_LIST_DECL_SEMG(Y2, FWSPIDCK, FWSPID, FWSPID, SIG_DESC_SET(SCU500, 3));
1492 SIG_EXPR_LIST_DECL_SESG(Y2, VBCK, VB, SIG_DESC_SET(SCU500, 5));
1493 SIG_EXPR_LIST_DECL_SEMG(Y2, EMMCDAT5, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 1));
1494 PIN_DECL_3(Y2, GPIO18E1, FWSPIDCK, VBCK, EMMCDAT5);
1495
1496 #define Y3 242
1497 SIG_EXPR_LIST_DECL_SEMG(Y3, FWSPIDMOSI, FWSPID, FWSPID,
1498                         SIG_DESC_SET(SCU500, 3));
1499 SIG_EXPR_LIST_DECL_SESG(Y3, VBMOSI, VB, SIG_DESC_SET(SCU500, 5));
1500 SIG_EXPR_LIST_DECL_SEMG(Y3, EMMCDAT6, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 2));
1501 PIN_DECL_3(Y3, GPIO18E2, FWSPIDMOSI, VBMOSI, EMMCDAT6);
1502
1503 #define Y4 243
1504 SIG_EXPR_LIST_DECL_SEMG(Y4, FWSPIDMISO, FWSPID, FWSPID,
1505                         SIG_DESC_SET(SCU500, 3));
1506 SIG_EXPR_LIST_DECL_SESG(Y4, VBMISO, VB, SIG_DESC_SET(SCU500, 5));
1507 SIG_EXPR_LIST_DECL_SEMG(Y4, EMMCDAT7, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 3));
1508 PIN_DECL_3(Y4, GPIO18E3, FWSPIDMISO, VBMISO, EMMCDAT7);
1509
1510 GROUP_DECL(FWSPID, Y1, Y2, Y3, Y4);
1511 GROUP_DECL(FWQSPID, Y1, Y2, Y3, Y4, AE12, AF12);
1512 GROUP_DECL(EMMCG8, AB4, AA4, AC4, AA5, Y5, AB5, AB6, AC5, Y1, Y2, Y3, Y4);
1513 FUNC_DECL_2(FWSPID, FWSPID, FWQSPID);
1514 FUNC_GROUP_DECL(VB, Y1, Y2, Y3, Y4);
1515 FUNC_DECL_3(EMMC, EMMCG1, EMMCG4, EMMCG8);
1516 /*
1517  * FIXME: Confirm bits and priorities are the right way around for the
1518  * following 4 pins
1519  */
1520 #define AF25 244
1521 SIG_EXPR_LIST_DECL_SEMG(AF25, I3C3SCL, I3C3, I3C3, SIG_DESC_SET(SCU438, 20));
1522 SIG_EXPR_LIST_DECL_SESG(AF25, FSI1CLK, FSI1, SIG_DESC_SET(SCU4D8, 20));
1523 PIN_DECL_(AF25, SIG_EXPR_LIST_PTR(AF25, I3C3SCL),
1524           SIG_EXPR_LIST_PTR(AF25, FSI1CLK));
1525
1526 #define AE26 245
1527 SIG_EXPR_LIST_DECL_SEMG(AE26, I3C3SDA, I3C3, I3C3, SIG_DESC_SET(SCU438, 21));
1528 SIG_EXPR_LIST_DECL_SESG(AE26, FSI1DATA, FSI1, SIG_DESC_SET(SCU4D8, 21));
1529 PIN_DECL_(AE26, SIG_EXPR_LIST_PTR(AE26, I3C3SDA),
1530           SIG_EXPR_LIST_PTR(AE26, FSI1DATA));
1531
1532 GROUP_DECL(I3C3, AF25, AE26);
1533 FUNC_DECL_2(I3C3, HVI3C3, I3C3);
1534 FUNC_GROUP_DECL(FSI1, AF25, AE26);
1535
1536 #define AE25 246
1537 SIG_EXPR_LIST_DECL_SEMG(AE25, I3C4SCL, I3C4, I3C4, SIG_DESC_SET(SCU438, 22));
1538 SIG_EXPR_LIST_DECL_SESG(AE25, FSI2CLK, FSI2, SIG_DESC_SET(SCU4D8, 22));
1539 PIN_DECL_(AE25, SIG_EXPR_LIST_PTR(AE25, I3C4SCL),
1540           SIG_EXPR_LIST_PTR(AE25, FSI2CLK));
1541
1542 #define AF24 247
1543 SIG_EXPR_LIST_DECL_SEMG(AF24, I3C4SDA, I3C4, I3C4, SIG_DESC_SET(SCU438, 23));
1544 SIG_EXPR_LIST_DECL_SESG(AF24, FSI2DATA, FSI2, SIG_DESC_SET(SCU4D8, 23));
1545 PIN_DECL_(AF24, SIG_EXPR_LIST_PTR(AF24, I3C4SDA),
1546           SIG_EXPR_LIST_PTR(AF24, FSI2DATA));
1547
1548 GROUP_DECL(I3C4, AE25, AF24);
1549 FUNC_DECL_2(I3C4, HVI3C4, I3C4);
1550 FUNC_GROUP_DECL(FSI2, AE25, AF24);
1551
1552 #define AF23 248
1553 SIG_EXPR_LIST_DECL_SESG(AF23, I3C1SCL, I3C1, SIG_DESC_SET(SCU438, 16));
1554 PIN_DECL_(AF23, SIG_EXPR_LIST_PTR(AF23, I3C1SCL));
1555
1556 #define AE24 249
1557 SIG_EXPR_LIST_DECL_SESG(AE24, I3C1SDA, I3C1, SIG_DESC_SET(SCU438, 17));
1558 PIN_DECL_(AE24, SIG_EXPR_LIST_PTR(AE24, I3C1SDA));
1559
1560 FUNC_GROUP_DECL(I3C1, AF23, AE24);
1561
1562 #define AF22 250
1563 SIG_EXPR_LIST_DECL_SESG(AF22, I3C2SCL, I3C2, SIG_DESC_SET(SCU438, 18));
1564 PIN_DECL_(AF22, SIG_EXPR_LIST_PTR(AF22, I3C2SCL));
1565
1566 #define AE22 251
1567 SIG_EXPR_LIST_DECL_SESG(AE22, I3C2SDA, I3C2, SIG_DESC_SET(SCU438, 19));
1568 PIN_DECL_(AE22, SIG_EXPR_LIST_PTR(AE22, I3C2SDA));
1569
1570 FUNC_GROUP_DECL(I3C2, AF22, AE22);
1571
1572 #define USB2ADP_DESC   { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 0, 0 }
1573 #define USB2AD_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 1, 0 }
1574 #define USB2AH_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 2, 0 }
1575 #define USB2AHP_DESC   { ASPEED_IP_SCU, SCU440, GENMASK(25, 24), 3, 0 }
1576 #define USB11BHID_DESC { ASPEED_IP_SCU, SCU440, GENMASK(29, 28), 0, 0 }
1577 #define USB2BD_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(29, 28), 1, 0 }
1578 #define USB2BH_DESC    { ASPEED_IP_SCU, SCU440, GENMASK(29, 28), 2, 0 }
1579
1580 #define A4 252
1581 SIG_EXPR_LIST_DECL_SEMG(A4, USB2ADPDP, USBA, USB2ADP, USB2ADP_DESC,
1582                         SIG_DESC_SET(SCUC20, 16));
1583 SIG_EXPR_LIST_DECL_SEMG(A4, USB2ADDP, USBA, USB2AD, USB2AD_DESC);
1584 SIG_EXPR_LIST_DECL_SEMG(A4, USB2AHDP, USBA, USB2AH, USB2AH_DESC);
1585 SIG_EXPR_LIST_DECL_SEMG(A4, USB2AHPDP, USBA, USB2AHP, USB2AHP_DESC);
1586 PIN_DECL_(A4, SIG_EXPR_LIST_PTR(A4, USB2ADPDP), SIG_EXPR_LIST_PTR(A4, USB2ADDP),
1587           SIG_EXPR_LIST_PTR(A4, USB2AHDP));
1588
1589 #define B4 253
1590 SIG_EXPR_LIST_DECL_SEMG(B4, USB2ADPDN, USBA, USB2ADP, USB2ADP_DESC);
1591 SIG_EXPR_LIST_DECL_SEMG(B4, USB2ADDN, USBA, USB2AD, USB2AD_DESC);
1592 SIG_EXPR_LIST_DECL_SEMG(B4, USB2AHDN, USBA, USB2AH, USB2AH_DESC);
1593 SIG_EXPR_LIST_DECL_SEMG(B4, USB2AHPDN, USBA, USB2AHP, USB2AHP_DESC);
1594 PIN_DECL_(B4, SIG_EXPR_LIST_PTR(B4, USB2ADPDN), SIG_EXPR_LIST_PTR(B4, USB2ADDN),
1595           SIG_EXPR_LIST_PTR(B4, USB2AHDN));
1596
1597 GROUP_DECL(USBA, A4, B4);
1598
1599 FUNC_DECL_1(USB2ADP, USBA);
1600 FUNC_DECL_1(USB2AD, USBA);
1601 FUNC_DECL_1(USB2AH, USBA);
1602 FUNC_DECL_1(USB2AHP, USBA);
1603
1604 #define A6 254
1605 SIG_EXPR_LIST_DECL_SEMG(A6, USB11BDP, USBB, USB11BHID, USB11BHID_DESC);
1606 SIG_EXPR_LIST_DECL_SEMG(A6, USB2BDDP, USBB, USB2BD, USB2BD_DESC);
1607 SIG_EXPR_LIST_DECL_SEMG(A6, USB2BHDP, USBB, USB2BH, USB2BH_DESC);
1608 PIN_DECL_(A6, SIG_EXPR_LIST_PTR(A6, USB11BDP), SIG_EXPR_LIST_PTR(A6, USB2BDDP),
1609           SIG_EXPR_LIST_PTR(A6, USB2BHDP));
1610
1611 #define B6 255
1612 SIG_EXPR_LIST_DECL_SEMG(B6, USB11BDN, USBB, USB11BHID, USB11BHID_DESC);
1613 SIG_EXPR_LIST_DECL_SEMG(B6, USB2BDDN, USBB, USB2BD, USB2BD_DESC);
1614 SIG_EXPR_LIST_DECL_SEMG(B6, USB2BHDN, USBB, USB2BH, USB2BH_DESC);
1615 PIN_DECL_(B6, SIG_EXPR_LIST_PTR(B6, USB11BDN), SIG_EXPR_LIST_PTR(B6, USB2BDDN),
1616           SIG_EXPR_LIST_PTR(B6, USB2BHDN));
1617
1618 GROUP_DECL(USBB, A6, B6);
1619
1620 FUNC_DECL_1(USB11BHID, USBB);
1621 FUNC_DECL_1(USB2BD, USBB);
1622 FUNC_DECL_1(USB2BH, USBB);
1623
1624 /* Pins, groups and functions are sort(1):ed alphabetically for sanity */
1625
1626 static struct pinctrl_pin_desc aspeed_g6_pins[ASPEED_G6_NR_PINS] = {
1627         ASPEED_PINCTRL_PIN(A11),
1628         ASPEED_PINCTRL_PIN(A12),
1629         ASPEED_PINCTRL_PIN(A13),
1630         ASPEED_PINCTRL_PIN(A14),
1631         ASPEED_PINCTRL_PIN(A15),
1632         ASPEED_PINCTRL_PIN(A16),
1633         ASPEED_PINCTRL_PIN(A17),
1634         ASPEED_PINCTRL_PIN(A18),
1635         ASPEED_PINCTRL_PIN(A19),
1636         ASPEED_PINCTRL_PIN(A2),
1637         ASPEED_PINCTRL_PIN(A20),
1638         ASPEED_PINCTRL_PIN(A21),
1639         ASPEED_PINCTRL_PIN(A22),
1640         ASPEED_PINCTRL_PIN(A23),
1641         ASPEED_PINCTRL_PIN(A24),
1642         ASPEED_PINCTRL_PIN(A25),
1643         ASPEED_PINCTRL_PIN(A3),
1644         ASPEED_PINCTRL_PIN(A4),
1645         ASPEED_PINCTRL_PIN(A6),
1646         ASPEED_PINCTRL_PIN(AA11),
1647         ASPEED_PINCTRL_PIN(AA12),
1648         ASPEED_PINCTRL_PIN(AA16),
1649         ASPEED_PINCTRL_PIN(AA17),
1650         ASPEED_PINCTRL_PIN(AA23),
1651         ASPEED_PINCTRL_PIN(AA24),
1652         ASPEED_PINCTRL_PIN(AA25),
1653         ASPEED_PINCTRL_PIN(AA26),
1654         ASPEED_PINCTRL_PIN(AA4),
1655         ASPEED_PINCTRL_PIN(AA5),
1656         ASPEED_PINCTRL_PIN(AA9),
1657         ASPEED_PINCTRL_PIN(AB10),
1658         ASPEED_PINCTRL_PIN(AB11),
1659         ASPEED_PINCTRL_PIN(AB12),
1660         ASPEED_PINCTRL_PIN(AB15),
1661         ASPEED_PINCTRL_PIN(AB16),
1662         ASPEED_PINCTRL_PIN(AB17),
1663         ASPEED_PINCTRL_PIN(AB18),
1664         ASPEED_PINCTRL_PIN(AB19),
1665         ASPEED_PINCTRL_PIN(AB22),
1666         ASPEED_PINCTRL_PIN(AB23),
1667         ASPEED_PINCTRL_PIN(AB24),
1668         ASPEED_PINCTRL_PIN(AB25),
1669         ASPEED_PINCTRL_PIN(AB26),
1670         ASPEED_PINCTRL_PIN(AB4),
1671         ASPEED_PINCTRL_PIN(AB5),
1672         ASPEED_PINCTRL_PIN(AB6),
1673         ASPEED_PINCTRL_PIN(AB7),
1674         ASPEED_PINCTRL_PIN(AB8),
1675         ASPEED_PINCTRL_PIN(AB9),
1676         ASPEED_PINCTRL_PIN(AC10),
1677         ASPEED_PINCTRL_PIN(AC11),
1678         ASPEED_PINCTRL_PIN(AC12),
1679         ASPEED_PINCTRL_PIN(AC15),
1680         ASPEED_PINCTRL_PIN(AC16),
1681         ASPEED_PINCTRL_PIN(AC17),
1682         ASPEED_PINCTRL_PIN(AC18),
1683         ASPEED_PINCTRL_PIN(AC19),
1684         ASPEED_PINCTRL_PIN(AC22),
1685         ASPEED_PINCTRL_PIN(AC23),
1686         ASPEED_PINCTRL_PIN(AC24),
1687         ASPEED_PINCTRL_PIN(AC26),
1688         ASPEED_PINCTRL_PIN(AC4),
1689         ASPEED_PINCTRL_PIN(AC5),
1690         ASPEED_PINCTRL_PIN(AC7),
1691         ASPEED_PINCTRL_PIN(AC8),
1692         ASPEED_PINCTRL_PIN(AC9),
1693         ASPEED_PINCTRL_PIN(AD10),
1694         ASPEED_PINCTRL_PIN(AD11),
1695         ASPEED_PINCTRL_PIN(AD12),
1696         ASPEED_PINCTRL_PIN(AD14),
1697         ASPEED_PINCTRL_PIN(AD15),
1698         ASPEED_PINCTRL_PIN(AD16),
1699         ASPEED_PINCTRL_PIN(AD19),
1700         ASPEED_PINCTRL_PIN(AD20),
1701         ASPEED_PINCTRL_PIN(AD22),
1702         ASPEED_PINCTRL_PIN(AD23),
1703         ASPEED_PINCTRL_PIN(AD24),
1704         ASPEED_PINCTRL_PIN(AD25),
1705         ASPEED_PINCTRL_PIN(AD26),
1706         ASPEED_PINCTRL_PIN(AD7),
1707         ASPEED_PINCTRL_PIN(AD8),
1708         ASPEED_PINCTRL_PIN(AD9),
1709         ASPEED_PINCTRL_PIN(AE10),
1710         ASPEED_PINCTRL_PIN(AE11),
1711         ASPEED_PINCTRL_PIN(AE12),
1712         ASPEED_PINCTRL_PIN(AE14),
1713         ASPEED_PINCTRL_PIN(AE15),
1714         ASPEED_PINCTRL_PIN(AE16),
1715         ASPEED_PINCTRL_PIN(AE18),
1716         ASPEED_PINCTRL_PIN(AE19),
1717         ASPEED_PINCTRL_PIN(AE22),
1718         ASPEED_PINCTRL_PIN(AE24),
1719         ASPEED_PINCTRL_PIN(AE25),
1720         ASPEED_PINCTRL_PIN(AE26),
1721         ASPEED_PINCTRL_PIN(AE7),
1722         ASPEED_PINCTRL_PIN(AE8),
1723         ASPEED_PINCTRL_PIN(AF10),
1724         ASPEED_PINCTRL_PIN(AF11),
1725         ASPEED_PINCTRL_PIN(AF12),
1726         ASPEED_PINCTRL_PIN(AF14),
1727         ASPEED_PINCTRL_PIN(AF15),
1728         ASPEED_PINCTRL_PIN(AF22),
1729         ASPEED_PINCTRL_PIN(AF23),
1730         ASPEED_PINCTRL_PIN(AF24),
1731         ASPEED_PINCTRL_PIN(AF25),
1732         ASPEED_PINCTRL_PIN(AF7),
1733         ASPEED_PINCTRL_PIN(AF8),
1734         ASPEED_PINCTRL_PIN(AF9),
1735         ASPEED_PINCTRL_PIN(B1),
1736         ASPEED_PINCTRL_PIN(B12),
1737         ASPEED_PINCTRL_PIN(B13),
1738         ASPEED_PINCTRL_PIN(B14),
1739         ASPEED_PINCTRL_PIN(B16),
1740         ASPEED_PINCTRL_PIN(B17),
1741         ASPEED_PINCTRL_PIN(B18),
1742         ASPEED_PINCTRL_PIN(B2),
1743         ASPEED_PINCTRL_PIN(B20),
1744         ASPEED_PINCTRL_PIN(B21),
1745         ASPEED_PINCTRL_PIN(B22),
1746         ASPEED_PINCTRL_PIN(B24),
1747         ASPEED_PINCTRL_PIN(B25),
1748         ASPEED_PINCTRL_PIN(B26),
1749         ASPEED_PINCTRL_PIN(B3),
1750         ASPEED_PINCTRL_PIN(B4),
1751         ASPEED_PINCTRL_PIN(B6),
1752         ASPEED_PINCTRL_PIN(C1),
1753         ASPEED_PINCTRL_PIN(C11),
1754         ASPEED_PINCTRL_PIN(C12),
1755         ASPEED_PINCTRL_PIN(C13),
1756         ASPEED_PINCTRL_PIN(C14),
1757         ASPEED_PINCTRL_PIN(C15),
1758         ASPEED_PINCTRL_PIN(C16),
1759         ASPEED_PINCTRL_PIN(C17),
1760         ASPEED_PINCTRL_PIN(C18),
1761         ASPEED_PINCTRL_PIN(C19),
1762         ASPEED_PINCTRL_PIN(C2),
1763         ASPEED_PINCTRL_PIN(C20),
1764         ASPEED_PINCTRL_PIN(C21),
1765         ASPEED_PINCTRL_PIN(C22),
1766         ASPEED_PINCTRL_PIN(C23),
1767         ASPEED_PINCTRL_PIN(C24),
1768         ASPEED_PINCTRL_PIN(C25),
1769         ASPEED_PINCTRL_PIN(C26),
1770         ASPEED_PINCTRL_PIN(C4),
1771         ASPEED_PINCTRL_PIN(C5),
1772         ASPEED_PINCTRL_PIN(C6),
1773         ASPEED_PINCTRL_PIN(D1),
1774         ASPEED_PINCTRL_PIN(D11),
1775         ASPEED_PINCTRL_PIN(D12),
1776         ASPEED_PINCTRL_PIN(D13),
1777         ASPEED_PINCTRL_PIN(D14),
1778         ASPEED_PINCTRL_PIN(D15),
1779         ASPEED_PINCTRL_PIN(D16),
1780         ASPEED_PINCTRL_PIN(D17),
1781         ASPEED_PINCTRL_PIN(D18),
1782         ASPEED_PINCTRL_PIN(D19),
1783         ASPEED_PINCTRL_PIN(D2),
1784         ASPEED_PINCTRL_PIN(D20),
1785         ASPEED_PINCTRL_PIN(D21),
1786         ASPEED_PINCTRL_PIN(D22),
1787         ASPEED_PINCTRL_PIN(D23),
1788         ASPEED_PINCTRL_PIN(D24),
1789         ASPEED_PINCTRL_PIN(D26),
1790         ASPEED_PINCTRL_PIN(D3),
1791         ASPEED_PINCTRL_PIN(D4),
1792         ASPEED_PINCTRL_PIN(D5),
1793         ASPEED_PINCTRL_PIN(D6),
1794         ASPEED_PINCTRL_PIN(E1),
1795         ASPEED_PINCTRL_PIN(E11),
1796         ASPEED_PINCTRL_PIN(E12),
1797         ASPEED_PINCTRL_PIN(E13),
1798         ASPEED_PINCTRL_PIN(E14),
1799         ASPEED_PINCTRL_PIN(E15),
1800         ASPEED_PINCTRL_PIN(E16),
1801         ASPEED_PINCTRL_PIN(E17),
1802         ASPEED_PINCTRL_PIN(E18),
1803         ASPEED_PINCTRL_PIN(E19),
1804         ASPEED_PINCTRL_PIN(E2),
1805         ASPEED_PINCTRL_PIN(E20),
1806         ASPEED_PINCTRL_PIN(E21),
1807         ASPEED_PINCTRL_PIN(E22),
1808         ASPEED_PINCTRL_PIN(E23),
1809         ASPEED_PINCTRL_PIN(E24),
1810         ASPEED_PINCTRL_PIN(E25),
1811         ASPEED_PINCTRL_PIN(E26),
1812         ASPEED_PINCTRL_PIN(E3),
1813         ASPEED_PINCTRL_PIN(E4),
1814         ASPEED_PINCTRL_PIN(E5),
1815         ASPEED_PINCTRL_PIN(E6),
1816         ASPEED_PINCTRL_PIN(F13),
1817         ASPEED_PINCTRL_PIN(F15),
1818         ASPEED_PINCTRL_PIN(F22),
1819         ASPEED_PINCTRL_PIN(F23),
1820         ASPEED_PINCTRL_PIN(F24),
1821         ASPEED_PINCTRL_PIN(F25),
1822         ASPEED_PINCTRL_PIN(F26),
1823         ASPEED_PINCTRL_PIN(F4),
1824         ASPEED_PINCTRL_PIN(F5),
1825         ASPEED_PINCTRL_PIN(G22),
1826         ASPEED_PINCTRL_PIN(G23),
1827         ASPEED_PINCTRL_PIN(G24),
1828         ASPEED_PINCTRL_PIN(G26),
1829         ASPEED_PINCTRL_PIN(H22),
1830         ASPEED_PINCTRL_PIN(H23),
1831         ASPEED_PINCTRL_PIN(H24),
1832         ASPEED_PINCTRL_PIN(H25),
1833         ASPEED_PINCTRL_PIN(H26),
1834         ASPEED_PINCTRL_PIN(J22),
1835         ASPEED_PINCTRL_PIN(J23),
1836         ASPEED_PINCTRL_PIN(J24),
1837         ASPEED_PINCTRL_PIN(J25),
1838         ASPEED_PINCTRL_PIN(J26),
1839         ASPEED_PINCTRL_PIN(K23),
1840         ASPEED_PINCTRL_PIN(K24),
1841         ASPEED_PINCTRL_PIN(K25),
1842         ASPEED_PINCTRL_PIN(K26),
1843         ASPEED_PINCTRL_PIN(L23),
1844         ASPEED_PINCTRL_PIN(L24),
1845         ASPEED_PINCTRL_PIN(L26),
1846         ASPEED_PINCTRL_PIN(M23),
1847         ASPEED_PINCTRL_PIN(M24),
1848         ASPEED_PINCTRL_PIN(M25),
1849         ASPEED_PINCTRL_PIN(M26),
1850         ASPEED_PINCTRL_PIN(N23),
1851         ASPEED_PINCTRL_PIN(N24),
1852         ASPEED_PINCTRL_PIN(N25),
1853         ASPEED_PINCTRL_PIN(N26),
1854         ASPEED_PINCTRL_PIN(P23),
1855         ASPEED_PINCTRL_PIN(P24),
1856         ASPEED_PINCTRL_PIN(P25),
1857         ASPEED_PINCTRL_PIN(P26),
1858         ASPEED_PINCTRL_PIN(R23),
1859         ASPEED_PINCTRL_PIN(R24),
1860         ASPEED_PINCTRL_PIN(R26),
1861         ASPEED_PINCTRL_PIN(T23),
1862         ASPEED_PINCTRL_PIN(T24),
1863         ASPEED_PINCTRL_PIN(T25),
1864         ASPEED_PINCTRL_PIN(T26),
1865         ASPEED_PINCTRL_PIN(U24),
1866         ASPEED_PINCTRL_PIN(U25),
1867         ASPEED_PINCTRL_PIN(U26),
1868         ASPEED_PINCTRL_PIN(V24),
1869         ASPEED_PINCTRL_PIN(V25),
1870         ASPEED_PINCTRL_PIN(V26),
1871         ASPEED_PINCTRL_PIN(W23),
1872         ASPEED_PINCTRL_PIN(W24),
1873         ASPEED_PINCTRL_PIN(W26),
1874         ASPEED_PINCTRL_PIN(Y1),
1875         ASPEED_PINCTRL_PIN(Y2),
1876         ASPEED_PINCTRL_PIN(Y23),
1877         ASPEED_PINCTRL_PIN(Y24),
1878         ASPEED_PINCTRL_PIN(Y25),
1879         ASPEED_PINCTRL_PIN(Y26),
1880         ASPEED_PINCTRL_PIN(Y3),
1881         ASPEED_PINCTRL_PIN(Y4),
1882         ASPEED_PINCTRL_PIN(Y5),
1883 };
1884
1885 static const struct aspeed_pin_group aspeed_g6_groups[] = {
1886         ASPEED_PINCTRL_GROUP(ADC0),
1887         ASPEED_PINCTRL_GROUP(ADC1),
1888         ASPEED_PINCTRL_GROUP(ADC10),
1889         ASPEED_PINCTRL_GROUP(ADC11),
1890         ASPEED_PINCTRL_GROUP(ADC12),
1891         ASPEED_PINCTRL_GROUP(ADC13),
1892         ASPEED_PINCTRL_GROUP(ADC14),
1893         ASPEED_PINCTRL_GROUP(ADC15),
1894         ASPEED_PINCTRL_GROUP(ADC2),
1895         ASPEED_PINCTRL_GROUP(ADC3),
1896         ASPEED_PINCTRL_GROUP(ADC4),
1897         ASPEED_PINCTRL_GROUP(ADC5),
1898         ASPEED_PINCTRL_GROUP(ADC6),
1899         ASPEED_PINCTRL_GROUP(ADC7),
1900         ASPEED_PINCTRL_GROUP(ADC8),
1901         ASPEED_PINCTRL_GROUP(ADC9),
1902         ASPEED_PINCTRL_GROUP(BMCINT),
1903         ASPEED_PINCTRL_GROUP(ESPI),
1904         ASPEED_PINCTRL_GROUP(ESPIALT),
1905         ASPEED_PINCTRL_GROUP(FSI1),
1906         ASPEED_PINCTRL_GROUP(FSI2),
1907         ASPEED_PINCTRL_GROUP(FWSPIABR),
1908         ASPEED_PINCTRL_GROUP(FWSPID),
1909         ASPEED_PINCTRL_GROUP(FWQSPID),
1910         ASPEED_PINCTRL_GROUP(FWSPIWP),
1911         ASPEED_PINCTRL_GROUP(GPIT0),
1912         ASPEED_PINCTRL_GROUP(GPIT1),
1913         ASPEED_PINCTRL_GROUP(GPIT2),
1914         ASPEED_PINCTRL_GROUP(GPIT3),
1915         ASPEED_PINCTRL_GROUP(GPIT4),
1916         ASPEED_PINCTRL_GROUP(GPIT5),
1917         ASPEED_PINCTRL_GROUP(GPIT6),
1918         ASPEED_PINCTRL_GROUP(GPIT7),
1919         ASPEED_PINCTRL_GROUP(GPIU0),
1920         ASPEED_PINCTRL_GROUP(GPIU1),
1921         ASPEED_PINCTRL_GROUP(GPIU2),
1922         ASPEED_PINCTRL_GROUP(GPIU3),
1923         ASPEED_PINCTRL_GROUP(GPIU4),
1924         ASPEED_PINCTRL_GROUP(GPIU5),
1925         ASPEED_PINCTRL_GROUP(GPIU6),
1926         ASPEED_PINCTRL_GROUP(GPIU7),
1927         ASPEED_PINCTRL_GROUP(HEARTBEAT),
1928         ASPEED_PINCTRL_GROUP(HVI3C3),
1929         ASPEED_PINCTRL_GROUP(HVI3C4),
1930         ASPEED_PINCTRL_GROUP(I2C1),
1931         ASPEED_PINCTRL_GROUP(I2C10),
1932         ASPEED_PINCTRL_GROUP(I2C11),
1933         ASPEED_PINCTRL_GROUP(I2C12),
1934         ASPEED_PINCTRL_GROUP(I2C13),
1935         ASPEED_PINCTRL_GROUP(I2C14),
1936         ASPEED_PINCTRL_GROUP(I2C15),
1937         ASPEED_PINCTRL_GROUP(I2C16),
1938         ASPEED_PINCTRL_GROUP(I2C2),
1939         ASPEED_PINCTRL_GROUP(I2C3),
1940         ASPEED_PINCTRL_GROUP(I2C4),
1941         ASPEED_PINCTRL_GROUP(I2C5),
1942         ASPEED_PINCTRL_GROUP(I2C6),
1943         ASPEED_PINCTRL_GROUP(I2C7),
1944         ASPEED_PINCTRL_GROUP(I2C8),
1945         ASPEED_PINCTRL_GROUP(I2C9),
1946         ASPEED_PINCTRL_GROUP(I3C1),
1947         ASPEED_PINCTRL_GROUP(I3C2),
1948         ASPEED_PINCTRL_GROUP(I3C3),
1949         ASPEED_PINCTRL_GROUP(I3C4),
1950         ASPEED_PINCTRL_GROUP(I3C5),
1951         ASPEED_PINCTRL_GROUP(I3C6),
1952         ASPEED_PINCTRL_GROUP(JTAGM),
1953         ASPEED_PINCTRL_GROUP(LHPD),
1954         ASPEED_PINCTRL_GROUP(LHSIRQ),
1955         ASPEED_PINCTRL_GROUP(LPC),
1956         ASPEED_PINCTRL_GROUP(LPCHC),
1957         ASPEED_PINCTRL_GROUP(LPCPD),
1958         ASPEED_PINCTRL_GROUP(LPCPME),
1959         ASPEED_PINCTRL_GROUP(LPCSMI),
1960         ASPEED_PINCTRL_GROUP(LSIRQ),
1961         ASPEED_PINCTRL_GROUP(MACLINK1),
1962         ASPEED_PINCTRL_GROUP(MACLINK2),
1963         ASPEED_PINCTRL_GROUP(MACLINK3),
1964         ASPEED_PINCTRL_GROUP(MACLINK4),
1965         ASPEED_PINCTRL_GROUP(MDIO1),
1966         ASPEED_PINCTRL_GROUP(MDIO2),
1967         ASPEED_PINCTRL_GROUP(MDIO3),
1968         ASPEED_PINCTRL_GROUP(MDIO4),
1969         ASPEED_PINCTRL_GROUP(NCTS1),
1970         ASPEED_PINCTRL_GROUP(NCTS2),
1971         ASPEED_PINCTRL_GROUP(NCTS3),
1972         ASPEED_PINCTRL_GROUP(NCTS4),
1973         ASPEED_PINCTRL_GROUP(NDCD1),
1974         ASPEED_PINCTRL_GROUP(NDCD2),
1975         ASPEED_PINCTRL_GROUP(NDCD3),
1976         ASPEED_PINCTRL_GROUP(NDCD4),
1977         ASPEED_PINCTRL_GROUP(NDSR1),
1978         ASPEED_PINCTRL_GROUP(NDSR2),
1979         ASPEED_PINCTRL_GROUP(NDSR3),
1980         ASPEED_PINCTRL_GROUP(NDSR4),
1981         ASPEED_PINCTRL_GROUP(NDTR1),
1982         ASPEED_PINCTRL_GROUP(NDTR2),
1983         ASPEED_PINCTRL_GROUP(NDTR3),
1984         ASPEED_PINCTRL_GROUP(NDTR4),
1985         ASPEED_PINCTRL_GROUP(NRI1),
1986         ASPEED_PINCTRL_GROUP(NRI2),
1987         ASPEED_PINCTRL_GROUP(NRI3),
1988         ASPEED_PINCTRL_GROUP(NRI4),
1989         ASPEED_PINCTRL_GROUP(NRTS1),
1990         ASPEED_PINCTRL_GROUP(NRTS2),
1991         ASPEED_PINCTRL_GROUP(NRTS3),
1992         ASPEED_PINCTRL_GROUP(NRTS4),
1993         ASPEED_PINCTRL_GROUP(OSCCLK),
1994         ASPEED_PINCTRL_GROUP(PEWAKE),
1995         ASPEED_PINCTRL_GROUP(PWM0),
1996         ASPEED_PINCTRL_GROUP(PWM1),
1997         ASPEED_PINCTRL_GROUP(PWM10G0),
1998         ASPEED_PINCTRL_GROUP(PWM10G1),
1999         ASPEED_PINCTRL_GROUP(PWM11G0),
2000         ASPEED_PINCTRL_GROUP(PWM11G1),
2001         ASPEED_PINCTRL_GROUP(PWM12G0),
2002         ASPEED_PINCTRL_GROUP(PWM12G1),
2003         ASPEED_PINCTRL_GROUP(PWM13G0),
2004         ASPEED_PINCTRL_GROUP(PWM13G1),
2005         ASPEED_PINCTRL_GROUP(PWM14G0),
2006         ASPEED_PINCTRL_GROUP(PWM14G1),
2007         ASPEED_PINCTRL_GROUP(PWM15G0),
2008         ASPEED_PINCTRL_GROUP(PWM15G1),
2009         ASPEED_PINCTRL_GROUP(PWM2),
2010         ASPEED_PINCTRL_GROUP(PWM3),
2011         ASPEED_PINCTRL_GROUP(PWM4),
2012         ASPEED_PINCTRL_GROUP(PWM5),
2013         ASPEED_PINCTRL_GROUP(PWM6),
2014         ASPEED_PINCTRL_GROUP(PWM7),
2015         ASPEED_PINCTRL_GROUP(PWM8G0),
2016         ASPEED_PINCTRL_GROUP(PWM8G1),
2017         ASPEED_PINCTRL_GROUP(PWM9G0),
2018         ASPEED_PINCTRL_GROUP(PWM9G1),
2019         ASPEED_PINCTRL_GROUP(QSPI1),
2020         ASPEED_PINCTRL_GROUP(QSPI2),
2021         ASPEED_PINCTRL_GROUP(RGMII1),
2022         ASPEED_PINCTRL_GROUP(RGMII2),
2023         ASPEED_PINCTRL_GROUP(RGMII3),
2024         ASPEED_PINCTRL_GROUP(RGMII4),
2025         ASPEED_PINCTRL_GROUP(RMII1),
2026         ASPEED_PINCTRL_GROUP(RMII2),
2027         ASPEED_PINCTRL_GROUP(RMII3),
2028         ASPEED_PINCTRL_GROUP(RMII4),
2029         ASPEED_PINCTRL_GROUP(RXD1),
2030         ASPEED_PINCTRL_GROUP(RXD2),
2031         ASPEED_PINCTRL_GROUP(RXD3),
2032         ASPEED_PINCTRL_GROUP(RXD4),
2033         ASPEED_PINCTRL_GROUP(SALT1),
2034         ASPEED_PINCTRL_GROUP(SALT10G0),
2035         ASPEED_PINCTRL_GROUP(SALT10G1),
2036         ASPEED_PINCTRL_GROUP(SALT11G0),
2037         ASPEED_PINCTRL_GROUP(SALT11G1),
2038         ASPEED_PINCTRL_GROUP(SALT12G0),
2039         ASPEED_PINCTRL_GROUP(SALT12G1),
2040         ASPEED_PINCTRL_GROUP(SALT13G0),
2041         ASPEED_PINCTRL_GROUP(SALT13G1),
2042         ASPEED_PINCTRL_GROUP(SALT14G0),
2043         ASPEED_PINCTRL_GROUP(SALT14G1),
2044         ASPEED_PINCTRL_GROUP(SALT15G0),
2045         ASPEED_PINCTRL_GROUP(SALT15G1),
2046         ASPEED_PINCTRL_GROUP(SALT16G0),
2047         ASPEED_PINCTRL_GROUP(SALT16G1),
2048         ASPEED_PINCTRL_GROUP(SALT2),
2049         ASPEED_PINCTRL_GROUP(SALT3),
2050         ASPEED_PINCTRL_GROUP(SALT4),
2051         ASPEED_PINCTRL_GROUP(SALT5),
2052         ASPEED_PINCTRL_GROUP(SALT6),
2053         ASPEED_PINCTRL_GROUP(SALT7),
2054         ASPEED_PINCTRL_GROUP(SALT8),
2055         ASPEED_PINCTRL_GROUP(SALT9G0),
2056         ASPEED_PINCTRL_GROUP(SALT9G1),
2057         ASPEED_PINCTRL_GROUP(SD1),
2058         ASPEED_PINCTRL_GROUP(SD2),
2059         ASPEED_PINCTRL_GROUP(EMMCG1),
2060         ASPEED_PINCTRL_GROUP(EMMCG4),
2061         ASPEED_PINCTRL_GROUP(EMMCG8),
2062         ASPEED_PINCTRL_GROUP(SGPM1),
2063         ASPEED_PINCTRL_GROUP(SGPS1),
2064         ASPEED_PINCTRL_GROUP(SIOONCTRL),
2065         ASPEED_PINCTRL_GROUP(SIOPBI),
2066         ASPEED_PINCTRL_GROUP(SIOPBO),
2067         ASPEED_PINCTRL_GROUP(SIOPWREQ),
2068         ASPEED_PINCTRL_GROUP(SIOPWRGD),
2069         ASPEED_PINCTRL_GROUP(SIOS3),
2070         ASPEED_PINCTRL_GROUP(SIOS5),
2071         ASPEED_PINCTRL_GROUP(SIOSCI),
2072         ASPEED_PINCTRL_GROUP(SPI1),
2073         ASPEED_PINCTRL_GROUP(SPI1ABR),
2074         ASPEED_PINCTRL_GROUP(SPI1CS1),
2075         ASPEED_PINCTRL_GROUP(SPI1WP),
2076         ASPEED_PINCTRL_GROUP(SPI2),
2077         ASPEED_PINCTRL_GROUP(SPI2CS1),
2078         ASPEED_PINCTRL_GROUP(SPI2CS2),
2079         ASPEED_PINCTRL_GROUP(TACH0),
2080         ASPEED_PINCTRL_GROUP(TACH1),
2081         ASPEED_PINCTRL_GROUP(TACH10),
2082         ASPEED_PINCTRL_GROUP(TACH11),
2083         ASPEED_PINCTRL_GROUP(TACH12),
2084         ASPEED_PINCTRL_GROUP(TACH13),
2085         ASPEED_PINCTRL_GROUP(TACH14),
2086         ASPEED_PINCTRL_GROUP(TACH15),
2087         ASPEED_PINCTRL_GROUP(TACH2),
2088         ASPEED_PINCTRL_GROUP(TACH3),
2089         ASPEED_PINCTRL_GROUP(TACH4),
2090         ASPEED_PINCTRL_GROUP(TACH5),
2091         ASPEED_PINCTRL_GROUP(TACH6),
2092         ASPEED_PINCTRL_GROUP(TACH7),
2093         ASPEED_PINCTRL_GROUP(TACH8),
2094         ASPEED_PINCTRL_GROUP(TACH9),
2095         ASPEED_PINCTRL_GROUP(THRU0),
2096         ASPEED_PINCTRL_GROUP(THRU1),
2097         ASPEED_PINCTRL_GROUP(THRU2),
2098         ASPEED_PINCTRL_GROUP(THRU3),
2099         ASPEED_PINCTRL_GROUP(TXD1),
2100         ASPEED_PINCTRL_GROUP(TXD2),
2101         ASPEED_PINCTRL_GROUP(TXD3),
2102         ASPEED_PINCTRL_GROUP(TXD4),
2103         ASPEED_PINCTRL_GROUP(UART10),
2104         ASPEED_PINCTRL_GROUP(UART11),
2105         ASPEED_PINCTRL_GROUP(UART12G0),
2106         ASPEED_PINCTRL_GROUP(UART12G1),
2107         ASPEED_PINCTRL_GROUP(UART13G0),
2108         ASPEED_PINCTRL_GROUP(UART13G1),
2109         ASPEED_PINCTRL_GROUP(UART6),
2110         ASPEED_PINCTRL_GROUP(UART7),
2111         ASPEED_PINCTRL_GROUP(UART8),
2112         ASPEED_PINCTRL_GROUP(UART9),
2113         ASPEED_PINCTRL_GROUP(USBA),
2114         ASPEED_PINCTRL_GROUP(USBB),
2115         ASPEED_PINCTRL_GROUP(VB),
2116         ASPEED_PINCTRL_GROUP(VGAHS),
2117         ASPEED_PINCTRL_GROUP(VGAVS),
2118         ASPEED_PINCTRL_GROUP(WDTRST1),
2119         ASPEED_PINCTRL_GROUP(WDTRST2),
2120         ASPEED_PINCTRL_GROUP(WDTRST3),
2121         ASPEED_PINCTRL_GROUP(WDTRST4),
2122 };
2123
2124 static const struct aspeed_pin_function aspeed_g6_functions[] = {
2125         ASPEED_PINCTRL_FUNC(ADC0),
2126         ASPEED_PINCTRL_FUNC(ADC1),
2127         ASPEED_PINCTRL_FUNC(ADC10),
2128         ASPEED_PINCTRL_FUNC(ADC11),
2129         ASPEED_PINCTRL_FUNC(ADC12),
2130         ASPEED_PINCTRL_FUNC(ADC13),
2131         ASPEED_PINCTRL_FUNC(ADC14),
2132         ASPEED_PINCTRL_FUNC(ADC15),
2133         ASPEED_PINCTRL_FUNC(ADC2),
2134         ASPEED_PINCTRL_FUNC(ADC3),
2135         ASPEED_PINCTRL_FUNC(ADC4),
2136         ASPEED_PINCTRL_FUNC(ADC5),
2137         ASPEED_PINCTRL_FUNC(ADC6),
2138         ASPEED_PINCTRL_FUNC(ADC7),
2139         ASPEED_PINCTRL_FUNC(ADC8),
2140         ASPEED_PINCTRL_FUNC(ADC9),
2141         ASPEED_PINCTRL_FUNC(BMCINT),
2142         ASPEED_PINCTRL_FUNC(EMMC),
2143         ASPEED_PINCTRL_FUNC(ESPI),
2144         ASPEED_PINCTRL_FUNC(ESPIALT),
2145         ASPEED_PINCTRL_FUNC(FSI1),
2146         ASPEED_PINCTRL_FUNC(FSI2),
2147         ASPEED_PINCTRL_FUNC(FWSPIABR),
2148         ASPEED_PINCTRL_FUNC(FWSPID),
2149         ASPEED_PINCTRL_FUNC(FWSPIWP),
2150         ASPEED_PINCTRL_FUNC(GPIT0),
2151         ASPEED_PINCTRL_FUNC(GPIT1),
2152         ASPEED_PINCTRL_FUNC(GPIT2),
2153         ASPEED_PINCTRL_FUNC(GPIT3),
2154         ASPEED_PINCTRL_FUNC(GPIT4),
2155         ASPEED_PINCTRL_FUNC(GPIT5),
2156         ASPEED_PINCTRL_FUNC(GPIT6),
2157         ASPEED_PINCTRL_FUNC(GPIT7),
2158         ASPEED_PINCTRL_FUNC(GPIU0),
2159         ASPEED_PINCTRL_FUNC(GPIU1),
2160         ASPEED_PINCTRL_FUNC(GPIU2),
2161         ASPEED_PINCTRL_FUNC(GPIU3),
2162         ASPEED_PINCTRL_FUNC(GPIU4),
2163         ASPEED_PINCTRL_FUNC(GPIU5),
2164         ASPEED_PINCTRL_FUNC(GPIU6),
2165         ASPEED_PINCTRL_FUNC(GPIU7),
2166         ASPEED_PINCTRL_FUNC(HEARTBEAT),
2167         ASPEED_PINCTRL_FUNC(I2C1),
2168         ASPEED_PINCTRL_FUNC(I2C10),
2169         ASPEED_PINCTRL_FUNC(I2C11),
2170         ASPEED_PINCTRL_FUNC(I2C12),
2171         ASPEED_PINCTRL_FUNC(I2C13),
2172         ASPEED_PINCTRL_FUNC(I2C14),
2173         ASPEED_PINCTRL_FUNC(I2C15),
2174         ASPEED_PINCTRL_FUNC(I2C16),
2175         ASPEED_PINCTRL_FUNC(I2C2),
2176         ASPEED_PINCTRL_FUNC(I2C3),
2177         ASPEED_PINCTRL_FUNC(I2C4),
2178         ASPEED_PINCTRL_FUNC(I2C5),
2179         ASPEED_PINCTRL_FUNC(I2C6),
2180         ASPEED_PINCTRL_FUNC(I2C7),
2181         ASPEED_PINCTRL_FUNC(I2C8),
2182         ASPEED_PINCTRL_FUNC(I2C9),
2183         ASPEED_PINCTRL_FUNC(I3C1),
2184         ASPEED_PINCTRL_FUNC(I3C2),
2185         ASPEED_PINCTRL_FUNC(I3C3),
2186         ASPEED_PINCTRL_FUNC(I3C4),
2187         ASPEED_PINCTRL_FUNC(I3C5),
2188         ASPEED_PINCTRL_FUNC(I3C6),
2189         ASPEED_PINCTRL_FUNC(JTAGM),
2190         ASPEED_PINCTRL_FUNC(LHPD),
2191         ASPEED_PINCTRL_FUNC(LHSIRQ),
2192         ASPEED_PINCTRL_FUNC(LPC),
2193         ASPEED_PINCTRL_FUNC(LPCHC),
2194         ASPEED_PINCTRL_FUNC(LPCPD),
2195         ASPEED_PINCTRL_FUNC(LPCPME),
2196         ASPEED_PINCTRL_FUNC(LPCSMI),
2197         ASPEED_PINCTRL_FUNC(LSIRQ),
2198         ASPEED_PINCTRL_FUNC(MACLINK1),
2199         ASPEED_PINCTRL_FUNC(MACLINK2),
2200         ASPEED_PINCTRL_FUNC(MACLINK3),
2201         ASPEED_PINCTRL_FUNC(MACLINK4),
2202         ASPEED_PINCTRL_FUNC(MDIO1),
2203         ASPEED_PINCTRL_FUNC(MDIO2),
2204         ASPEED_PINCTRL_FUNC(MDIO3),
2205         ASPEED_PINCTRL_FUNC(MDIO4),
2206         ASPEED_PINCTRL_FUNC(NCTS1),
2207         ASPEED_PINCTRL_FUNC(NCTS2),
2208         ASPEED_PINCTRL_FUNC(NCTS3),
2209         ASPEED_PINCTRL_FUNC(NCTS4),
2210         ASPEED_PINCTRL_FUNC(NDCD1),
2211         ASPEED_PINCTRL_FUNC(NDCD2),
2212         ASPEED_PINCTRL_FUNC(NDCD3),
2213         ASPEED_PINCTRL_FUNC(NDCD4),
2214         ASPEED_PINCTRL_FUNC(NDSR1),
2215         ASPEED_PINCTRL_FUNC(NDSR2),
2216         ASPEED_PINCTRL_FUNC(NDSR3),
2217         ASPEED_PINCTRL_FUNC(NDSR4),
2218         ASPEED_PINCTRL_FUNC(NDTR1),
2219         ASPEED_PINCTRL_FUNC(NDTR2),
2220         ASPEED_PINCTRL_FUNC(NDTR3),
2221         ASPEED_PINCTRL_FUNC(NDTR4),
2222         ASPEED_PINCTRL_FUNC(NRI1),
2223         ASPEED_PINCTRL_FUNC(NRI2),
2224         ASPEED_PINCTRL_FUNC(NRI3),
2225         ASPEED_PINCTRL_FUNC(NRI4),
2226         ASPEED_PINCTRL_FUNC(NRTS1),
2227         ASPEED_PINCTRL_FUNC(NRTS2),
2228         ASPEED_PINCTRL_FUNC(NRTS3),
2229         ASPEED_PINCTRL_FUNC(NRTS4),
2230         ASPEED_PINCTRL_FUNC(OSCCLK),
2231         ASPEED_PINCTRL_FUNC(PEWAKE),
2232         ASPEED_PINCTRL_FUNC(PWM0),
2233         ASPEED_PINCTRL_FUNC(PWM1),
2234         ASPEED_PINCTRL_FUNC(PWM10),
2235         ASPEED_PINCTRL_FUNC(PWM11),
2236         ASPEED_PINCTRL_FUNC(PWM12),
2237         ASPEED_PINCTRL_FUNC(PWM13),
2238         ASPEED_PINCTRL_FUNC(PWM14),
2239         ASPEED_PINCTRL_FUNC(PWM15),
2240         ASPEED_PINCTRL_FUNC(PWM2),
2241         ASPEED_PINCTRL_FUNC(PWM3),
2242         ASPEED_PINCTRL_FUNC(PWM4),
2243         ASPEED_PINCTRL_FUNC(PWM5),
2244         ASPEED_PINCTRL_FUNC(PWM6),
2245         ASPEED_PINCTRL_FUNC(PWM7),
2246         ASPEED_PINCTRL_FUNC(PWM8),
2247         ASPEED_PINCTRL_FUNC(PWM9),
2248         ASPEED_PINCTRL_FUNC(RGMII1),
2249         ASPEED_PINCTRL_FUNC(RGMII2),
2250         ASPEED_PINCTRL_FUNC(RGMII3),
2251         ASPEED_PINCTRL_FUNC(RGMII4),
2252         ASPEED_PINCTRL_FUNC(RMII1),
2253         ASPEED_PINCTRL_FUNC(RMII2),
2254         ASPEED_PINCTRL_FUNC(RMII3),
2255         ASPEED_PINCTRL_FUNC(RMII4),
2256         ASPEED_PINCTRL_FUNC(RXD1),
2257         ASPEED_PINCTRL_FUNC(RXD2),
2258         ASPEED_PINCTRL_FUNC(RXD3),
2259         ASPEED_PINCTRL_FUNC(RXD4),
2260         ASPEED_PINCTRL_FUNC(SALT1),
2261         ASPEED_PINCTRL_FUNC(SALT10),
2262         ASPEED_PINCTRL_FUNC(SALT11),
2263         ASPEED_PINCTRL_FUNC(SALT12),
2264         ASPEED_PINCTRL_FUNC(SALT13),
2265         ASPEED_PINCTRL_FUNC(SALT14),
2266         ASPEED_PINCTRL_FUNC(SALT15),
2267         ASPEED_PINCTRL_FUNC(SALT16),
2268         ASPEED_PINCTRL_FUNC(SALT2),
2269         ASPEED_PINCTRL_FUNC(SALT3),
2270         ASPEED_PINCTRL_FUNC(SALT4),
2271         ASPEED_PINCTRL_FUNC(SALT5),
2272         ASPEED_PINCTRL_FUNC(SALT6),
2273         ASPEED_PINCTRL_FUNC(SALT7),
2274         ASPEED_PINCTRL_FUNC(SALT8),
2275         ASPEED_PINCTRL_FUNC(SALT9),
2276         ASPEED_PINCTRL_FUNC(SD1),
2277         ASPEED_PINCTRL_FUNC(SD2),
2278         ASPEED_PINCTRL_FUNC(SGPM1),
2279         ASPEED_PINCTRL_FUNC(SGPS1),
2280         ASPEED_PINCTRL_FUNC(SIOONCTRL),
2281         ASPEED_PINCTRL_FUNC(SIOPBI),
2282         ASPEED_PINCTRL_FUNC(SIOPBO),
2283         ASPEED_PINCTRL_FUNC(SIOPWREQ),
2284         ASPEED_PINCTRL_FUNC(SIOPWRGD),
2285         ASPEED_PINCTRL_FUNC(SIOS3),
2286         ASPEED_PINCTRL_FUNC(SIOS5),
2287         ASPEED_PINCTRL_FUNC(SIOSCI),
2288         ASPEED_PINCTRL_FUNC(SPI1),
2289         ASPEED_PINCTRL_FUNC(SPI1ABR),
2290         ASPEED_PINCTRL_FUNC(SPI1CS1),
2291         ASPEED_PINCTRL_FUNC(SPI1WP),
2292         ASPEED_PINCTRL_FUNC(SPI2),
2293         ASPEED_PINCTRL_FUNC(SPI2CS1),
2294         ASPEED_PINCTRL_FUNC(SPI2CS2),
2295         ASPEED_PINCTRL_FUNC(TACH0),
2296         ASPEED_PINCTRL_FUNC(TACH1),
2297         ASPEED_PINCTRL_FUNC(TACH10),
2298         ASPEED_PINCTRL_FUNC(TACH11),
2299         ASPEED_PINCTRL_FUNC(TACH12),
2300         ASPEED_PINCTRL_FUNC(TACH13),
2301         ASPEED_PINCTRL_FUNC(TACH14),
2302         ASPEED_PINCTRL_FUNC(TACH15),
2303         ASPEED_PINCTRL_FUNC(TACH2),
2304         ASPEED_PINCTRL_FUNC(TACH3),
2305         ASPEED_PINCTRL_FUNC(TACH4),
2306         ASPEED_PINCTRL_FUNC(TACH5),
2307         ASPEED_PINCTRL_FUNC(TACH6),
2308         ASPEED_PINCTRL_FUNC(TACH7),
2309         ASPEED_PINCTRL_FUNC(TACH8),
2310         ASPEED_PINCTRL_FUNC(TACH9),
2311         ASPEED_PINCTRL_FUNC(THRU0),
2312         ASPEED_PINCTRL_FUNC(THRU1),
2313         ASPEED_PINCTRL_FUNC(THRU2),
2314         ASPEED_PINCTRL_FUNC(THRU3),
2315         ASPEED_PINCTRL_FUNC(TXD1),
2316         ASPEED_PINCTRL_FUNC(TXD2),
2317         ASPEED_PINCTRL_FUNC(TXD3),
2318         ASPEED_PINCTRL_FUNC(TXD4),
2319         ASPEED_PINCTRL_FUNC(UART10),
2320         ASPEED_PINCTRL_FUNC(UART11),
2321         ASPEED_PINCTRL_FUNC(UART12),
2322         ASPEED_PINCTRL_FUNC(UART13),
2323         ASPEED_PINCTRL_FUNC(UART6),
2324         ASPEED_PINCTRL_FUNC(UART7),
2325         ASPEED_PINCTRL_FUNC(UART8),
2326         ASPEED_PINCTRL_FUNC(UART9),
2327         ASPEED_PINCTRL_FUNC(USB11BHID),
2328         ASPEED_PINCTRL_FUNC(USB2AD),
2329         ASPEED_PINCTRL_FUNC(USB2ADP),
2330         ASPEED_PINCTRL_FUNC(USB2AH),
2331         ASPEED_PINCTRL_FUNC(USB2AHP),
2332         ASPEED_PINCTRL_FUNC(USB2BD),
2333         ASPEED_PINCTRL_FUNC(USB2BH),
2334         ASPEED_PINCTRL_FUNC(VB),
2335         ASPEED_PINCTRL_FUNC(VGAHS),
2336         ASPEED_PINCTRL_FUNC(VGAVS),
2337         ASPEED_PINCTRL_FUNC(WDTRST1),
2338         ASPEED_PINCTRL_FUNC(WDTRST2),
2339         ASPEED_PINCTRL_FUNC(WDTRST3),
2340         ASPEED_PINCTRL_FUNC(WDTRST4),
2341 };
2342
2343 static struct aspeed_pin_config aspeed_g6_configs[] = {
2344         /* GPIOB7 */
2345         ASPEED_PULL_DOWN_PINCONF(J24, SCU610, 15),
2346         /* GPIOB6 */
2347         ASPEED_PULL_DOWN_PINCONF(H25, SCU610, 14),
2348         /* GPIOB5 */
2349         ASPEED_PULL_DOWN_PINCONF(G26, SCU610, 13),
2350         /* GPIOB4 */
2351         ASPEED_PULL_DOWN_PINCONF(J23, SCU610, 12),
2352         /* GPIOB3 */
2353         ASPEED_PULL_DOWN_PINCONF(J25, SCU610, 11),
2354         /* GPIOB2 */
2355         ASPEED_PULL_DOWN_PINCONF(H26, SCU610, 10),
2356         /* GPIOB1 */
2357         ASPEED_PULL_DOWN_PINCONF(K23, SCU610, 9),
2358         /* GPIOB0 */
2359         ASPEED_PULL_DOWN_PINCONF(J26, SCU610, 8),
2360
2361         /* GPIOH3 */
2362         ASPEED_PULL_DOWN_PINCONF(A17, SCU614, 27),
2363         /* GPIOH2 */
2364         ASPEED_PULL_DOWN_PINCONF(C18, SCU614, 26),
2365         /* GPIOH1 */
2366         ASPEED_PULL_DOWN_PINCONF(B18, SCU614, 25),
2367         /* GPIOH0 */
2368         ASPEED_PULL_DOWN_PINCONF(A18, SCU614, 24),
2369
2370         /* GPIOL7 */
2371         ASPEED_PULL_DOWN_PINCONF(C14, SCU618, 31),
2372         /* GPIOL6 */
2373         ASPEED_PULL_DOWN_PINCONF(B14, SCU618, 30),
2374         /* GPIOL5 */
2375         ASPEED_PULL_DOWN_PINCONF(F15, SCU618, 29),
2376         /* GPIOL4 */
2377         ASPEED_PULL_DOWN_PINCONF(C15, SCU618, 28),
2378
2379         /* GPIOJ7 */
2380         ASPEED_PULL_UP_PINCONF(D19, SCU618, 15),
2381         /* GPIOJ6 */
2382         ASPEED_PULL_UP_PINCONF(C20, SCU618, 14),
2383         /* GPIOJ5 */
2384         ASPEED_PULL_UP_PINCONF(A19, SCU618, 13),
2385         /* GPIOJ4 */
2386         ASPEED_PULL_UP_PINCONF(C19, SCU618, 12),
2387         /* GPIOJ3 */
2388         ASPEED_PULL_UP_PINCONF(D20, SCU618, 11),
2389         /* GPIOJ2 */
2390         ASPEED_PULL_UP_PINCONF(E19, SCU618, 10),
2391         /* GPIOJ1 */
2392         ASPEED_PULL_UP_PINCONF(A20, SCU618, 9),
2393         /* GPIOJ0 */
2394         ASPEED_PULL_UP_PINCONF(B20, SCU618, 8),
2395
2396         /* GPIOI7 */
2397         ASPEED_PULL_DOWN_PINCONF(A15, SCU618, 7),
2398         /* GPIOI6 */
2399         ASPEED_PULL_DOWN_PINCONF(B16, SCU618, 6),
2400         /* GPIOI5 */
2401         ASPEED_PULL_DOWN_PINCONF(E16, SCU618, 5),
2402         /* GPIOI4 */
2403         ASPEED_PULL_DOWN_PINCONF(C16, SCU618, 4),
2404         /* GPIOI3 */
2405         ASPEED_PULL_DOWN_PINCONF(D16, SCU618, 3),
2406         /* GPIOI2 */
2407         ASPEED_PULL_DOWN_PINCONF(E17, SCU618, 2),
2408         /* GPIOI1 */
2409         ASPEED_PULL_DOWN_PINCONF(A16, SCU618, 1),
2410         /* GPIOI0 */
2411         ASPEED_PULL_DOWN_PINCONF(D17, SCU618, 0),
2412
2413         /* GPIOP7 */
2414         ASPEED_PULL_DOWN_PINCONF(Y23, SCU61C, 31),
2415         /* GPIOP6 */
2416         ASPEED_PULL_DOWN_PINCONF(AB24, SCU61C, 30),
2417         /* GPIOP5 */
2418         ASPEED_PULL_DOWN_PINCONF(AB23, SCU61C, 29),
2419         /* GPIOP4 */
2420         ASPEED_PULL_DOWN_PINCONF(W23, SCU61C, 28),
2421         /* GPIOP3 */
2422         ASPEED_PULL_DOWN_PINCONF(AA24, SCU61C, 27),
2423         /* GPIOP2 */
2424         ASPEED_PULL_DOWN_PINCONF(AA23, SCU61C, 26),
2425         /* GPIOP1 */
2426         ASPEED_PULL_DOWN_PINCONF(W24, SCU61C, 25),
2427         /* GPIOP0 */
2428         ASPEED_PULL_DOWN_PINCONF(AB22, SCU61C, 24),
2429
2430         /* GPIOO7 */
2431         ASPEED_PULL_DOWN_PINCONF(AC23, SCU61C, 23),
2432         /* GPIOO6 */
2433         ASPEED_PULL_DOWN_PINCONF(AC24, SCU61C, 22),
2434         /* GPIOO5 */
2435         ASPEED_PULL_DOWN_PINCONF(AC22, SCU61C, 21),
2436         /* GPIOO4 */
2437         ASPEED_PULL_DOWN_PINCONF(AD25, SCU61C, 20),
2438         /* GPIOO3 */
2439         ASPEED_PULL_DOWN_PINCONF(AD24, SCU61C, 19),
2440         /* GPIOO2 */
2441         ASPEED_PULL_DOWN_PINCONF(AD23, SCU61C, 18),
2442         /* GPIOO1 */
2443         ASPEED_PULL_DOWN_PINCONF(AD22, SCU61C, 17),
2444         /* GPIOO0 */
2445         ASPEED_PULL_DOWN_PINCONF(AD26, SCU61C, 16),
2446
2447         /* GPION7 */
2448         ASPEED_PULL_DOWN_PINCONF(M26, SCU61C, 15),
2449         /* GPION6 */
2450         ASPEED_PULL_DOWN_PINCONF(N26, SCU61C, 14),
2451         /* GPION5 */
2452         ASPEED_PULL_DOWN_PINCONF(M23, SCU61C, 13),
2453         /* GPION4 */
2454         ASPEED_PULL_DOWN_PINCONF(P26, SCU61C, 12),
2455         /* GPION3 */
2456         ASPEED_PULL_DOWN_PINCONF(N24, SCU61C, 11),
2457         /* GPION2 */
2458         ASPEED_PULL_DOWN_PINCONF(N25, SCU61C, 10),
2459         /* GPION1 */
2460         ASPEED_PULL_DOWN_PINCONF(N23, SCU61C, 9),
2461         /* GPION0 */
2462         ASPEED_PULL_DOWN_PINCONF(P25, SCU61C, 8),
2463
2464         /* GPIOM7 */
2465         ASPEED_PULL_DOWN_PINCONF(D13, SCU61C, 7),
2466         /* GPIOM6 */
2467         ASPEED_PULL_DOWN_PINCONF(C13, SCU61C, 6),
2468         /* GPIOM5 */
2469         ASPEED_PULL_DOWN_PINCONF(C12, SCU61C, 5),
2470         /* GPIOM4 */
2471         ASPEED_PULL_DOWN_PINCONF(B12, SCU61C, 4),
2472         /* GPIOM3 */
2473         ASPEED_PULL_DOWN_PINCONF(E14, SCU61C, 3),
2474         /* GPIOM2 */
2475         ASPEED_PULL_DOWN_PINCONF(A12, SCU61C, 2),
2476         /* GPIOM1 */
2477         ASPEED_PULL_DOWN_PINCONF(B13, SCU61C, 1),
2478         /* GPIOM0 */
2479         ASPEED_PULL_DOWN_PINCONF(D14, SCU61C, 0),
2480
2481         /* GPIOS7 */
2482         ASPEED_PULL_DOWN_PINCONF(T24, SCU620, 23),
2483         /* GPIOS6 */
2484         ASPEED_PULL_DOWN_PINCONF(P23, SCU620, 22),
2485         /* GPIOS5 */
2486         ASPEED_PULL_DOWN_PINCONF(P24, SCU620, 21),
2487         /* GPIOS4 */
2488         ASPEED_PULL_DOWN_PINCONF(R26, SCU620, 20),
2489         /* GPIOS3*/
2490         ASPEED_PULL_DOWN_PINCONF(R24, SCU620, 19),
2491         /* GPIOS2 */
2492         ASPEED_PULL_DOWN_PINCONF(T26, SCU620, 18),
2493         /* GPIOS1 */
2494         ASPEED_PULL_DOWN_PINCONF(T25, SCU620, 17),
2495         /* GPIOS0 */
2496         ASPEED_PULL_DOWN_PINCONF(R23, SCU620, 16),
2497
2498         /* GPIOR7 */
2499         ASPEED_PULL_DOWN_PINCONF(U26, SCU620, 15),
2500         /* GPIOR6 */
2501         ASPEED_PULL_DOWN_PINCONF(W26, SCU620, 14),
2502         /* GPIOR5 */
2503         ASPEED_PULL_DOWN_PINCONF(T23, SCU620, 13),
2504         /* GPIOR4 */
2505         ASPEED_PULL_DOWN_PINCONF(U25, SCU620, 12),
2506         /* GPIOR3*/
2507         ASPEED_PULL_DOWN_PINCONF(V26, SCU620, 11),
2508         /* GPIOR2 */
2509         ASPEED_PULL_DOWN_PINCONF(V24, SCU620, 10),
2510         /* GPIOR1 */
2511         ASPEED_PULL_DOWN_PINCONF(U24, SCU620, 9),
2512         /* GPIOR0 */
2513         ASPEED_PULL_DOWN_PINCONF(V25, SCU620, 8),
2514
2515         /* GPIOX7 */
2516         ASPEED_PULL_DOWN_PINCONF(AB10, SCU634, 31),
2517         /* GPIOX6 */
2518         ASPEED_PULL_DOWN_PINCONF(AF9, SCU634, 30),
2519         /* GPIOX5 */
2520         ASPEED_PULL_DOWN_PINCONF(AD9, SCU634, 29),
2521         /* GPIOX4 */
2522         ASPEED_PULL_DOWN_PINCONF(AB9, SCU634, 28),
2523         /* GPIOX3*/
2524         ASPEED_PULL_DOWN_PINCONF(AF8, SCU634, 27),
2525         /* GPIOX2 */
2526         ASPEED_PULL_DOWN_PINCONF(AC9, SCU634, 26),
2527         /* GPIOX1 */
2528         ASPEED_PULL_DOWN_PINCONF(AA9, SCU634, 25),
2529         /* GPIOX0 */
2530         ASPEED_PULL_DOWN_PINCONF(AE8, SCU634, 24),
2531
2532         /* GPIOV7 */
2533         ASPEED_PULL_DOWN_PINCONF(AF15, SCU634, 15),
2534         /* GPIOV6 */
2535         ASPEED_PULL_DOWN_PINCONF(AD15, SCU634, 14),
2536         /* GPIOV5 */
2537         ASPEED_PULL_DOWN_PINCONF(AE14, SCU634, 13),
2538         /* GPIOV4 */
2539         ASPEED_PULL_DOWN_PINCONF(AE15, SCU634, 12),
2540         /* GPIOV3*/
2541         ASPEED_PULL_DOWN_PINCONF(AC15, SCU634, 11),
2542         /* GPIOV2 */
2543         ASPEED_PULL_DOWN_PINCONF(AD14, SCU634, 10),
2544         /* GPIOV1 */
2545         ASPEED_PULL_DOWN_PINCONF(AF14, SCU634, 9),
2546         /* GPIOV0 */
2547         ASPEED_PULL_DOWN_PINCONF(AB15, SCU634, 8),
2548
2549         /* GPIOZ7 */
2550         ASPEED_PULL_DOWN_PINCONF(AF10, SCU638, 15),
2551         /* GPIOZ6 */
2552         ASPEED_PULL_DOWN_PINCONF(AD11, SCU638, 14),
2553         /* GPIOZ5 */
2554         ASPEED_PULL_DOWN_PINCONF(AA11, SCU638, 13),
2555         /* GPIOZ4 */
2556         ASPEED_PULL_DOWN_PINCONF(AC11, SCU638, 12),
2557         /* GPIOZ3*/
2558         ASPEED_PULL_DOWN_PINCONF(AB11, SCU638, 11),
2559
2560         /* GPIOZ1 */
2561         ASPEED_PULL_DOWN_PINCONF(AD10, SCU638, 9),
2562         /* GPIOZ0 */
2563         ASPEED_PULL_DOWN_PINCONF(AC10, SCU638, 8),
2564
2565         /* GPIOY6 */
2566         ASPEED_PULL_DOWN_PINCONF(AC12, SCU638, 6),
2567         /* GPIOY5 */
2568         ASPEED_PULL_DOWN_PINCONF(AF12, SCU638, 5),
2569         /* GPIOY4 */
2570         ASPEED_PULL_DOWN_PINCONF(AE12, SCU638, 4),
2571         /* GPIOY3 */
2572         ASPEED_PULL_DOWN_PINCONF(AA12, SCU638, 3),
2573         /* GPIOY2 */
2574         ASPEED_PULL_DOWN_PINCONF(AE11, SCU638, 2),
2575         /* GPIOY1 */
2576         ASPEED_PULL_DOWN_PINCONF(AD12, SCU638, 1),
2577         /* GPIOY0 */
2578         ASPEED_PULL_DOWN_PINCONF(AF11, SCU638, 0),
2579
2580         /* LAD3 */
2581         { PIN_CONFIG_DRIVE_STRENGTH, { AC7, AC7 }, SCU454, GENMASK(31, 30)},
2582         /* LAD2 */
2583         { PIN_CONFIG_DRIVE_STRENGTH, { AC8, AC8 }, SCU454, GENMASK(29, 28)},
2584         /* LAD1 */
2585         { PIN_CONFIG_DRIVE_STRENGTH, { AB8, AB8 }, SCU454, GENMASK(27, 26)},
2586         /* LAD0 */
2587         { PIN_CONFIG_DRIVE_STRENGTH, { AB7, AB7 }, SCU454, GENMASK(25, 24)},
2588
2589         /* MAC3 */
2590         { PIN_CONFIG_POWER_SOURCE,   { H24, E26 }, SCU458, BIT_MASK(4)},
2591         { PIN_CONFIG_DRIVE_STRENGTH, { H24, E26 }, SCU458, GENMASK(1, 0)},
2592         /* MAC4 */
2593         { PIN_CONFIG_POWER_SOURCE,   { F24, B24 }, SCU458, BIT_MASK(5)},
2594         { PIN_CONFIG_DRIVE_STRENGTH, { F24, B24 }, SCU458, GENMASK(3, 2)},
2595
2596         /* GPIO18E */
2597         ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, Y1, Y4, SCU40C, 4),
2598         ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   Y1, Y4, SCU40C, 4),
2599         /* GPIO18D */
2600         ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, AB4, AC5, SCU40C, 3),
2601         ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   AB4, AC5, SCU40C, 3),
2602         /* GPIO18C */
2603         ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, E4, E1, SCU40C, 2),
2604         ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   E4, E1, SCU40C, 2),
2605         /* GPIO18B */
2606         ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B2, D3, SCU40C, 1),
2607         ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   B2, D3, SCU40C, 1),
2608         /* GPIO18A */
2609         ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, C6, A2, SCU40C, 0),
2610         ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   C6, A2, SCU40C, 0),
2611 };
2612
2613 /**
2614  * Configure a pin's signal by applying an expression's descriptor state for
2615  * all descriptors in the expression.
2616  *
2617  * @ctx: The pinmux context
2618  * @expr: The expression associated with the function whose signal is to be
2619  *        configured
2620  * @enable: true to enable an function's signal through a pin's signal
2621  *          expression, false to disable the function's signal
2622  *
2623  * Return: 0 if the expression is configured as requested and a negative error
2624  * code otherwise
2625  */
2626 static int aspeed_g6_sig_expr_set(struct aspeed_pinmux_data *ctx,
2627                                   const struct aspeed_sig_expr *expr,
2628                                   bool enable)
2629 {
2630         int ret;
2631         int i;
2632
2633         for (i = 0; i < expr->ndescs; i++) {
2634                 const struct aspeed_sig_desc *desc = &expr->descs[i];
2635                 u32 pattern = enable ? desc->enable : desc->disable;
2636                 u32 val = (pattern << __ffs(desc->mask));
2637                 bool is_strap;
2638
2639                 if (!ctx->maps[desc->ip])
2640                         return -ENODEV;
2641
2642                 WARN_ON(desc->ip != ASPEED_IP_SCU);
2643                 is_strap = desc->reg == SCU500 || desc->reg == SCU510;
2644
2645                 if (is_strap) {
2646                         /*
2647                          * The AST2600 has write protection mask registers for
2648                          * the hardware strapping in SCU508 and SCU518. Assume
2649                          * that if the platform doesn't want the strapping
2650                          * values changed that it has set the write mask.
2651                          *
2652                          * The strapping registers implement write-1-clear
2653                          * behaviour. SCU500 is paired with clear writes on
2654                          * SCU504, likewise SCU510 is paired with SCU514.
2655                          */
2656                         u32 clear = ~val & desc->mask;
2657                         u32 w1c = desc->reg + 4;
2658
2659                         if (clear)
2660                                 ret = regmap_update_bits(ctx->maps[desc->ip],
2661                                                          w1c, desc->mask,
2662                                                          clear);
2663                 }
2664
2665                 ret = regmap_update_bits(ctx->maps[desc->ip], desc->reg,
2666                                          desc->mask, val);
2667                 if (ret)
2668                         return ret;
2669         }
2670
2671         ret = aspeed_sig_expr_eval(ctx, expr, enable);
2672         if (ret < 0)
2673                 return ret;
2674
2675         if (!ret)
2676                 return -EPERM;
2677         return 0;
2678 }
2679
2680 static const struct aspeed_pin_config_map aspeed_g6_pin_config_map[] = {
2681         { PIN_CONFIG_BIAS_PULL_DOWN,  0,   1, BIT_MASK(0)},
2682         { PIN_CONFIG_BIAS_PULL_DOWN, -1,   0, BIT_MASK(0)},
2683         { PIN_CONFIG_BIAS_PULL_UP,    0,   1, BIT_MASK(0)},
2684         { PIN_CONFIG_BIAS_PULL_UP,   -1,   0, BIT_MASK(0)},
2685         { PIN_CONFIG_BIAS_DISABLE,   -1,   1, BIT_MASK(0)},
2686         { PIN_CONFIG_DRIVE_STRENGTH,  4,   0, GENMASK(1, 0)},
2687         { PIN_CONFIG_DRIVE_STRENGTH,  8,   1, GENMASK(1, 0)},
2688         { PIN_CONFIG_DRIVE_STRENGTH, 12,   2, GENMASK(1, 0)},
2689         { PIN_CONFIG_DRIVE_STRENGTH, 16,   3, GENMASK(1, 0)},
2690         { PIN_CONFIG_POWER_SOURCE,   3300, 0, BIT_MASK(0)},
2691         { PIN_CONFIG_POWER_SOURCE,   1800, 1, BIT_MASK(0)},
2692 };
2693
2694 static const struct aspeed_pinmux_ops aspeed_g5_ops = {
2695         .set = aspeed_g6_sig_expr_set,
2696 };
2697
2698 static struct aspeed_pinctrl_data aspeed_g6_pinctrl_data = {
2699         .pins = aspeed_g6_pins,
2700         .npins = ARRAY_SIZE(aspeed_g6_pins),
2701         .pinmux = {
2702                 .ops = &aspeed_g5_ops,
2703                 .groups = aspeed_g6_groups,
2704                 .ngroups = ARRAY_SIZE(aspeed_g6_groups),
2705                 .functions = aspeed_g6_functions,
2706                 .nfunctions = ARRAY_SIZE(aspeed_g6_functions),
2707         },
2708         .configs = aspeed_g6_configs,
2709         .nconfigs = ARRAY_SIZE(aspeed_g6_configs),
2710         .confmaps = aspeed_g6_pin_config_map,
2711         .nconfmaps = ARRAY_SIZE(aspeed_g6_pin_config_map),
2712 };
2713
2714 static const struct pinmux_ops aspeed_g6_pinmux_ops = {
2715         .get_functions_count = aspeed_pinmux_get_fn_count,
2716         .get_function_name = aspeed_pinmux_get_fn_name,
2717         .get_function_groups = aspeed_pinmux_get_fn_groups,
2718         .set_mux = aspeed_pinmux_set_mux,
2719         .gpio_request_enable = aspeed_gpio_request_enable,
2720         .strict = true,
2721 };
2722
2723 static const struct pinctrl_ops aspeed_g6_pinctrl_ops = {
2724         .get_groups_count = aspeed_pinctrl_get_groups_count,
2725         .get_group_name = aspeed_pinctrl_get_group_name,
2726         .get_group_pins = aspeed_pinctrl_get_group_pins,
2727         .pin_dbg_show = aspeed_pinctrl_pin_dbg_show,
2728         .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
2729         .dt_free_map = pinctrl_utils_free_map,
2730 };
2731
2732 static const struct pinconf_ops aspeed_g6_conf_ops = {
2733         .is_generic = true,
2734         .pin_config_get = aspeed_pin_config_get,
2735         .pin_config_set = aspeed_pin_config_set,
2736         .pin_config_group_get = aspeed_pin_config_group_get,
2737         .pin_config_group_set = aspeed_pin_config_group_set,
2738 };
2739
2740 static struct pinctrl_desc aspeed_g6_pinctrl_desc = {
2741         .name = "aspeed-g6-pinctrl",
2742         .pins = aspeed_g6_pins,
2743         .npins = ARRAY_SIZE(aspeed_g6_pins),
2744         .pctlops = &aspeed_g6_pinctrl_ops,
2745         .pmxops = &aspeed_g6_pinmux_ops,
2746         .confops = &aspeed_g6_conf_ops,
2747 };
2748
2749 static int aspeed_g6_pinctrl_probe(struct platform_device *pdev)
2750 {
2751         int i;
2752
2753         for (i = 0; i < ARRAY_SIZE(aspeed_g6_pins); i++)
2754                 aspeed_g6_pins[i].number = i;
2755
2756         return aspeed_pinctrl_probe(pdev, &aspeed_g6_pinctrl_desc,
2757                         &aspeed_g6_pinctrl_data);
2758 }
2759
2760 static const struct of_device_id aspeed_g6_pinctrl_of_match[] = {
2761         { .compatible = "aspeed,ast2600-pinctrl", },
2762         { },
2763 };
2764
2765 static struct platform_driver aspeed_g6_pinctrl_driver = {
2766         .probe = aspeed_g6_pinctrl_probe,
2767         .driver = {
2768                 .name = "aspeed-g6-pinctrl",
2769                 .of_match_table = aspeed_g6_pinctrl_of_match,
2770         },
2771 };
2772
2773 static int aspeed_g6_pinctrl_init(void)
2774 {
2775         return platform_driver_register(&aspeed_g6_pinctrl_driver);
2776 }
2777
2778 arch_initcall(aspeed_g6_pinctrl_init);