drivers/pinctrl/aspeed/pinctrl-aspeed.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Copyright (C) 2016 IBM Corp.
   4  */
   5
   6 #ifndef PINCTRL_ASPEED
   7 #define PINCTRL_ASPEED
   8
   9 #include <linux/pinctrl/pinctrl.h>
  10 #include <linux/pinctrl/pinmux.h>
  11 #include <linux/pinctrl/pinconf.h>
  12 #include <linux/pinctrl/pinconf-generic.h>
  13 #include <linux/regmap.h>
  14
  15 #include "pinmux-aspeed.h"
  16
  17 /**
  18  * @param The pinconf parameter type
  19  * @pins The pin range this config struct covers, [low, high]
  20  * @reg The register housing the configuration bits
  21  * @mask The mask to select the bits of interest in @reg
  22  */
  23 struct aspeed_pin_config {
  24         enum pin_config_param param;
  25         unsigned int pins[2];
  26         unsigned int reg;
  27         u32 mask;
  28 };
  29
  30 #define ASPEED_PINCTRL_PIN(name_) \
  31         [name_] = { \
  32                 .number = name_, \
  33                 .name = #name_, \
  34                 .drv_data = (void *) &(PIN_SYM(name_)) \
  35         }
  36
  37 #define ASPEED_SB_PINCONF(param_, pin0_, pin1_, reg_, bit_) { \
  38         .param = param_, \
  39         .pins = {pin0_, pin1_}, \
  40         .reg = reg_, \
  41         .mask = BIT_MASK(bit_) \
  42 }
  43
  44 #define ASPEED_PULL_DOWN_PINCONF(pin_, reg_, bit_) \
  45         ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, pin_, pin_, reg_, bit_), \
  46         ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   pin_, pin_, reg_, bit_)
  47
  48 #define ASPEED_PULL_UP_PINCONF(pin_, reg_, bit_) \
  49         ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_UP, pin_, pin_, reg_, bit_), \
  50         ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, pin_, pin_, reg_, bit_)
  51 /*
  52  * Aspeed pin configuration description.
  53  *
  54  * @param: pinconf configuration parameter
  55  * @arg: The supported argument for @param, or -1 if any value is supported
  56  * @val: The register value to write to configure @arg for @param
  57  * @mask: The bitfield mask for @val
  58  *
  59  * The map is to be used in conjunction with the configuration array supplied
  60  * by the driver implementation.
  61  */
  62 struct aspeed_pin_config_map {
  63         enum pin_config_param param;
  64         s32 arg;
  65         u32 val;
  66         u32 mask;
  67 };
  68
  69 struct aspeed_pinctrl_data {
  70         struct regmap *scu;
  71
  72         const struct pinctrl_pin_desc *pins;
  73         const unsigned int npins;
  74
  75         const struct aspeed_pin_config *configs;
  76         const unsigned int nconfigs;
  77
  78         struct aspeed_pinmux_data pinmux;
  79
  80         const struct aspeed_pin_config_map *confmaps;
  81         const unsigned int nconfmaps;
  82 };
  83
  84 /* Aspeed pinctrl helpers */
  85 int aspeed_pinctrl_get_groups_count(struct pinctrl_dev *pctldev);
  86 const char *aspeed_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
  87                 unsigned int group);
  88 int aspeed_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
  89                 unsigned int group, const unsigned int **pins,
  90                 unsigned int *npins);
  91 void aspeed_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
  92                 struct seq_file *s, unsigned int offset);
  93 int aspeed_pinmux_get_fn_count(struct pinctrl_dev *pctldev);
  94 const char *aspeed_pinmux_get_fn_name(struct pinctrl_dev *pctldev,
  95                 unsigned int function);
  96 int aspeed_pinmux_get_fn_groups(struct pinctrl_dev *pctldev,
  97                 unsigned int function, const char * const **groups,
  98                 unsigned int * const num_groups);
  99 int aspeed_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int function,
 100                 unsigned int group);
 101 int aspeed_gpio_request_enable(struct pinctrl_dev *pctldev,
 102                 struct pinctrl_gpio_range *range,
 103                 unsigned int offset);
 104 int aspeed_pinctrl_probe(struct platform_device *pdev,
 105                 struct pinctrl_desc *pdesc,
 106                 struct aspeed_pinctrl_data *pdata);
 107 int aspeed_pin_config_get(struct pinctrl_dev *pctldev, unsigned int offset,
 108                 unsigned long *config);
 109 int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
 110                 unsigned long *configs, unsigned int num_configs);
 111 int aspeed_pin_config_group_get(struct pinctrl_dev *pctldev,
 112                 unsigned int selector,
 113                 unsigned long *config);
 114 int aspeed_pin_config_group_set(struct pinctrl_dev *pctldev,
 115                 unsigned int selector,
 116                 unsigned long *configs,
 117                 unsigned int num_configs);
 118
 119 #endif /* PINCTRL_ASPEED */