WIP FPC-III support
[linux/fpc-iii.git] / drivers / pinctrl / pxa / pinctrl-pxa2xx.h
blobd86d47dbbc947a793c23bb1212de37b116b211be
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Marvell PXA2xx family pin control
5 * Copyright (C) 2015 Robert Jarzmik
6 */
8 #ifndef __PINCTRL_PXA_H
9 #define __PINCTRL_PXA_H
11 #define PXA_FUNCTION(_dir, _af, _name) \
12 { \
13 .name = _name, \
14 .muxval = (_dir | (_af << 1)), \
17 #define PXA_PIN(_pin, funcs...) \
18 { \
19 .pin = _pin, \
20 .functions = (struct pxa_desc_function[]){ \
21 funcs, { } }, \
24 #define PXA_GPIO_PIN(_pin, funcs...) \
25 { \
26 .pin = _pin, \
27 .functions = (struct pxa_desc_function[]){ \
28 PXA_FUNCTION(0, 0, "gpio_in"), \
29 PXA_FUNCTION(1, 0, "gpio_out"), \
30 funcs, { } }, \
33 #define PXA_GPIO_ONLY_PIN(_pin) \
34 { \
35 .pin = _pin, \
36 .functions = (struct pxa_desc_function[]){ \
37 PXA_FUNCTION(0, 0, "gpio_in"), \
38 PXA_FUNCTION(1, 0, "gpio_out"), \
39 { } }, \
42 #define PXA_PINCTRL_PIN(pin) \
43 PINCTRL_PIN(pin, "P" #pin)
45 struct pxa_desc_function {
46 const char *name;
47 u8 muxval;
50 struct pxa_desc_pin {
51 struct pinctrl_pin_desc pin;
52 struct pxa_desc_function *functions;
55 struct pxa_pinctrl_group {
56 const char *name;
57 unsigned pin;
60 struct pxa_pinctrl_function {
61 const char *name;
62 const char **groups;
63 unsigned ngroups;
66 struct pxa_pinctrl {
67 spinlock_t lock;
68 void __iomem **base_gafr;
69 void __iomem **base_gpdr;
70 void __iomem **base_pgsr;
71 struct device *dev;
72 struct pinctrl_desc desc;
73 struct pinctrl_dev *pctl_dev;
74 unsigned npins;
75 const struct pxa_desc_pin *ppins;
76 unsigned ngroups;
77 struct pxa_pinctrl_group *groups;
78 unsigned nfuncs;
79 struct pxa_pinctrl_function *functions;
80 char *name;
83 int pxa2xx_pinctrl_init(struct platform_device *pdev,
84 const struct pxa_desc_pin *ppins, int npins,
85 void __iomem *base_gafr[], void __iomem *base_gpdr[],
86 void __iomem *base_gpsr[]);
88 #endif /* __PINCTRL_PXA_H */