1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
6 #include <linux/module.h>
8 #include <linux/platform_device.h>
9 #include <linux/pinctrl/pinctrl.h>
11 #include "pinctrl-msm.h"
13 #define FUNCTION(fname) \
14 [msm_mux_##fname] = { \
16 .groups = fname##_groups, \
17 .ngroups = ARRAY_SIZE(fname##_groups), \
20 #define REG_SIZE 0x1000
21 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
24 .pins = gpio##id##_pins, \
25 .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
27 msm_mux_gpio, /* gpio mode */ \
39 .ctl_reg = REG_SIZE * id, \
40 .io_reg = 0x4 + REG_SIZE * id, \
41 .intr_cfg_reg = 0x8 + REG_SIZE * id, \
42 .intr_status_reg = 0xc + REG_SIZE * id, \
43 .intr_target_reg = 0x8 + REG_SIZE * id, \
50 .intr_enable_bit = 0, \
51 .intr_status_bit = 0, \
52 .intr_target_bit = 5, \
53 .intr_target_kpss_val = 3, \
54 .intr_raw_status_bit = 4, \
55 .intr_polarity_bit = 1, \
56 .intr_detection_bit = 2, \
57 .intr_detection_width = 2, \
60 static const struct pinctrl_pin_desc ipq8074_pins
[] = {
61 PINCTRL_PIN(0, "GPIO_0"),
62 PINCTRL_PIN(1, "GPIO_1"),
63 PINCTRL_PIN(2, "GPIO_2"),
64 PINCTRL_PIN(3, "GPIO_3"),
65 PINCTRL_PIN(4, "GPIO_4"),
66 PINCTRL_PIN(5, "GPIO_5"),
67 PINCTRL_PIN(6, "GPIO_6"),
68 PINCTRL_PIN(7, "GPIO_7"),
69 PINCTRL_PIN(8, "GPIO_8"),
70 PINCTRL_PIN(9, "GPIO_9"),
71 PINCTRL_PIN(10, "GPIO_10"),
72 PINCTRL_PIN(11, "GPIO_11"),
73 PINCTRL_PIN(12, "GPIO_12"),
74 PINCTRL_PIN(13, "GPIO_13"),
75 PINCTRL_PIN(14, "GPIO_14"),
76 PINCTRL_PIN(15, "GPIO_15"),
77 PINCTRL_PIN(16, "GPIO_16"),
78 PINCTRL_PIN(17, "GPIO_17"),
79 PINCTRL_PIN(18, "GPIO_18"),
80 PINCTRL_PIN(19, "GPIO_19"),
81 PINCTRL_PIN(20, "GPIO_20"),
82 PINCTRL_PIN(21, "GPIO_21"),
83 PINCTRL_PIN(22, "GPIO_22"),
84 PINCTRL_PIN(23, "GPIO_23"),
85 PINCTRL_PIN(24, "GPIO_24"),
86 PINCTRL_PIN(25, "GPIO_25"),
87 PINCTRL_PIN(26, "GPIO_26"),
88 PINCTRL_PIN(27, "GPIO_27"),
89 PINCTRL_PIN(28, "GPIO_28"),
90 PINCTRL_PIN(29, "GPIO_29"),
91 PINCTRL_PIN(30, "GPIO_30"),
92 PINCTRL_PIN(31, "GPIO_31"),
93 PINCTRL_PIN(32, "GPIO_32"),
94 PINCTRL_PIN(33, "GPIO_33"),
95 PINCTRL_PIN(34, "GPIO_34"),
96 PINCTRL_PIN(35, "GPIO_35"),
97 PINCTRL_PIN(36, "GPIO_36"),
98 PINCTRL_PIN(37, "GPIO_37"),
99 PINCTRL_PIN(38, "GPIO_38"),
100 PINCTRL_PIN(39, "GPIO_39"),
101 PINCTRL_PIN(40, "GPIO_40"),
102 PINCTRL_PIN(41, "GPIO_41"),
103 PINCTRL_PIN(42, "GPIO_42"),
104 PINCTRL_PIN(43, "GPIO_43"),
105 PINCTRL_PIN(44, "GPIO_44"),
106 PINCTRL_PIN(45, "GPIO_45"),
107 PINCTRL_PIN(46, "GPIO_46"),
108 PINCTRL_PIN(47, "GPIO_47"),
109 PINCTRL_PIN(48, "GPIO_48"),
110 PINCTRL_PIN(49, "GPIO_49"),
111 PINCTRL_PIN(50, "GPIO_50"),
112 PINCTRL_PIN(51, "GPIO_51"),
113 PINCTRL_PIN(52, "GPIO_52"),
114 PINCTRL_PIN(53, "GPIO_53"),
115 PINCTRL_PIN(54, "GPIO_54"),
116 PINCTRL_PIN(55, "GPIO_55"),
117 PINCTRL_PIN(56, "GPIO_56"),
118 PINCTRL_PIN(57, "GPIO_57"),
119 PINCTRL_PIN(58, "GPIO_58"),
120 PINCTRL_PIN(59, "GPIO_59"),
121 PINCTRL_PIN(60, "GPIO_60"),
122 PINCTRL_PIN(61, "GPIO_61"),
123 PINCTRL_PIN(62, "GPIO_62"),
124 PINCTRL_PIN(63, "GPIO_63"),
125 PINCTRL_PIN(64, "GPIO_64"),
126 PINCTRL_PIN(65, "GPIO_65"),
127 PINCTRL_PIN(66, "GPIO_66"),
128 PINCTRL_PIN(67, "GPIO_67"),
129 PINCTRL_PIN(68, "GPIO_68"),
130 PINCTRL_PIN(69, "GPIO_69"),
133 #define DECLARE_MSM_GPIO_PINS(pin) \
134 static const unsigned int gpio##pin##_pins[] = { pin }
135 DECLARE_MSM_GPIO_PINS(0);
136 DECLARE_MSM_GPIO_PINS(1);
137 DECLARE_MSM_GPIO_PINS(2);
138 DECLARE_MSM_GPIO_PINS(3);
139 DECLARE_MSM_GPIO_PINS(4);
140 DECLARE_MSM_GPIO_PINS(5);
141 DECLARE_MSM_GPIO_PINS(6);
142 DECLARE_MSM_GPIO_PINS(7);
143 DECLARE_MSM_GPIO_PINS(8);
144 DECLARE_MSM_GPIO_PINS(9);
145 DECLARE_MSM_GPIO_PINS(10);
146 DECLARE_MSM_GPIO_PINS(11);
147 DECLARE_MSM_GPIO_PINS(12);
148 DECLARE_MSM_GPIO_PINS(13);
149 DECLARE_MSM_GPIO_PINS(14);
150 DECLARE_MSM_GPIO_PINS(15);
151 DECLARE_MSM_GPIO_PINS(16);
152 DECLARE_MSM_GPIO_PINS(17);
153 DECLARE_MSM_GPIO_PINS(18);
154 DECLARE_MSM_GPIO_PINS(19);
155 DECLARE_MSM_GPIO_PINS(20);
156 DECLARE_MSM_GPIO_PINS(21);
157 DECLARE_MSM_GPIO_PINS(22);
158 DECLARE_MSM_GPIO_PINS(23);
159 DECLARE_MSM_GPIO_PINS(24);
160 DECLARE_MSM_GPIO_PINS(25);
161 DECLARE_MSM_GPIO_PINS(26);
162 DECLARE_MSM_GPIO_PINS(27);
163 DECLARE_MSM_GPIO_PINS(28);
164 DECLARE_MSM_GPIO_PINS(29);
165 DECLARE_MSM_GPIO_PINS(30);
166 DECLARE_MSM_GPIO_PINS(31);
167 DECLARE_MSM_GPIO_PINS(32);
168 DECLARE_MSM_GPIO_PINS(33);
169 DECLARE_MSM_GPIO_PINS(34);
170 DECLARE_MSM_GPIO_PINS(35);
171 DECLARE_MSM_GPIO_PINS(36);
172 DECLARE_MSM_GPIO_PINS(37);
173 DECLARE_MSM_GPIO_PINS(38);
174 DECLARE_MSM_GPIO_PINS(39);
175 DECLARE_MSM_GPIO_PINS(40);
176 DECLARE_MSM_GPIO_PINS(41);
177 DECLARE_MSM_GPIO_PINS(42);
178 DECLARE_MSM_GPIO_PINS(43);
179 DECLARE_MSM_GPIO_PINS(44);
180 DECLARE_MSM_GPIO_PINS(45);
181 DECLARE_MSM_GPIO_PINS(46);
182 DECLARE_MSM_GPIO_PINS(47);
183 DECLARE_MSM_GPIO_PINS(48);
184 DECLARE_MSM_GPIO_PINS(49);
185 DECLARE_MSM_GPIO_PINS(50);
186 DECLARE_MSM_GPIO_PINS(51);
187 DECLARE_MSM_GPIO_PINS(52);
188 DECLARE_MSM_GPIO_PINS(53);
189 DECLARE_MSM_GPIO_PINS(54);
190 DECLARE_MSM_GPIO_PINS(55);
191 DECLARE_MSM_GPIO_PINS(56);
192 DECLARE_MSM_GPIO_PINS(57);
193 DECLARE_MSM_GPIO_PINS(58);
194 DECLARE_MSM_GPIO_PINS(59);
195 DECLARE_MSM_GPIO_PINS(60);
196 DECLARE_MSM_GPIO_PINS(61);
197 DECLARE_MSM_GPIO_PINS(62);
198 DECLARE_MSM_GPIO_PINS(63);
199 DECLARE_MSM_GPIO_PINS(64);
200 DECLARE_MSM_GPIO_PINS(65);
201 DECLARE_MSM_GPIO_PINS(66);
202 DECLARE_MSM_GPIO_PINS(67);
203 DECLARE_MSM_GPIO_PINS(68);
204 DECLARE_MSM_GPIO_PINS(69);
206 enum ipq8074_functions
{
212 msm_mux_audio_rxbclk
,
214 msm_mux_audio_rxfsync
,
215 msm_mux_audio_rxmclk
,
216 msm_mux_audio_txbclk
,
218 msm_mux_audio_txfsync
,
219 msm_mux_audio_txmclk
,
294 msm_mux_qdss_cti_trig_in_a0
,
295 msm_mux_qdss_cti_trig_in_a1
,
296 msm_mux_qdss_cti_trig_in_b0
,
297 msm_mux_qdss_cti_trig_in_b1
,
298 msm_mux_qdss_cti_trig_out_a0
,
299 msm_mux_qdss_cti_trig_out_a1
,
300 msm_mux_qdss_cti_trig_out_b0
,
301 msm_mux_qdss_cti_trig_out_b1
,
302 msm_mux_qdss_traceclk_a
,
303 msm_mux_qdss_traceclk_b
,
304 msm_mux_qdss_tracectl_a
,
305 msm_mux_qdss_tracectl_b
,
306 msm_mux_qdss_tracedata_a
,
307 msm_mux_qdss_tracedata_b
,
322 static const char * const qpic_groups
[] = {
323 "gpio0", /* LCD_TE */
324 "gpio1", /* BUSY_N */
325 "gpio2", /* LCD_RS_N */
328 "gpio5", /* DATA[0] */
329 "gpio6", /* DATA[1] */
330 "gpio7", /* DATA[2] */
331 "gpio8", /* DATA[3] */
332 "gpio9", /* CS_CSR_LCD */
334 "gpio11", /* NAND_CS_N */
335 "gpio12", /* DATA[4] */
336 "gpio13", /* DATA[5] */
337 "gpio14", /* DATA[6] */
338 "gpio15", /* DATA[7] */
339 "gpio16", /* DATA[8] */
343 static const char * const blsp5_i2c_groups
[] = {
347 static const char * const blsp5_spi_groups
[] = {
348 "gpio0", "gpio2", "gpio9", "gpio16",
351 static const char * const wci2a_groups
[] = {
355 static const char * const blsp3_spi3_groups
[] = {
356 "gpio0", "gpio2", "gpio9",
359 static const char * const burn0_groups
[] = {
363 static const char * const pcm_zsi0_groups
[] = {
367 static const char * const blsp5_uart_groups
[] = {
368 "gpio0", "gpio2", "gpio9", "gpio16",
371 static const char * const mac1_sa2_groups
[] = {
375 static const char * const blsp3_spi0_groups
[] = {
376 "gpio1", "gpio3", "gpio4",
379 static const char * const burn1_groups
[] = {
383 static const char * const mac0_sa1_groups
[] = {
387 static const char * const qdss_cti_trig_out_b0_groups
[] = {
391 static const char * const qdss_cti_trig_in_b0_groups
[] = {
395 static const char * const blsp4_uart0_groups
[] = {
396 "gpio5", "gpio6", "gpio7", "gpio8",
399 static const char * const blsp4_i2c0_groups
[] = {
403 static const char * const blsp4_spi0_groups
[] = {
404 "gpio5", "gpio6", "gpio7", "gpio8",
407 static const char * const mac2_sa1_groups
[] = {
411 static const char * const qdss_cti_trig_out_b1_groups
[] = {
415 static const char * const qdss_cti_trig_in_b1_groups
[] = {
419 static const char * const cxc0_groups
[] = {
423 static const char * const mac1_sa3_groups
[] = {
427 static const char * const qdss_cti_trig_in_a1_groups
[] = {
431 static const char * const qdss_cti_trig_out_a1_groups
[] = {
435 static const char * const wci2c_groups
[] = {
439 static const char * const qdss_cti_trig_in_a0_groups
[] = {
443 static const char * const qdss_cti_trig_out_a0_groups
[] = {
447 static const char * const qdss_traceclk_b_groups
[] = {
451 static const char * const qdss_tracectl_b_groups
[] = {
455 static const char * const pcm_zsi1_groups
[] = {
459 static const char * const qdss_tracedata_b_groups
[] = {
460 "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", "gpio22",
461 "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29",
465 static const char * const led0_groups
[] = {
469 static const char * const pwm0_groups
[] = {
470 "gpio18", "gpio21", "gpio25", "gpio29", "gpio63",
473 static const char * const led1_groups
[] = {
477 static const char * const pwm1_groups
[] = {
478 "gpio19", "gpio22", "gpio26", "gpio30", "gpio64",
481 static const char * const led2_groups
[] = {
485 static const char * const pwm2_groups
[] = {
486 "gpio20", "gpio23", "gpio27", "gpio31", "gpio66",
489 static const char * const blsp4_uart1_groups
[] = {
490 "gpio21", "gpio22", "gpio23", "gpio24",
493 static const char * const blsp4_i2c1_groups
[] = {
497 static const char * const blsp4_spi1_groups
[] = {
498 "gpio21", "gpio22", "gpio23", "gpio24",
501 static const char * const wci2d_groups
[] = {
505 static const char * const mac1_sa1_groups
[] = {
509 static const char * const blsp3_spi2_groups
[] = {
510 "gpio21", "gpio22", "gpio23",
513 static const char * const pwm3_groups
[] = {
514 "gpio24", "gpio28", "gpio32", "gpio67",
517 static const char * const audio_txmclk_groups
[] = {
521 static const char * const audio_txbclk_groups
[] = {
525 static const char * const audio_txfsync_groups
[] = {
529 static const char * const audio_txd_groups
[] = {
533 static const char * const audio_rxmclk_groups
[] = {
537 static const char * const atest_char0_groups
[] = {
541 static const char * const audio_rxbclk_groups
[] = {
545 static const char * const atest_char1_groups
[] = {
549 static const char * const audio_rxfsync_groups
[] = {
553 static const char * const atest_char2_groups
[] = {
557 static const char * const audio_rxd_groups
[] = {
561 static const char * const atest_char3_groups
[] = {
565 static const char * const pcm_drx_groups
[] = {
569 static const char * const mac1_sa0_groups
[] = {
573 static const char * const mac0_sa0_groups
[] = {
577 static const char * const pcm_dtx_groups
[] = {
581 static const char * const pcm_fsync_groups
[] = {
585 static const char * const mac2_sa0_groups
[] = {
589 static const char * const qdss_traceclk_a_groups
[] = {
593 static const char * const pcm_pclk_groups
[] = {
597 static const char * const qdss_tracectl_a_groups
[] = {
601 static const char * const atest_char_groups
[] = {
605 static const char * const qdss_tracedata_a_groups
[] = {
606 "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43",
607 "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", "gpio50",
611 static const char * const blsp0_uart_groups
[] = {
612 "gpio38", "gpio39", "gpio40", "gpio41",
615 static const char * const blsp0_i2c_groups
[] = {
619 static const char * const blsp0_spi_groups
[] = {
620 "gpio38", "gpio39", "gpio40", "gpio41",
623 static const char * const blsp1_uart_groups
[] = {
624 "gpio42", "gpio43", "gpio44", "gpio45",
627 static const char * const blsp1_i2c_groups
[] = {
631 static const char * const blsp1_spi_groups
[] = {
632 "gpio42", "gpio43", "gpio44", "gpio45",
635 static const char * const blsp2_uart_groups
[] = {
636 "gpio46", "gpio47", "gpio48", "gpio49",
639 static const char * const blsp2_i2c_groups
[] = {
643 static const char * const blsp2_spi_groups
[] = {
644 "gpio46", "gpio47", "gpio48", "gpio49",
647 static const char * const blsp3_uart_groups
[] = {
648 "gpio50", "gpio51", "gpio52", "gpio53",
651 static const char * const blsp3_i2c_groups
[] = {
655 static const char * const blsp3_spi_groups
[] = {
656 "gpio50", "gpio51", "gpio52", "gpio53",
659 static const char * const pta2_0_groups
[] = {
663 static const char * const wci2b_groups
[] = {
667 static const char * const cxc1_groups
[] = {
671 static const char * const blsp3_spi1_groups
[] = {
672 "gpio54", "gpio55", "gpio56",
675 static const char * const pta2_1_groups
[] = {
679 static const char * const pta2_2_groups
[] = {
683 static const char * const pcie0_clk_groups
[] = {
687 static const char * const dbg_out_groups
[] = {
691 static const char * const cri_trng0_groups
[] = {
695 static const char * const pcie0_rst_groups
[] = {
699 static const char * const cri_trng1_groups
[] = {
703 static const char * const pcie0_wake_groups
[] = {
707 static const char * const cri_trng_groups
[] = {
711 static const char * const pcie1_clk_groups
[] = {
715 static const char * const rx2_groups
[] = {
719 static const char * const ldo_update_groups
[] = {
723 static const char * const pcie1_rst_groups
[] = {
727 static const char * const ldo_en_groups
[] = {
731 static const char * const pcie1_wake_groups
[] = {
735 static const char * const gcc_plltest_groups
[] = {
739 static const char * const sd_card_groups
[] = {
743 static const char * const pta1_1_groups
[] = {
747 static const char * const rx1_groups
[] = {
751 static const char * const pta1_2_groups
[] = {
755 static const char * const gcc_tlmm_groups
[] = {
759 static const char * const pta1_0_groups
[] = {
763 static const char * const prng_rosc_groups
[] = {
767 static const char * const sd_write_groups
[] = {
771 static const char * const rx0_groups
[] = {
775 static const char * const tsens_max_groups
[] = {
779 static const char * const mdc_groups
[] = {
783 static const char * const mdio_groups
[] = {
787 static const char * const gpio_groups
[] = {
788 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
789 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
790 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
791 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
792 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
793 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
794 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
795 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
796 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
797 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69",
800 static const struct msm_function ipq8074_functions
[] = {
801 FUNCTION(atest_char
),
802 FUNCTION(atest_char0
),
803 FUNCTION(atest_char1
),
804 FUNCTION(atest_char2
),
805 FUNCTION(atest_char3
),
806 FUNCTION(audio_rxbclk
),
808 FUNCTION(audio_rxfsync
),
809 FUNCTION(audio_rxmclk
),
810 FUNCTION(audio_txbclk
),
812 FUNCTION(audio_txfsync
),
813 FUNCTION(audio_txmclk
),
816 FUNCTION(blsp0_uart
),
819 FUNCTION(blsp1_uart
),
822 FUNCTION(blsp2_uart
),
825 FUNCTION(blsp3_spi0
),
826 FUNCTION(blsp3_spi1
),
827 FUNCTION(blsp3_spi2
),
828 FUNCTION(blsp3_spi3
),
829 FUNCTION(blsp3_uart
),
830 FUNCTION(blsp4_i2c0
),
831 FUNCTION(blsp4_i2c1
),
832 FUNCTION(blsp4_spi0
),
833 FUNCTION(blsp4_spi1
),
834 FUNCTION(blsp4_uart0
),
835 FUNCTION(blsp4_uart1
),
838 FUNCTION(blsp5_uart
),
847 FUNCTION(gcc_plltest
),
851 FUNCTION(ldo_update
),
867 FUNCTION(pcie0_wake
),
870 FUNCTION(pcie1_wake
),
888 FUNCTION(qdss_cti_trig_in_a0
),
889 FUNCTION(qdss_cti_trig_in_a1
),
890 FUNCTION(qdss_cti_trig_in_b0
),
891 FUNCTION(qdss_cti_trig_in_b1
),
892 FUNCTION(qdss_cti_trig_out_a0
),
893 FUNCTION(qdss_cti_trig_out_a1
),
894 FUNCTION(qdss_cti_trig_out_b0
),
895 FUNCTION(qdss_cti_trig_out_b1
),
896 FUNCTION(qdss_traceclk_a
),
897 FUNCTION(qdss_traceclk_b
),
898 FUNCTION(qdss_tracectl_a
),
899 FUNCTION(qdss_tracectl_b
),
900 FUNCTION(qdss_tracedata_a
),
901 FUNCTION(qdss_tracedata_b
),
915 static const struct msm_pingroup ipq8074_groups
[] = {
916 PINGROUP(0, qpic
, blsp5_uart
, blsp5_i2c
, blsp5_spi
, wci2a
,
917 blsp3_spi3
, NA
, burn0
, NA
),
918 PINGROUP(1, qpic
, pcm_zsi0
, mac1_sa2
, blsp3_spi0
, NA
, burn1
, NA
, NA
,
920 PINGROUP(2, qpic
, blsp5_uart
, blsp5_i2c
, blsp5_spi
, wci2a
,
921 blsp3_spi3
, NA
, NA
, NA
),
922 PINGROUP(3, qpic
, mac0_sa1
, blsp3_spi0
, qdss_cti_trig_out_b0
, NA
, NA
,
924 PINGROUP(4, qpic
, mac0_sa1
, blsp3_spi0
, qdss_cti_trig_in_b0
, NA
, NA
,
926 PINGROUP(5, qpic
, blsp4_uart0
, blsp4_i2c0
, blsp4_spi0
, mac2_sa1
,
927 qdss_cti_trig_out_b1
, NA
, NA
, NA
),
928 PINGROUP(6, qpic
, blsp4_uart0
, blsp4_i2c0
, blsp4_spi0
, mac2_sa1
,
929 qdss_cti_trig_in_b1
, NA
, NA
, NA
),
930 PINGROUP(7, qpic
, blsp4_uart0
, blsp4_spi0
, NA
, NA
, NA
, NA
, NA
, NA
),
931 PINGROUP(8, qpic
, blsp4_uart0
, blsp4_spi0
, NA
, NA
, NA
, NA
, NA
, NA
),
932 PINGROUP(9, qpic
, blsp5_uart
, blsp5_spi
, cxc0
, mac1_sa3
, blsp3_spi3
,
933 qdss_cti_trig_in_a1
, NA
, NA
),
934 PINGROUP(10, qpic
, qdss_cti_trig_out_a1
, NA
, NA
, NA
, NA
, NA
, NA
,
936 PINGROUP(11, qpic
, wci2c
, mac1_sa2
, qdss_cti_trig_in_a0
, NA
, NA
, NA
,
938 PINGROUP(12, qpic
, qdss_cti_trig_out_a0
, NA
, NA
, NA
, NA
, NA
, NA
,
940 PINGROUP(13, qpic
, NA
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
941 PINGROUP(14, qpic
, qdss_traceclk_b
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
942 PINGROUP(15, qpic
, qdss_tracectl_b
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
943 PINGROUP(16, qpic
, blsp5_uart
, pcm_zsi1
, blsp5_spi
, cxc0
, mac1_sa3
,
944 qdss_tracedata_b
, NA
, NA
),
945 PINGROUP(17, qpic
, wci2c
, qdss_tracedata_b
, NA
, NA
, NA
, NA
, NA
, NA
),
946 PINGROUP(18, led0
, pwm0
, qdss_tracedata_b
, NA
, NA
, NA
, NA
, NA
, NA
),
947 PINGROUP(19, led1
, pwm1
, NA
, qdss_tracedata_b
, NA
, NA
, NA
, NA
, NA
),
948 PINGROUP(20, led2
, pwm2
, NA
, qdss_tracedata_b
, NA
, NA
, NA
, NA
, NA
),
949 PINGROUP(21, pwm0
, blsp4_uart1
, blsp4_i2c1
, blsp4_spi1
, wci2d
, mac1_sa1
,
950 blsp3_spi2
, NA
, qdss_tracedata_b
),
951 PINGROUP(22, pwm1
, blsp4_uart1
, blsp4_i2c1
, blsp4_spi1
, wci2d
, mac1_sa1
,
952 blsp3_spi2
, NA
, qdss_tracedata_b
),
953 PINGROUP(23, pwm2
, blsp4_uart1
, blsp4_spi1
, blsp3_spi2
, NA
,
954 qdss_tracedata_b
, NA
, NA
, NA
),
955 PINGROUP(24, pwm3
, blsp4_uart1
, blsp4_spi1
, NA
, qdss_tracedata_b
, NA
,
957 PINGROUP(25, audio_txmclk
, pwm0
, NA
, qdss_tracedata_b
, NA
, NA
, NA
, NA
,
959 PINGROUP(26, audio_txbclk
, pwm1
, NA
, qdss_tracedata_b
, NA
, NA
, NA
, NA
,
961 PINGROUP(27, audio_txfsync
, pwm2
, NA
, qdss_tracedata_b
, NA
, NA
, NA
,
963 PINGROUP(28, audio_txd
, pwm3
, NA
, qdss_tracedata_b
, NA
, NA
, NA
, NA
,
965 PINGROUP(29, audio_rxmclk
, pwm0
, atest_char0
, NA
, qdss_tracedata_b
,
967 PINGROUP(30, audio_rxbclk
, pwm1
, atest_char1
, NA
, qdss_tracedata_b
,
969 PINGROUP(31, audio_rxfsync
, pwm2
, atest_char2
, NA
, qdss_tracedata_b
,
971 PINGROUP(32, audio_rxd
, pwm3
, atest_char3
, NA
, NA
, NA
, NA
, NA
, NA
),
972 PINGROUP(33, pcm_drx
, mac1_sa0
, mac0_sa0
, NA
, NA
, NA
, NA
, NA
, NA
),
973 PINGROUP(34, pcm_dtx
, mac1_sa0
, mac0_sa0
, NA
, NA
, NA
, NA
, NA
, NA
),
974 PINGROUP(35, pcm_fsync
, mac2_sa0
, qdss_traceclk_a
, NA
, NA
, NA
, NA
, NA
, NA
),
975 PINGROUP(36, pcm_pclk
, mac2_sa0
, NA
, qdss_tracectl_a
, NA
, NA
, NA
, NA
, NA
),
976 PINGROUP(37, atest_char
, NA
, qdss_tracedata_a
, NA
, NA
, NA
, NA
, NA
, NA
),
977 PINGROUP(38, blsp0_uart
, blsp0_i2c
, blsp0_spi
, NA
, qdss_tracedata_a
,
979 PINGROUP(39, blsp0_uart
, blsp0_i2c
, blsp0_spi
, NA
, qdss_tracedata_a
,
981 PINGROUP(40, blsp0_uart
, blsp0_spi
, NA
, qdss_tracedata_a
, NA
, NA
, NA
,
983 PINGROUP(41, blsp0_uart
, blsp0_spi
, NA
, qdss_tracedata_a
, NA
, NA
, NA
,
985 PINGROUP(42, blsp1_uart
, blsp1_i2c
, blsp1_spi
, NA
, qdss_tracedata_a
,
987 PINGROUP(43, blsp1_uart
, blsp1_i2c
, blsp1_spi
, NA
, qdss_tracedata_a
,
989 PINGROUP(44, blsp1_uart
, blsp1_spi
, NA
, qdss_tracedata_a
, NA
, NA
, NA
,
991 PINGROUP(45, blsp1_uart
, blsp1_spi
, qdss_tracedata_a
, NA
, NA
, NA
, NA
,
993 PINGROUP(46, blsp2_uart
, blsp2_i2c
, blsp2_spi
, qdss_tracedata_a
, NA
,
995 PINGROUP(47, blsp2_uart
, blsp2_i2c
, blsp2_spi
, NA
, qdss_tracedata_a
,
997 PINGROUP(48, blsp2_uart
, blsp2_spi
, NA
, qdss_tracedata_a
, NA
, NA
, NA
,
999 PINGROUP(49, blsp2_uart
, blsp2_spi
, NA
, qdss_tracedata_a
, NA
, NA
, NA
,
1001 PINGROUP(50, blsp3_uart
, blsp3_i2c
, blsp3_spi
, NA
, qdss_tracedata_a
,
1003 PINGROUP(51, blsp3_uart
, blsp3_i2c
, blsp3_spi
, NA
, qdss_tracedata_a
,
1005 PINGROUP(52, blsp3_uart
, blsp3_spi
, NA
, qdss_tracedata_a
, NA
, NA
, NA
,
1007 PINGROUP(53, blsp3_uart
, blsp3_spi
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
1008 PINGROUP(54, pta2_0
, wci2b
, cxc1
, blsp3_spi1
, NA
, NA
, NA
, NA
, NA
),
1009 PINGROUP(55, pta2_1
, blsp3_spi1
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
1010 PINGROUP(56, pta2_2
, wci2b
, cxc1
, blsp3_spi1
, NA
, NA
, NA
, NA
, NA
),
1011 PINGROUP(57, pcie0_clk
, NA
, dbg_out
, cri_trng0
, NA
, NA
, NA
, NA
, NA
),
1012 PINGROUP(58, pcie0_rst
, NA
, cri_trng1
, NA
, NA
, NA
, NA
, NA
, NA
),
1013 PINGROUP(59, pcie0_wake
, NA
, cri_trng
, NA
, NA
, NA
, NA
, NA
, NA
),
1014 PINGROUP(60, pcie1_clk
, rx2
, ldo_update
, NA
, NA
, NA
, NA
, NA
, NA
),
1015 PINGROUP(61, pcie1_rst
, ldo_en
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
1016 PINGROUP(62, pcie1_wake
, gcc_plltest
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
1017 PINGROUP(63, sd_card
, pwm0
, NA
, gcc_plltest
, NA
, NA
, NA
, NA
, NA
),
1018 PINGROUP(64, pta1_1
, pwm1
, NA
, rx1
, NA
, NA
, NA
, NA
, NA
),
1019 PINGROUP(65, pta1_2
, NA
, gcc_tlmm
, NA
, NA
, NA
, NA
, NA
, NA
),
1020 PINGROUP(66, pta1_0
, pwm2
, prng_rosc
, NA
, NA
, NA
, NA
, NA
, NA
),
1021 PINGROUP(67, sd_write
, pwm3
, rx0
, tsens_max
, NA
, NA
, NA
, NA
, NA
),
1022 PINGROUP(68, mdc
, NA
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
1023 PINGROUP(69, mdio
, NA
, NA
, NA
, NA
, NA
, NA
, NA
, NA
),
1026 static const struct msm_pinctrl_soc_data ipq8074_pinctrl
= {
1027 .pins
= ipq8074_pins
,
1028 .npins
= ARRAY_SIZE(ipq8074_pins
),
1029 .functions
= ipq8074_functions
,
1030 .nfunctions
= ARRAY_SIZE(ipq8074_functions
),
1031 .groups
= ipq8074_groups
,
1032 .ngroups
= ARRAY_SIZE(ipq8074_groups
),
1036 static int ipq8074_pinctrl_probe(struct platform_device
*pdev
)
1038 return msm_pinctrl_probe(pdev
, &ipq8074_pinctrl
);
1041 static const struct of_device_id ipq8074_pinctrl_of_match
[] = {
1042 { .compatible
= "qcom,ipq8074-pinctrl", },
1046 static struct platform_driver ipq8074_pinctrl_driver
= {
1048 .name
= "ipq8074-pinctrl",
1049 .of_match_table
= ipq8074_pinctrl_of_match
,
1051 .probe
= ipq8074_pinctrl_probe
,
1052 .remove
= msm_pinctrl_remove
,
1055 static int __init
ipq8074_pinctrl_init(void)
1057 return platform_driver_register(&ipq8074_pinctrl_driver
);
1059 arch_initcall(ipq8074_pinctrl_init
);
1061 static void __exit
ipq8074_pinctrl_exit(void)
1063 platform_driver_unregister(&ipq8074_pinctrl_driver
);
1065 module_exit(ipq8074_pinctrl_exit
);
1067 MODULE_DESCRIPTION("Qualcomm ipq8074 pinctrl driver");
1068 MODULE_LICENSE("GPL v2");
1069 MODULE_DEVICE_TABLE(of
, ipq8074_pinctrl_of_match
);