WIP FPC-III support
[linux/fpc-iii.git] / drivers / pinctrl / samsung / pinctrl-samsung.c
blob608eb5a07248ed01b228e93e3319a9536d7615e9
1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
4 //
5 // Copyright (c) 2012 Samsung Electronics Co., Ltd.
6 // http://www.samsung.com
7 // Copyright (c) 2012 Linaro Ltd
8 // http://www.linaro.org
9 //
10 // Author: Thomas Abraham <thomas.ab@samsung.com>
12 // This driver implements the Samsung pinctrl driver. It supports setting up of
13 // pinmux and pinconf configurations. The gpiolib interface is also included.
14 // External interrupt (gpio and wakeup) support are not included in this driver
15 // but provides extensions to which platform specific implementation of the gpio
16 // and wakeup interrupts can be hooked to.
18 #include <linux/init.h>
19 #include <linux/platform_device.h>
20 #include <linux/io.h>
21 #include <linux/slab.h>
22 #include <linux/err.h>
23 #include <linux/gpio/driver.h>
24 #include <linux/irqdomain.h>
25 #include <linux/of_device.h>
26 #include <linux/spinlock.h>
28 #include <dt-bindings/pinctrl/samsung.h>
30 #include "../core.h"
31 #include "pinctrl-samsung.h"
33 /* maximum number of the memory resources */
34 #define SAMSUNG_PINCTRL_NUM_RESOURCES 2
36 /* list of all possible config options supported */
37 static struct pin_config {
38 const char *property;
39 enum pincfg_type param;
40 } cfg_params[] = {
41 { "samsung,pin-pud", PINCFG_TYPE_PUD },
42 { "samsung,pin-drv", PINCFG_TYPE_DRV },
43 { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN },
44 { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN },
45 { "samsung,pin-val", PINCFG_TYPE_DAT },
48 static unsigned int pin_base;
50 static int samsung_get_group_count(struct pinctrl_dev *pctldev)
52 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
54 return pmx->nr_groups;
57 static const char *samsung_get_group_name(struct pinctrl_dev *pctldev,
58 unsigned group)
60 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
62 return pmx->pin_groups[group].name;
65 static int samsung_get_group_pins(struct pinctrl_dev *pctldev,
66 unsigned group,
67 const unsigned **pins,
68 unsigned *num_pins)
70 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
72 *pins = pmx->pin_groups[group].pins;
73 *num_pins = pmx->pin_groups[group].num_pins;
75 return 0;
78 static int reserve_map(struct device *dev, struct pinctrl_map **map,
79 unsigned *reserved_maps, unsigned *num_maps,
80 unsigned reserve)
82 unsigned old_num = *reserved_maps;
83 unsigned new_num = *num_maps + reserve;
84 struct pinctrl_map *new_map;
86 if (old_num >= new_num)
87 return 0;
89 new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);
90 if (!new_map)
91 return -ENOMEM;
93 memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));
95 *map = new_map;
96 *reserved_maps = new_num;
98 return 0;
101 static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps,
102 unsigned *num_maps, const char *group,
103 const char *function)
105 if (WARN_ON(*num_maps == *reserved_maps))
106 return -ENOSPC;
108 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
109 (*map)[*num_maps].data.mux.group = group;
110 (*map)[*num_maps].data.mux.function = function;
111 (*num_maps)++;
113 return 0;
116 static int add_map_configs(struct device *dev, struct pinctrl_map **map,
117 unsigned *reserved_maps, unsigned *num_maps,
118 const char *group, unsigned long *configs,
119 unsigned num_configs)
121 unsigned long *dup_configs;
123 if (WARN_ON(*num_maps == *reserved_maps))
124 return -ENOSPC;
126 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
127 GFP_KERNEL);
128 if (!dup_configs)
129 return -ENOMEM;
131 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
132 (*map)[*num_maps].data.configs.group_or_pin = group;
133 (*map)[*num_maps].data.configs.configs = dup_configs;
134 (*map)[*num_maps].data.configs.num_configs = num_configs;
135 (*num_maps)++;
137 return 0;
140 static int add_config(struct device *dev, unsigned long **configs,
141 unsigned *num_configs, unsigned long config)
143 unsigned old_num = *num_configs;
144 unsigned new_num = old_num + 1;
145 unsigned long *new_configs;
147 new_configs = krealloc(*configs, sizeof(*new_configs) * new_num,
148 GFP_KERNEL);
149 if (!new_configs)
150 return -ENOMEM;
152 new_configs[old_num] = config;
154 *configs = new_configs;
155 *num_configs = new_num;
157 return 0;
160 static void samsung_dt_free_map(struct pinctrl_dev *pctldev,
161 struct pinctrl_map *map,
162 unsigned num_maps)
164 int i;
166 for (i = 0; i < num_maps; i++)
167 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
168 kfree(map[i].data.configs.configs);
170 kfree(map);
173 static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata,
174 struct device *dev,
175 struct device_node *np,
176 struct pinctrl_map **map,
177 unsigned *reserved_maps,
178 unsigned *num_maps)
180 int ret, i;
181 u32 val;
182 unsigned long config;
183 unsigned long *configs = NULL;
184 unsigned num_configs = 0;
185 unsigned reserve;
186 struct property *prop;
187 const char *group;
188 bool has_func = false;
190 ret = of_property_read_u32(np, "samsung,pin-function", &val);
191 if (!ret)
192 has_func = true;
194 for (i = 0; i < ARRAY_SIZE(cfg_params); i++) {
195 ret = of_property_read_u32(np, cfg_params[i].property, &val);
196 if (!ret) {
197 config = PINCFG_PACK(cfg_params[i].param, val);
198 ret = add_config(dev, &configs, &num_configs, config);
199 if (ret < 0)
200 goto exit;
201 /* EINVAL=missing, which is fine since it's optional */
202 } else if (ret != -EINVAL) {
203 dev_err(dev, "could not parse property %s\n",
204 cfg_params[i].property);
208 reserve = 0;
209 if (has_func)
210 reserve++;
211 if (num_configs)
212 reserve++;
213 ret = of_property_count_strings(np, "samsung,pins");
214 if (ret < 0) {
215 dev_err(dev, "could not parse property samsung,pins\n");
216 goto exit;
218 reserve *= ret;
220 ret = reserve_map(dev, map, reserved_maps, num_maps, reserve);
221 if (ret < 0)
222 goto exit;
224 of_property_for_each_string(np, "samsung,pins", prop, group) {
225 if (has_func) {
226 ret = add_map_mux(map, reserved_maps,
227 num_maps, group, np->full_name);
228 if (ret < 0)
229 goto exit;
232 if (num_configs) {
233 ret = add_map_configs(dev, map, reserved_maps,
234 num_maps, group, configs,
235 num_configs);
236 if (ret < 0)
237 goto exit;
241 ret = 0;
243 exit:
244 kfree(configs);
245 return ret;
248 static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev,
249 struct device_node *np_config,
250 struct pinctrl_map **map,
251 unsigned *num_maps)
253 struct samsung_pinctrl_drv_data *drvdata;
254 unsigned reserved_maps;
255 struct device_node *np;
256 int ret;
258 drvdata = pinctrl_dev_get_drvdata(pctldev);
260 reserved_maps = 0;
261 *map = NULL;
262 *num_maps = 0;
264 if (!of_get_child_count(np_config))
265 return samsung_dt_subnode_to_map(drvdata, pctldev->dev,
266 np_config, map,
267 &reserved_maps,
268 num_maps);
270 for_each_child_of_node(np_config, np) {
271 ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map,
272 &reserved_maps, num_maps);
273 if (ret < 0) {
274 samsung_dt_free_map(pctldev, *map, *num_maps);
275 of_node_put(np);
276 return ret;
280 return 0;
283 #ifdef CONFIG_DEBUG_FS
284 /* Forward declaration which can be used by samsung_pin_dbg_show */
285 static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
286 unsigned long *config);
287 static const char * const reg_names[] = {"CON", "DAT", "PUD", "DRV", "CON_PDN",
288 "PUD_PDN"};
290 static void samsung_pin_dbg_show(struct pinctrl_dev *pctldev,
291 struct seq_file *s, unsigned int pin)
293 enum pincfg_type cfg_type;
294 unsigned long config;
295 int ret;
297 for (cfg_type = 0; cfg_type < PINCFG_TYPE_NUM; cfg_type++) {
298 config = PINCFG_PACK(cfg_type, 0);
299 ret = samsung_pinconf_get(pctldev, pin, &config);
300 if (ret < 0)
301 continue;
303 seq_printf(s, " %s(0x%lx)", reg_names[cfg_type],
304 PINCFG_UNPACK_VALUE(config));
307 #endif
309 /* list of pinctrl callbacks for the pinctrl core */
310 static const struct pinctrl_ops samsung_pctrl_ops = {
311 .get_groups_count = samsung_get_group_count,
312 .get_group_name = samsung_get_group_name,
313 .get_group_pins = samsung_get_group_pins,
314 .dt_node_to_map = samsung_dt_node_to_map,
315 .dt_free_map = samsung_dt_free_map,
316 #ifdef CONFIG_DEBUG_FS
317 .pin_dbg_show = samsung_pin_dbg_show,
318 #endif
321 /* check if the selector is a valid pin function selector */
322 static int samsung_get_functions_count(struct pinctrl_dev *pctldev)
324 struct samsung_pinctrl_drv_data *drvdata;
326 drvdata = pinctrl_dev_get_drvdata(pctldev);
327 return drvdata->nr_functions;
330 /* return the name of the pin function specified */
331 static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev,
332 unsigned selector)
334 struct samsung_pinctrl_drv_data *drvdata;
336 drvdata = pinctrl_dev_get_drvdata(pctldev);
337 return drvdata->pmx_functions[selector].name;
340 /* return the groups associated for the specified function selector */
341 static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev,
342 unsigned selector, const char * const **groups,
343 unsigned * const num_groups)
345 struct samsung_pinctrl_drv_data *drvdata;
347 drvdata = pinctrl_dev_get_drvdata(pctldev);
348 *groups = drvdata->pmx_functions[selector].groups;
349 *num_groups = drvdata->pmx_functions[selector].num_groups;
350 return 0;
354 * given a pin number that is local to a pin controller, find out the pin bank
355 * and the register base of the pin bank.
357 static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata,
358 unsigned pin, void __iomem **reg, u32 *offset,
359 struct samsung_pin_bank **bank)
361 struct samsung_pin_bank *b;
363 b = drvdata->pin_banks;
365 while ((pin >= b->pin_base) &&
366 ((b->pin_base + b->nr_pins - 1) < pin))
367 b++;
369 *reg = b->pctl_base + b->pctl_offset;
370 *offset = pin - b->pin_base;
371 if (bank)
372 *bank = b;
375 /* enable or disable a pinmux function */
376 static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
377 unsigned group)
379 struct samsung_pinctrl_drv_data *drvdata;
380 const struct samsung_pin_bank_type *type;
381 struct samsung_pin_bank *bank;
382 void __iomem *reg;
383 u32 mask, shift, data, pin_offset;
384 unsigned long flags;
385 const struct samsung_pmx_func *func;
386 const struct samsung_pin_group *grp;
388 drvdata = pinctrl_dev_get_drvdata(pctldev);
389 func = &drvdata->pmx_functions[selector];
390 grp = &drvdata->pin_groups[group];
392 pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base,
393 &reg, &pin_offset, &bank);
394 type = bank->type;
395 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
396 shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
397 if (shift >= 32) {
398 /* Some banks have two config registers */
399 shift -= 32;
400 reg += 4;
403 spin_lock_irqsave(&bank->slock, flags);
405 data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]);
406 data &= ~(mask << shift);
407 data |= func->val << shift;
408 writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]);
410 spin_unlock_irqrestore(&bank->slock, flags);
413 /* enable a specified pinmux by writing to registers */
414 static int samsung_pinmux_set_mux(struct pinctrl_dev *pctldev,
415 unsigned selector,
416 unsigned group)
418 samsung_pinmux_setup(pctldev, selector, group);
419 return 0;
422 /* list of pinmux callbacks for the pinmux vertical in pinctrl core */
423 static const struct pinmux_ops samsung_pinmux_ops = {
424 .get_functions_count = samsung_get_functions_count,
425 .get_function_name = samsung_pinmux_get_fname,
426 .get_function_groups = samsung_pinmux_get_groups,
427 .set_mux = samsung_pinmux_set_mux,
430 /* set or get the pin config settings for a specified pin */
431 static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin,
432 unsigned long *config, bool set)
434 struct samsung_pinctrl_drv_data *drvdata;
435 const struct samsung_pin_bank_type *type;
436 struct samsung_pin_bank *bank;
437 void __iomem *reg_base;
438 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config);
439 u32 data, width, pin_offset, mask, shift;
440 u32 cfg_value, cfg_reg;
441 unsigned long flags;
443 drvdata = pinctrl_dev_get_drvdata(pctldev);
444 pin_to_reg_bank(drvdata, pin - drvdata->pin_base, &reg_base,
445 &pin_offset, &bank);
446 type = bank->type;
448 if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type])
449 return -EINVAL;
451 width = type->fld_width[cfg_type];
452 cfg_reg = type->reg_offset[cfg_type];
454 spin_lock_irqsave(&bank->slock, flags);
456 mask = (1 << width) - 1;
457 shift = pin_offset * width;
458 data = readl(reg_base + cfg_reg);
460 if (set) {
461 cfg_value = PINCFG_UNPACK_VALUE(*config);
462 data &= ~(mask << shift);
463 data |= (cfg_value << shift);
464 writel(data, reg_base + cfg_reg);
465 } else {
466 data >>= shift;
467 data &= mask;
468 *config = PINCFG_PACK(cfg_type, data);
471 spin_unlock_irqrestore(&bank->slock, flags);
473 return 0;
476 /* set the pin config settings for a specified pin */
477 static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
478 unsigned long *configs, unsigned num_configs)
480 int i, ret;
482 for (i = 0; i < num_configs; i++) {
483 ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true);
484 if (ret < 0)
485 return ret;
486 } /* for each config */
488 return 0;
491 /* get the pin config settings for a specified pin */
492 static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
493 unsigned long *config)
495 return samsung_pinconf_rw(pctldev, pin, config, false);
498 /* set the pin config settings for a specified pin group */
499 static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev,
500 unsigned group, unsigned long *configs,
501 unsigned num_configs)
503 struct samsung_pinctrl_drv_data *drvdata;
504 const unsigned int *pins;
505 unsigned int cnt;
507 drvdata = pinctrl_dev_get_drvdata(pctldev);
508 pins = drvdata->pin_groups[group].pins;
510 for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++)
511 samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs);
513 return 0;
516 /* get the pin config settings for a specified pin group */
517 static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev,
518 unsigned int group, unsigned long *config)
520 struct samsung_pinctrl_drv_data *drvdata;
521 const unsigned int *pins;
523 drvdata = pinctrl_dev_get_drvdata(pctldev);
524 pins = drvdata->pin_groups[group].pins;
525 samsung_pinconf_get(pctldev, pins[0], config);
526 return 0;
529 /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */
530 static const struct pinconf_ops samsung_pinconf_ops = {
531 .pin_config_get = samsung_pinconf_get,
532 .pin_config_set = samsung_pinconf_set,
533 .pin_config_group_get = samsung_pinconf_group_get,
534 .pin_config_group_set = samsung_pinconf_group_set,
538 * The samsung_gpio_set_vlaue() should be called with "bank->slock" held
539 * to avoid race condition.
541 static void samsung_gpio_set_value(struct gpio_chip *gc,
542 unsigned offset, int value)
544 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
545 const struct samsung_pin_bank_type *type = bank->type;
546 void __iomem *reg;
547 u32 data;
549 reg = bank->pctl_base + bank->pctl_offset;
551 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
552 data &= ~(1 << offset);
553 if (value)
554 data |= 1 << offset;
555 writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]);
558 /* gpiolib gpio_set callback function */
559 static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
561 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
562 unsigned long flags;
564 spin_lock_irqsave(&bank->slock, flags);
565 samsung_gpio_set_value(gc, offset, value);
566 spin_unlock_irqrestore(&bank->slock, flags);
569 /* gpiolib gpio_get callback function */
570 static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
572 void __iomem *reg;
573 u32 data;
574 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
575 const struct samsung_pin_bank_type *type = bank->type;
577 reg = bank->pctl_base + bank->pctl_offset;
579 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
580 data >>= offset;
581 data &= 1;
582 return data;
586 * The samsung_gpio_set_direction() should be called with "bank->slock" held
587 * to avoid race condition.
588 * The calls to gpio_direction_output() and gpio_direction_input()
589 * leads to this function call.
591 static int samsung_gpio_set_direction(struct gpio_chip *gc,
592 unsigned offset, bool input)
594 const struct samsung_pin_bank_type *type;
595 struct samsung_pin_bank *bank;
596 void __iomem *reg;
597 u32 data, mask, shift;
599 bank = gpiochip_get_data(gc);
600 type = bank->type;
602 reg = bank->pctl_base + bank->pctl_offset
603 + type->reg_offset[PINCFG_TYPE_FUNC];
605 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
606 shift = offset * type->fld_width[PINCFG_TYPE_FUNC];
607 if (shift >= 32) {
608 /* Some banks have two config registers */
609 shift -= 32;
610 reg += 4;
613 data = readl(reg);
614 data &= ~(mask << shift);
615 if (!input)
616 data |= EXYNOS_PIN_FUNC_OUTPUT << shift;
617 writel(data, reg);
619 return 0;
622 /* gpiolib gpio_direction_input callback function. */
623 static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
625 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
626 unsigned long flags;
627 int ret;
629 spin_lock_irqsave(&bank->slock, flags);
630 ret = samsung_gpio_set_direction(gc, offset, true);
631 spin_unlock_irqrestore(&bank->slock, flags);
632 return ret;
635 /* gpiolib gpio_direction_output callback function. */
636 static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
637 int value)
639 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
640 unsigned long flags;
641 int ret;
643 spin_lock_irqsave(&bank->slock, flags);
644 samsung_gpio_set_value(gc, offset, value);
645 ret = samsung_gpio_set_direction(gc, offset, false);
646 spin_unlock_irqrestore(&bank->slock, flags);
648 return ret;
652 * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin
653 * and a virtual IRQ, if not already present.
655 static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
657 struct samsung_pin_bank *bank = gpiochip_get_data(gc);
658 unsigned int virq;
660 if (!bank->irq_domain)
661 return -ENXIO;
663 virq = irq_create_mapping(bank->irq_domain, offset);
665 return (virq) ? : -ENXIO;
668 static struct samsung_pin_group *samsung_pinctrl_create_groups(
669 struct device *dev,
670 struct samsung_pinctrl_drv_data *drvdata,
671 unsigned int *cnt)
673 struct pinctrl_desc *ctrldesc = &drvdata->pctl;
674 struct samsung_pin_group *groups, *grp;
675 const struct pinctrl_pin_desc *pdesc;
676 int i;
678 groups = devm_kcalloc(dev, ctrldesc->npins, sizeof(*groups),
679 GFP_KERNEL);
680 if (!groups)
681 return ERR_PTR(-EINVAL);
682 grp = groups;
684 pdesc = ctrldesc->pins;
685 for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) {
686 grp->name = pdesc->name;
687 grp->pins = &pdesc->number;
688 grp->num_pins = 1;
691 *cnt = ctrldesc->npins;
692 return groups;
695 static int samsung_pinctrl_create_function(struct device *dev,
696 struct samsung_pinctrl_drv_data *drvdata,
697 struct device_node *func_np,
698 struct samsung_pmx_func *func)
700 int npins;
701 int ret;
702 int i;
704 if (of_property_read_u32(func_np, "samsung,pin-function", &func->val))
705 return 0;
707 npins = of_property_count_strings(func_np, "samsung,pins");
708 if (npins < 1) {
709 dev_err(dev, "invalid pin list in %pOFn node", func_np);
710 return -EINVAL;
713 func->name = func_np->full_name;
715 func->groups = devm_kcalloc(dev, npins, sizeof(char *), GFP_KERNEL);
716 if (!func->groups)
717 return -ENOMEM;
719 for (i = 0; i < npins; ++i) {
720 const char *gname;
722 ret = of_property_read_string_index(func_np, "samsung,pins",
723 i, &gname);
724 if (ret) {
725 dev_err(dev,
726 "failed to read pin name %d from %pOFn node\n",
727 i, func_np);
728 return ret;
731 func->groups[i] = gname;
734 func->num_groups = npins;
735 return 1;
738 static struct samsung_pmx_func *samsung_pinctrl_create_functions(
739 struct device *dev,
740 struct samsung_pinctrl_drv_data *drvdata,
741 unsigned int *cnt)
743 struct samsung_pmx_func *functions, *func;
744 struct device_node *dev_np = dev->of_node;
745 struct device_node *cfg_np;
746 unsigned int func_cnt = 0;
747 int ret;
750 * Iterate over all the child nodes of the pin controller node
751 * and create pin groups and pin function lists.
753 for_each_child_of_node(dev_np, cfg_np) {
754 struct device_node *func_np;
756 if (!of_get_child_count(cfg_np)) {
757 if (!of_find_property(cfg_np,
758 "samsung,pin-function", NULL))
759 continue;
760 ++func_cnt;
761 continue;
764 for_each_child_of_node(cfg_np, func_np) {
765 if (!of_find_property(func_np,
766 "samsung,pin-function", NULL))
767 continue;
768 ++func_cnt;
772 functions = devm_kcalloc(dev, func_cnt, sizeof(*functions),
773 GFP_KERNEL);
774 if (!functions)
775 return ERR_PTR(-ENOMEM);
776 func = functions;
779 * Iterate over all the child nodes of the pin controller node
780 * and create pin groups and pin function lists.
782 func_cnt = 0;
783 for_each_child_of_node(dev_np, cfg_np) {
784 struct device_node *func_np;
786 if (!of_get_child_count(cfg_np)) {
787 ret = samsung_pinctrl_create_function(dev, drvdata,
788 cfg_np, func);
789 if (ret < 0) {
790 of_node_put(cfg_np);
791 return ERR_PTR(ret);
793 if (ret > 0) {
794 ++func;
795 ++func_cnt;
797 continue;
800 for_each_child_of_node(cfg_np, func_np) {
801 ret = samsung_pinctrl_create_function(dev, drvdata,
802 func_np, func);
803 if (ret < 0) {
804 of_node_put(func_np);
805 of_node_put(cfg_np);
806 return ERR_PTR(ret);
808 if (ret > 0) {
809 ++func;
810 ++func_cnt;
815 *cnt = func_cnt;
816 return functions;
820 * Parse the information about all the available pin groups and pin functions
821 * from device node of the pin-controller. A pin group is formed with all
822 * the pins listed in the "samsung,pins" property.
825 static int samsung_pinctrl_parse_dt(struct platform_device *pdev,
826 struct samsung_pinctrl_drv_data *drvdata)
828 struct device *dev = &pdev->dev;
829 struct samsung_pin_group *groups;
830 struct samsung_pmx_func *functions;
831 unsigned int grp_cnt = 0, func_cnt = 0;
833 groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt);
834 if (IS_ERR(groups)) {
835 dev_err(dev, "failed to parse pin groups\n");
836 return PTR_ERR(groups);
839 functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt);
840 if (IS_ERR(functions)) {
841 dev_err(dev, "failed to parse pin functions\n");
842 return PTR_ERR(functions);
845 drvdata->pin_groups = groups;
846 drvdata->nr_groups = grp_cnt;
847 drvdata->pmx_functions = functions;
848 drvdata->nr_functions = func_cnt;
850 return 0;
853 /* register the pinctrl interface with the pinctrl subsystem */
854 static int samsung_pinctrl_register(struct platform_device *pdev,
855 struct samsung_pinctrl_drv_data *drvdata)
857 struct pinctrl_desc *ctrldesc = &drvdata->pctl;
858 struct pinctrl_pin_desc *pindesc, *pdesc;
859 struct samsung_pin_bank *pin_bank;
860 char *pin_names;
861 int pin, bank, ret;
863 ctrldesc->name = "samsung-pinctrl";
864 ctrldesc->owner = THIS_MODULE;
865 ctrldesc->pctlops = &samsung_pctrl_ops;
866 ctrldesc->pmxops = &samsung_pinmux_ops;
867 ctrldesc->confops = &samsung_pinconf_ops;
869 pindesc = devm_kcalloc(&pdev->dev,
870 drvdata->nr_pins, sizeof(*pindesc),
871 GFP_KERNEL);
872 if (!pindesc)
873 return -ENOMEM;
874 ctrldesc->pins = pindesc;
875 ctrldesc->npins = drvdata->nr_pins;
877 /* dynamically populate the pin number and pin name for pindesc */
878 for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++)
879 pdesc->number = pin + drvdata->pin_base;
882 * allocate space for storing the dynamically generated names for all
883 * the pins which belong to this pin-controller.
885 pin_names = devm_kzalloc(&pdev->dev,
886 array3_size(sizeof(char), PIN_NAME_LENGTH,
887 drvdata->nr_pins),
888 GFP_KERNEL);
889 if (!pin_names)
890 return -ENOMEM;
892 /* for each pin, the name of the pin is pin-bank name + pin number */
893 for (bank = 0; bank < drvdata->nr_banks; bank++) {
894 pin_bank = &drvdata->pin_banks[bank];
895 for (pin = 0; pin < pin_bank->nr_pins; pin++) {
896 sprintf(pin_names, "%s-%d", pin_bank->name, pin);
897 pdesc = pindesc + pin_bank->pin_base + pin;
898 pdesc->name = pin_names;
899 pin_names += PIN_NAME_LENGTH;
903 ret = samsung_pinctrl_parse_dt(pdev, drvdata);
904 if (ret)
905 return ret;
907 drvdata->pctl_dev = devm_pinctrl_register(&pdev->dev, ctrldesc,
908 drvdata);
909 if (IS_ERR(drvdata->pctl_dev)) {
910 dev_err(&pdev->dev, "could not register pinctrl driver\n");
911 return PTR_ERR(drvdata->pctl_dev);
914 for (bank = 0; bank < drvdata->nr_banks; ++bank) {
915 pin_bank = &drvdata->pin_banks[bank];
916 pin_bank->grange.name = pin_bank->name;
917 pin_bank->grange.id = bank;
918 pin_bank->grange.pin_base = drvdata->pin_base
919 + pin_bank->pin_base;
920 pin_bank->grange.base = pin_bank->grange.pin_base;
921 pin_bank->grange.npins = pin_bank->gpio_chip.ngpio;
922 pin_bank->grange.gc = &pin_bank->gpio_chip;
923 pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange);
926 return 0;
929 /* unregister the pinctrl interface with the pinctrl subsystem */
930 static int samsung_pinctrl_unregister(struct platform_device *pdev,
931 struct samsung_pinctrl_drv_data *drvdata)
933 struct samsung_pin_bank *bank = drvdata->pin_banks;
934 int i;
936 for (i = 0; i < drvdata->nr_banks; ++i, ++bank)
937 pinctrl_remove_gpio_range(drvdata->pctl_dev, &bank->grange);
939 return 0;
942 static const struct gpio_chip samsung_gpiolib_chip = {
943 .request = gpiochip_generic_request,
944 .free = gpiochip_generic_free,
945 .set = samsung_gpio_set,
946 .get = samsung_gpio_get,
947 .direction_input = samsung_gpio_direction_input,
948 .direction_output = samsung_gpio_direction_output,
949 .to_irq = samsung_gpio_to_irq,
950 .owner = THIS_MODULE,
953 /* register the gpiolib interface with the gpiolib subsystem */
954 static int samsung_gpiolib_register(struct platform_device *pdev,
955 struct samsung_pinctrl_drv_data *drvdata)
957 struct samsung_pin_bank *bank = drvdata->pin_banks;
958 struct gpio_chip *gc;
959 int ret;
960 int i;
962 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) {
963 bank->gpio_chip = samsung_gpiolib_chip;
965 gc = &bank->gpio_chip;
966 gc->base = bank->grange.base;
967 gc->ngpio = bank->nr_pins;
968 gc->parent = &pdev->dev;
969 gc->of_node = bank->of_node;
970 gc->label = bank->name;
972 ret = devm_gpiochip_add_data(&pdev->dev, gc, bank);
973 if (ret) {
974 dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n",
975 gc->label, ret);
976 return ret;
980 return 0;
983 static const struct samsung_pin_ctrl *
984 samsung_pinctrl_get_soc_data_for_of_alias(struct platform_device *pdev)
986 struct device_node *node = pdev->dev.of_node;
987 const struct samsung_pinctrl_of_match_data *of_data;
988 int id;
990 id = of_alias_get_id(node, "pinctrl");
991 if (id < 0) {
992 dev_err(&pdev->dev, "failed to get alias id\n");
993 return NULL;
996 of_data = of_device_get_match_data(&pdev->dev);
997 if (id >= of_data->num_ctrl) {
998 dev_err(&pdev->dev, "invalid alias id %d\n", id);
999 return NULL;
1002 return &(of_data->ctrl[id]);
1005 /* retrieve the soc specific data */
1006 static const struct samsung_pin_ctrl *
1007 samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d,
1008 struct platform_device *pdev)
1010 struct device_node *node = pdev->dev.of_node;
1011 struct device_node *np;
1012 const struct samsung_pin_bank_data *bdata;
1013 const struct samsung_pin_ctrl *ctrl;
1014 struct samsung_pin_bank *bank;
1015 struct resource *res;
1016 void __iomem *virt_base[SAMSUNG_PINCTRL_NUM_RESOURCES];
1017 unsigned int i;
1019 ctrl = samsung_pinctrl_get_soc_data_for_of_alias(pdev);
1020 if (!ctrl)
1021 return ERR_PTR(-ENOENT);
1023 d->suspend = ctrl->suspend;
1024 d->resume = ctrl->resume;
1025 d->nr_banks = ctrl->nr_banks;
1026 d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks,
1027 sizeof(*d->pin_banks), GFP_KERNEL);
1028 if (!d->pin_banks)
1029 return ERR_PTR(-ENOMEM);
1031 if (ctrl->nr_ext_resources + 1 > SAMSUNG_PINCTRL_NUM_RESOURCES)
1032 return ERR_PTR(-EINVAL);
1034 for (i = 0; i < ctrl->nr_ext_resources + 1; i++) {
1035 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
1036 if (!res) {
1037 dev_err(&pdev->dev, "failed to get mem%d resource\n", i);
1038 return ERR_PTR(-EINVAL);
1040 virt_base[i] = devm_ioremap(&pdev->dev, res->start,
1041 resource_size(res));
1042 if (!virt_base[i]) {
1043 dev_err(&pdev->dev, "failed to ioremap %pR\n", res);
1044 return ERR_PTR(-EIO);
1048 bank = d->pin_banks;
1049 bdata = ctrl->pin_banks;
1050 for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) {
1051 bank->type = bdata->type;
1052 bank->pctl_offset = bdata->pctl_offset;
1053 bank->nr_pins = bdata->nr_pins;
1054 bank->eint_func = bdata->eint_func;
1055 bank->eint_type = bdata->eint_type;
1056 bank->eint_mask = bdata->eint_mask;
1057 bank->eint_offset = bdata->eint_offset;
1058 bank->name = bdata->name;
1060 spin_lock_init(&bank->slock);
1061 bank->drvdata = d;
1062 bank->pin_base = d->nr_pins;
1063 d->nr_pins += bank->nr_pins;
1065 bank->eint_base = virt_base[0];
1066 bank->pctl_base = virt_base[bdata->pctl_res_idx];
1069 * Legacy platforms should provide only one resource with IO memory.
1070 * Store it as virt_base because legacy driver needs to access it
1071 * through samsung_pinctrl_drv_data.
1073 d->virt_base = virt_base[0];
1075 for_each_child_of_node(node, np) {
1076 if (!of_find_property(np, "gpio-controller", NULL))
1077 continue;
1078 bank = d->pin_banks;
1079 for (i = 0; i < d->nr_banks; ++i, ++bank) {
1080 if (of_node_name_eq(np, bank->name)) {
1081 bank->of_node = np;
1082 break;
1087 d->pin_base = pin_base;
1088 pin_base += d->nr_pins;
1090 return ctrl;
1093 static int samsung_pinctrl_probe(struct platform_device *pdev)
1095 struct samsung_pinctrl_drv_data *drvdata;
1096 const struct samsung_pin_ctrl *ctrl;
1097 struct device *dev = &pdev->dev;
1098 struct resource *res;
1099 int ret;
1101 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
1102 if (!drvdata)
1103 return -ENOMEM;
1105 ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev);
1106 if (IS_ERR(ctrl)) {
1107 dev_err(&pdev->dev, "driver data not available\n");
1108 return PTR_ERR(ctrl);
1110 drvdata->dev = dev;
1112 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1113 if (res)
1114 drvdata->irq = res->start;
1116 if (ctrl->retention_data) {
1117 drvdata->retention_ctrl = ctrl->retention_data->init(drvdata,
1118 ctrl->retention_data);
1119 if (IS_ERR(drvdata->retention_ctrl))
1120 return PTR_ERR(drvdata->retention_ctrl);
1123 ret = samsung_pinctrl_register(pdev, drvdata);
1124 if (ret)
1125 return ret;
1127 ret = samsung_gpiolib_register(pdev, drvdata);
1128 if (ret) {
1129 samsung_pinctrl_unregister(pdev, drvdata);
1130 return ret;
1133 if (ctrl->eint_gpio_init)
1134 ctrl->eint_gpio_init(drvdata);
1135 if (ctrl->eint_wkup_init)
1136 ctrl->eint_wkup_init(drvdata);
1138 platform_set_drvdata(pdev, drvdata);
1140 return 0;
1144 * samsung_pinctrl_suspend - save pinctrl state for suspend
1146 * Save data for all banks handled by this device.
1148 static int __maybe_unused samsung_pinctrl_suspend(struct device *dev)
1150 struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev);
1151 int i;
1153 for (i = 0; i < drvdata->nr_banks; i++) {
1154 struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
1155 void __iomem *reg = bank->pctl_base + bank->pctl_offset;
1156 const u8 *offs = bank->type->reg_offset;
1157 const u8 *widths = bank->type->fld_width;
1158 enum pincfg_type type;
1160 /* Registers without a powerdown config aren't lost */
1161 if (!widths[PINCFG_TYPE_CON_PDN])
1162 continue;
1164 for (type = 0; type < PINCFG_TYPE_NUM; type++)
1165 if (widths[type])
1166 bank->pm_save[type] = readl(reg + offs[type]);
1168 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
1169 /* Some banks have two config registers */
1170 bank->pm_save[PINCFG_TYPE_NUM] =
1171 readl(reg + offs[PINCFG_TYPE_FUNC] + 4);
1172 pr_debug("Save %s @ %p (con %#010x %08x)\n",
1173 bank->name, reg,
1174 bank->pm_save[PINCFG_TYPE_FUNC],
1175 bank->pm_save[PINCFG_TYPE_NUM]);
1176 } else {
1177 pr_debug("Save %s @ %p (con %#010x)\n", bank->name,
1178 reg, bank->pm_save[PINCFG_TYPE_FUNC]);
1182 if (drvdata->suspend)
1183 drvdata->suspend(drvdata);
1184 if (drvdata->retention_ctrl && drvdata->retention_ctrl->enable)
1185 drvdata->retention_ctrl->enable(drvdata);
1187 return 0;
1191 * samsung_pinctrl_resume - restore pinctrl state from suspend
1193 * Restore one of the banks that was saved during suspend.
1195 * We don't bother doing anything complicated to avoid glitching lines since
1196 * we're called before pad retention is turned off.
1198 static int __maybe_unused samsung_pinctrl_resume(struct device *dev)
1200 struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev);
1201 int i;
1203 if (drvdata->resume)
1204 drvdata->resume(drvdata);
1206 for (i = 0; i < drvdata->nr_banks; i++) {
1207 struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
1208 void __iomem *reg = bank->pctl_base + bank->pctl_offset;
1209 const u8 *offs = bank->type->reg_offset;
1210 const u8 *widths = bank->type->fld_width;
1211 enum pincfg_type type;
1213 /* Registers without a powerdown config aren't lost */
1214 if (!widths[PINCFG_TYPE_CON_PDN])
1215 continue;
1217 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
1218 /* Some banks have two config registers */
1219 pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n",
1220 bank->name, reg,
1221 readl(reg + offs[PINCFG_TYPE_FUNC]),
1222 readl(reg + offs[PINCFG_TYPE_FUNC] + 4),
1223 bank->pm_save[PINCFG_TYPE_FUNC],
1224 bank->pm_save[PINCFG_TYPE_NUM]);
1225 writel(bank->pm_save[PINCFG_TYPE_NUM],
1226 reg + offs[PINCFG_TYPE_FUNC] + 4);
1227 } else {
1228 pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name,
1229 reg, readl(reg + offs[PINCFG_TYPE_FUNC]),
1230 bank->pm_save[PINCFG_TYPE_FUNC]);
1232 for (type = 0; type < PINCFG_TYPE_NUM; type++)
1233 if (widths[type])
1234 writel(bank->pm_save[type], reg + offs[type]);
1237 if (drvdata->retention_ctrl && drvdata->retention_ctrl->disable)
1238 drvdata->retention_ctrl->disable(drvdata);
1240 return 0;
1243 static const struct of_device_id samsung_pinctrl_dt_match[] = {
1244 #ifdef CONFIG_PINCTRL_EXYNOS_ARM
1245 { .compatible = "samsung,exynos3250-pinctrl",
1246 .data = &exynos3250_of_data },
1247 { .compatible = "samsung,exynos4210-pinctrl",
1248 .data = &exynos4210_of_data },
1249 { .compatible = "samsung,exynos4x12-pinctrl",
1250 .data = &exynos4x12_of_data },
1251 { .compatible = "samsung,exynos5250-pinctrl",
1252 .data = &exynos5250_of_data },
1253 { .compatible = "samsung,exynos5260-pinctrl",
1254 .data = &exynos5260_of_data },
1255 { .compatible = "samsung,exynos5410-pinctrl",
1256 .data = &exynos5410_of_data },
1257 { .compatible = "samsung,exynos5420-pinctrl",
1258 .data = &exynos5420_of_data },
1259 { .compatible = "samsung,s5pv210-pinctrl",
1260 .data = &s5pv210_of_data },
1261 #endif
1262 #ifdef CONFIG_PINCTRL_EXYNOS_ARM64
1263 { .compatible = "samsung,exynos5433-pinctrl",
1264 .data = &exynos5433_of_data },
1265 { .compatible = "samsung,exynos7-pinctrl",
1266 .data = &exynos7_of_data },
1267 #endif
1268 #ifdef CONFIG_PINCTRL_S3C64XX
1269 { .compatible = "samsung,s3c64xx-pinctrl",
1270 .data = &s3c64xx_of_data },
1271 #endif
1272 #ifdef CONFIG_PINCTRL_S3C24XX
1273 { .compatible = "samsung,s3c2412-pinctrl",
1274 .data = &s3c2412_of_data },
1275 { .compatible = "samsung,s3c2416-pinctrl",
1276 .data = &s3c2416_of_data },
1277 { .compatible = "samsung,s3c2440-pinctrl",
1278 .data = &s3c2440_of_data },
1279 { .compatible = "samsung,s3c2450-pinctrl",
1280 .data = &s3c2450_of_data },
1281 #endif
1285 static const struct dev_pm_ops samsung_pinctrl_pm_ops = {
1286 SET_LATE_SYSTEM_SLEEP_PM_OPS(samsung_pinctrl_suspend,
1287 samsung_pinctrl_resume)
1290 static struct platform_driver samsung_pinctrl_driver = {
1291 .probe = samsung_pinctrl_probe,
1292 .driver = {
1293 .name = "samsung-pinctrl",
1294 .of_match_table = samsung_pinctrl_dt_match,
1295 .suppress_bind_attrs = true,
1296 .pm = &samsung_pinctrl_pm_ops,
1300 static int __init samsung_pinctrl_drv_register(void)
1302 return platform_driver_register(&samsung_pinctrl_driver);
1304 postcore_initcall(samsung_pinctrl_drv_register);